Dual-gate Mixer Research Articles

Comparison of active dual‐gate and passive mixers for terahertz applications

The authors propose four versions of a dual-gate active down-conversion mixer for H-band applications. The mixer operates at a local oscillator (LO) frequency of 240 GHz. It is designed for maximum conversion gain and a large bandwidth of at least 50 GHz from 220 to 270 GHz. Furthermore, the mixer is .optimised to operate at low LO power levels beneath 0 dBm. This renders power hungry LO buffer stages redundant. Hereby, the necessary chip size and the overall power consumption of fully integrated receivers can be drastically reduced. Four different versions of the downconverter were designed. Firstly, the layout of the transistors was changed from a conventional multi-transistor cell design to a mixer topology within the multi-finger transistor cell. Secondly, two on-chip solutions to decouple the drain voltage from the intermediate frequency (IF) signal were realised to facilitate zero-IF conversion: a resistive and an active load. The results are presented and the advantages and disadvantages of the four versions for the usage in terahertz applications are thoroughly analysed. Finally, the active dual-gate mixers are compared to a state-of-the-art resistive mixer for H-band with regard to conversion gain, bandwidth, linearity, noise figure and chip size.

Design of a Broadband HEMT Mixer for UWB Applications

Background/Objectives: Microwave mixer is a crucial element in virtually all transmits and receives systems. Methods/Statistical analysis: In this paper, a novel distributed HEMT mixer with three layers is designed for Ultrawide-Band (UWB) receivers. We employ external capacitors in the proposed circuit to adjust the output phase shift between stages to equal the input phase shift. Findings: The simulation results show that the proposed structure, achieves vary broadband performances in Converstion Gain, Power Consumption and LO-RF Isolation, comparable to the recent reported cascode or dual-gate distributed mixers. With a local oscillator power of 12 dBm and RF power of -20 dBm, our mixer has a Conversion Gain of 0 ~ 4 dB (without IF signal amplification), LO-to-RF isolation better than 32 dB and 130 mW DC power consumption over bandwith 5-25 GHz. Applications/Improvements: In our scheme, an intermediate layer is considered to increase LO-RF Isolation and improve the Converstion Gain criterion. Moreover, Microstrip lines are used to form the artificial gate and drain transmission lines as well as phase equalization of the signal on drain transmission line.

The Design of Ring Oscillator Accelerometer Low-Frequency Signal Measurement Circuits

The basic principle of Ring Oscillator Accelerometer is analyzed in this paper. On the basic of simulation and analysis of the structure of the Ring Oscillator Accelerometer, a four-silicon beam structure is put up . Then the mixer- principle of the dual-gate MOS mixer is analyzed in theory. Finally, We have simulated the ring oscillator circuit and the dual-gate MOS mixer circuit using the PSpice. The result of the simulation fits theory well.

A 0.18-$\mu{\hbox {m}}$ Dual-Gate CMOS Device Modeling and Applications for RF Cascode Circuits

A merged-diffusion dual-gate CMOS device model is presented in this paper. The proposed large-signal model consists of two intrinsic BSIM3v3 nonlinear models and parasitic components. The parasitic elements, including the substrate networks, the distributed resistances, and the inductances, are extracted from the measured S-parameters. In order to verify the model accuracy, a cascode configuration with the proposed dual-gate device is employed in a low-noise amplifier. The dual-gate model is also evaluated with power sweep and load-pull measurements. In addition, a doubly balanced dual-gate mixer is successfully demonstrated using the proposed model. The measured results agree with the simulated results using the proposed device model for both linear and nonlinear applications. The advanced large-signal dual-gate CMOS model can be further used as an RF sub-circuit cell for simplifying the design procedure.

A plastic package GaAs MESFET 5.8-GHz receiver front-end with on-chip matching for ETC system

A plastic package GaAs MESFET receiver front-end monolithic microwave integrated circuit operating at 5.8 GHz is presented in this paper. It has a two-stage low-noise amplifier followed by a dual-gate mixer. Operating at 3 V and 8.3 mA, a conversion gain of 20.4 dB, noise figure of 4.1 dB, and high port-to-port isolations have been achieved. Total chip size of 1.0/spl times/0.9 mm/sup 2/ has been achieved through on-chip matching for both RF and local-oscillator ports and the use of simple two-element matching networks for all interstage matching. The 3-dB bandwidth of conversion gain is 1 GHz.

Doubly balanced dual-gate CMOS mixer

The operation, biasing, and measured results of a CMOS doubly balanced dual-gate downconversion mixer are presented. Measurements show, with a radio-frequency input of 1.9 GHz and an intermediate-frequency output of 250 MHz, that the mixer has a conversion gain of 0 dB, an input-referred third-order intercept point of +2 dBm, and a single-sideband noise figure of 13.6 dB while requiring +5 dBm of local-oscillator power and consuming 10.2 mA from a 3 V power supply.

A novel self-oscillating HEMT-HBT cascode VCO-mixer using an active tunable inductor

Here we describe a unique Ka-band self-oscillating HEMT-HBT cascode mixer design which integrates an active tunable resonator circuit. The VCO-mixer MMIC integrates GaAs HEMT's and HBT's using selective molecular beam epitaxy (MBE) technology. The HEMT-HBT cascode active mixer operates similarly to a dual-gate mixer. The HBT of the cascode is used to construct a VCO by presenting the base with an HEMT tunable active inductor. The VCO can be tuned from 28.5 to 29.3 GHz while providing /spl ap/0 dBm of output power. Operated as an upconverter, the MMIC achieves 6-9 dB conversion loss over a 31-39 GHz output frequency band. Using these active approaches, both VCO and mixer functions were integrated into a compact 1.44/spl times/0.76 mm/sup 2/ chip area. The active RF integrated circuit (IC) techniques presented here have direct implications to future high complexity millimeter-wave monolithic integrated circuits (MIMICs) for ultrahigh-speed clock recovery and digital radio applications.

V-band monolithic AlGaAs/InGaAs/GaAs PM-HFET mixers

MMIC microstrip single-gate cold mixers and dual-gate mixers have been developed, fabricated, and measured in V band. They have been processed on 0.15 or 0.25-μm-gate AlGaAs/InGaAs/GaAs pseudomorphic HFET technology. The devices are formed from an exhaustive methodology based on complex characterizations, specific nonlinear modeling and reverse engineering. A comparison for each MMIC is described from the chip process, from the same technology, under the same specifications. © 1997 John Wiley & Sons, Inc. Microwave Opt Technol Lett 15: 139–144, 1997.

V‐band monolithic AlGaAs/InGaAs/GaAs PM‐HFET mixers

MMIC microstrip single-gate cold mixers and dual-gate mixers have been developed, fabricated, and measured in V band. They have been processed on 0.15 or 0.25-μm-gate AlGaAs/InGaAs/GaAs pseudomorphic HFET technology. The devices are formed from an exhaustive methodology based on complex characterizations, specific nonlinear modeling and reverse engineering. A comparison for each MMIC is described from the chip process, from the same technology, under the same specifications. © 1997 John Wiley & Sons, Inc. Microwave Opt Technol Lett 15: 139–144, 1997.

Modelling of single- and dual-gate MESFET mixers

Computer modelling allowing the determination of matching circuitry and optimum bias conditions for maximum conversion gain and IF bandwidth of FET mixers is described. Theoretical results for single-gate and dual-gate FET mixers are presented. Good agreement with measurements on a 12 GHz DBS reception dual-gate FET mixer (8 dB conversion gain with 800 MHz bandwidth) is demonstrated.