Dual-gated Graphene Field Effect Research Articles

Charge carrier modulation in dual-gated graphene field effect transistor using honey as polar organic gate dielectric

Charge carrier modulation of graphene-based field effect transistors (GFETs) is the key factor to utilize and enhance its fascinating properties for technological applicability. Here, we have demonstrated the gate-dependent tweaking of electrical properties of graphene devices by application of honey as a top gate dielectric. Electrical characterization of dual-gated GFET is elucidated at different top and back-gate voltages. A charge neutrality point is fine-tuned by varying the top gate voltage (Vtg) from + 3 to − 4 V. The change in carrier density is clearly observed from 3.66 × 1012 to 2.15 × 1011 cm−2 at + 3 to − 4 Vtg. The charge carrier mobility of gel-gated GFET is increased significantly to 5376 cm2/V ⋅ sec by increasing top-gate voltages up to − 4 V. Result demonstrates a cost-effective, facile and rapid fabrication of top-gated devices and suggest natural dielectric materials as good candidate to replace conventionally available gate dielectrics in FET technology.

Equivalent Circuit Modeling of a Dual-Gate Graphene FET

This paper presents a simple and comprehensive model of a dual-gate graphene field effect transistor (FET). The quantum capacitance and surface potential dependence on the top-gate-to-source voltage were studied for monolayer and bilayer graphene channel by using equivalent circuit modeling. Additionally, the closed-form analytical equations for the drain current and drain-to-source voltage dependence on the drain current were investigated. The distribution of drain current with voltages in three regions (triode, unipolar saturation, and ambipolar) was plotted. The modeling results exhibited better output characteristics, transfer function, and transconductance behavior for GFET compared to FETs. The transconductance estimation as a function of gate voltage for different drain-to-source voltages depicted a proportional relationship; however, with the increase of gate voltage this value tended to decline. In the case of transit frequency response, a decrease in channel length resulted in an increase in transit frequency. The threshold voltage dependence on back-gate-source voltage for different dielectrics demonstrated an inverse relationship between the two. The analytical expressions and their implementation through graphical representation for a bilayer graphene channel will be extended to a multilayer channel in the future to improve the device performance.

Graphene Mobility Dependence on the Resistivity of Si Wafer

Graphene field effect transistors (GFETs) are typically benchmarked based on their field effect mobility. Constant mobility model proposed by Kim1 et.al is extensively used to derive this mobility parameter by directly fitting the transfer curves of graphene devices. Various methodologies were suggested to supplant and improve this existing mobility model. Among them Zhang2 et.al suggested the need for using measured gate oxide capacitance in order to extract mobility for top-gated GFETs. One of the commonly overlooked features, in the case of back gated GEFTs is the dopant concentration or the resistivity of Si substrate used. Herein, we explore the dependence of graphene carrier mobility on the induced carrier concentration and depletion capacitance of underlying Si substrate. Si with resistivities 0.01-0.02 Ω-cm and 0.001-0.005 Ω-cm were used to grow 10 nm thermal SiO2. GFETs were fabricated using CVD graphene on top of this thermal oxide substrate and the corresponding transfer curves are co-related with the capacitance density measured from corresponding MOSCAP structure. Detailed carrier mobility extraction and results are presented.(1) Kim, S.; Nah, J.; Jo, I.; Shahrjerdi, D.; Colombo, L.; Yao, Z.; Tutuc, E.; Banerjee, S. K. Realization of a High Mobility Dual-Gated Graphene Field-Effect Transistor with Al2O3 Dielectric. Appl. Phys. Lett. 2009, 94 (6). https://doi.org/10.1063/1.3077021.(2) Zhang, Z.; Xu, H.; Zhong, H.; Peng, L. M. Direct Extraction of Carrier Mobility in Graphene Field-Effect Transistor Using Current-Voltage and Capacitance-Voltage Measurements. Appl. Phys. Lett. 2012, 101 (21). https://doi.org/10.1063/1.4768690.

Моделирование передаточных характеристик двухзатворных полевых графеновых транзисторов

Моделирование передаточных характеристик двухзатворных полевых графеновых транзисторов

Simscape® based ultra-fast design exploration: graphene-nanoelectronic circuit case studies

SPICE has been the corner stone of integrated circuit simulation since the 1970s. The device-level options that are available for SPICE/analog simulators to simulate a circuit netlist are typically compact models and/or Verilog-A structural and behavioral models. Though these simulations are very accurate, for large and complex circuits/systems they are extremely slow and even computationally infeasible. Thus, as a paradigm shift of the conventional design simulation flow, this paper presents a complete Simscape®based design and simulation flow for ultra-fast design exploration of graphene based nanoelectronic systems. A behavioral model for a dual gate graphene field effect transistor (GFET) is modeled in Simscape®based on the drift-diffusion conduction mechanism. The kink region of the $$I-V$$I-V characteristic is modeled via a displacement current. For case study design circuits, an all graphene based low noise amplifier and an LC-tank voltage controlled oscillator are presented. The results show that the proposed design alternative to simulate analog circuits and systems is a viable option in addition to the existing SPICE, VHDL-AMS or Verilog-A based flows and can open the way to true device-level system design exploration and optimization. To the best of the authors' knowledge, this is the first ever paper to explore a Simscape®model of a GFET device and design a GFET based radio-frequency circuit using Simscape®.

Room-temperature negative differential resistance in graphene field effect transistors: experiments and theory.

In this paper we demonstrate experimentally and discuss the negative differential resistance (NDR) in dual-gated graphene field effect transistors (GFETs) at room temperature for various channel lengths, ranging from 200 nm to 5 μm. The GFETs were fabricated using chemically vapor-deposited graphene with a top gate oxide down to 2.5 nm of equivalent oxide thickness (EOT). We originally explain and demonstrate with systematic simulations that the onset of NDR occurs in the unipolar region itself and that the main mechanism behind NDR is associated with the competition between the specific field dependence of carrier density and the drift velocity in GFET. Finally, we show experimentally that NDR behavior can still be obtained with devices of higher EOTs; however, this comes at the cost of requiring higher bias values and achieving lower NDR level.

Screening-induced surface polar optical phonon scattering in dual-gated graphene field effect transistors

The effect of surface polar optical phonons (SOs) from the dielectric layers on electron mobility in dual-gated graphene field effect transistors (GFETs) is studied theoretically. By taking into account SO scattering of electron as a main scattering mechanism, the electron mobility is calculated by the iterative solution of Boltzmann transport equation. In treating scattering with the SO modes, the dynamic dielectric screening is included and compared to the static dielectric screening and the dielectric screening in the static limit. It is found that the dynamic dielectric screening effect plays an important role in the range of low net carrier density. More importantly, in-plane acoustic phonon scattering and charged impurity scattering are also included in the total mobility for SiO2-supported GFETs with various high-κ top-gate dielectric layers considered. The calculated total mobility results suggest both Al2O3 and AlN are the promising candidate dielectric layers for the enhancement in room temperature mobility of graphene in the future.

Oxidized titanium as a gate dielectric for graphene field effect transistors and its tunneling mechanisms.

We fabricate and characterize a set of dual-gated graphene field effect transistors using a novel physical vapor deposition technique in which titanium is evaporated onto the graphene channel in 10 Å cycles and oxidized in ambient to form a top-gate dielectric. A combination of X-ray photoemission spectroscopy, ellipsometry, and transmission electron microscopy suggests that the titanium is oxidizing in situ to titanium dioxide. Electrical characterization of our devices yields a dielectric constant of κ = 6.9 with final mobilities above 5500 cm(2)/(V s). Low temperature analysis of the gate-leakage current in the devices gives a potential barrier of 0.78 eV in the conduction band and a trap depth of 45 meV below the conduction band.

Low-κ organic layer as a top gate dielectric for graphene field effect transistors

We demonstrate the characteristics of dual gated graphene field effect transistors using a thin layer (∼7 nm) of parylene-C as a top-gate dielectric. Our devices exhibit good dielectric properties with minimal doping, low leakage current (∼10−6 A/cm2 at ±2 V), and a dielectric constant of ∼2.1. Additionally, Raman spectroscopy did not reveal any process induced defects after dielectric deposition. Electrical characterization performed in air showed a carrier mobility of ∼5050 cm2/Vs with hysteresis less than 30 mV during top gate operation (−2.5 V to 2.5 V) which indicates that parylene and its interface with graphene does not have a significant amount of trapped charges.

Aperiodic conductivity oscillations in quasiballistic graphene heterojunctions

We observe conductivity oscillations with aperiodic spacing to only one side of the tunneling current in a dual-gated graphene field effect transistor with an n-p-n type potential barrier. The spacing and width of these oscillations were found to be inconsistent with pure Fabry–Perot-type interferences, but are in quantitative agreement with theoretical predictions that attribute them to resonant tunneling through quasibound impurity states. This observation may be understood as another signature of Klein tunneling in graphene heterojunctions and is of importance for future development and modeling of graphene based nanoelectronic devices.