Abstract
This paper presents a simple and comprehensive model of a dual-gate graphene field effect transistor (FET). The quantum capacitance and surface potential dependence on the top-gate-to-source voltage were studied for monolayer and bilayer graphene channel by using equivalent circuit modeling. Additionally, the closed-form analytical equations for the drain current and drain-to-source voltage dependence on the drain current were investigated. The distribution of drain current with voltages in three regions (triode, unipolar saturation, and ambipolar) was plotted. The modeling results exhibited better output characteristics, transfer function, and transconductance behavior for GFET compared to FETs. The transconductance estimation as a function of gate voltage for different drain-to-source voltages depicted a proportional relationship; however, with the increase of gate voltage this value tended to decline. In the case of transit frequency response, a decrease in channel length resulted in an increase in transit frequency. The threshold voltage dependence on back-gate-source voltage for different dielectrics demonstrated an inverse relationship between the two. The analytical expressions and their implementation through graphical representation for a bilayer graphene channel will be extended to a multilayer channel in the future to improve the device performance.
Highlights
In the last 50 years, the silicon-based semiconductor industry has been operating successfully
Semiconductor devices made of silicon and III-V materials are serving the purpose of high speed and high integration density, but their application in flexible, bendable, and transparent electronics is not prominent
We considered capacitance between the top gate and the graphene channel as We considered capacitance between the top gate and the graphene channel as Ce and and is the capacitance between the back gate and the channel
Summary
In the last 50 years, the silicon-based semiconductor industry has been operating successfully. It will encounter both scientific and technical limits soon. This requires the industry to explore new materials and technologies. In 2004, Geim and Novoselov at Manchester University isolated single-layer graphene successfully by an easy mechanical exfoliation method just using a scotch tape [2]. Semiconductor devices made of silicon and III-V materials are serving the purpose of high speed and high integration density, but their application in flexible, bendable, and transparent electronics is not prominent. In the field of transistors, especially for FET (field effect transistor) and MOSFET (metal-oxide semiconductor field effect transistor) technology, graphene is a promising candidate because it shows zero effective mass inside a material
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