Dual-direction Silicon-controlled Rectifier Research Articles

Dual-directional SCR device with dual-gate controlled mechanism for ESD protection in photoelectric chip

The dual-directional silicon-controlled rectifier (DDSCR) is an electrostatic discharge (ESD) protection device. It can provide positive and negative ESD surge paths and has excellent robustness. However, industry-level sensors operating in strong electromagnetic interference environments impose higher reliability requirements on photoelectric chips. This paper proposed a novel DDSCR with a dual-gate controlled mechanism. By incorporating the gate diode triggering and the gate field modulation mechanism into the traditional DDSCR, and further utilizing additional parasitic bipolar junction transistors (BJTs) for diversion, the proposed device exhibits significantly improved ESD characteristics. Measurement results indicate that, compared to DDSCR, the proposed device exhibits a 27.5% reduction in trigger voltage (Vt1 ), a 96.1% improvement in holding voltage (Vh ), and achieves an equivalent human body model protection level of 11.45 kV, demonstrating exceptional design area efficiency. The experimental findings validate the effectiveness of the proposed device in 5 V photoelectric chip applications.

Investigation on holding voltage of asymmetric DDSCR with floating heavy doping in 0.18 μm CMOS process

In the ESD protection design work, the most effective way to improve the holding voltage of bidirectional silicon-controlled rectifier or SCR device is to increase the distance between the cathode and anode of it. However, for DDSCR devices with multi-finger layouts, increasing this distance will result in a decrease in failure current and require a larger layout area. In this work, five types of asymmetric dual direction silicon-controlled rectifier devices with different floating heavy doping combinations are designed based on the traditional ADDSCR structure. Meanwhile, the dimensions, number of fingers, metal layout and number of CONT holes of the five ADDSCR structures are strictly kept the same, aiming at studying the influence of different floating heavy doping combinations on the performance of SCR devices and find the optimal floating heavy doping combination. Their ESD performances are predicted and verified through the two-dimensional device simulations and transmission line pulse (TLP) test results. All the five types of ADDSCR structures are designed to improve the holding voltage. From the results, the forward and reverse holding voltage of ADDSCR_PP, which is inserted floating P+ in NW and PW, are increased to 20.4 V and 17.6 V respectively, compared with the traditional devices without floating heavy doping at 14.2 V and 8.7 V. At the same time, the physical mechanism for the effect of floating heavy doping insert into NW and PW separately were investigated. Finally, the one that best meets the ESD window of automotive application is found.

Compact and Fast Response Dual-Directional SCR for Nanoscale ESD Protection Engineering

Direct bidirectional current discharge paths between input/output (I/O) and ground (GND) are imperative to achieve robust charged device model (CDM) protection for very stringent design window in advanced low-voltage (LV) processes. In this brief, a compact and fast response dual-directional silicon-controlled rectifier (CFR-DDSCR) has been proposed. Using P-electrostatic discharge (ESD) implantation layer to implement each diode-triggered silicon-controlled rectifier (SCR) within only one n-well, the inherent defect of the prior art (i.e., the cumbersome p-well/n-well triggering diode) is eliminated, ensuring the low resistance of auxiliary triggering path and the compactness of silicon footprint. Moreover, by shielding all internal shallow trench isolation (STIs) with floating high- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${k}$ </tex-math></inline-formula> metal gates (HKMGs), an all-gate-bounded SCR structure is realized, and all triggering diodes evolve into gated diodes with compact current paths, thus improving the CDM protection capability greatly. Experimental results indicate that the CFR-DDSCR, with a design window suitable for 1.2 V-CMOS technologies, acquires a higher effective CDM robustness (73% improved), a faster turn-on speed (64% improved), and a more compact layout (31% shrunk) compared with its conventional counterpart, which is promising for the advanced LV CDM protection.

Design of high voltage electrostatic protection device for CAN bus

The Dual-Direction Silicon Controlled Rectifier (DDSCR) device has dual-direction electrostatic protection function and strong current discharging ability, which is widely used in ESD on-chip protection. In this paper, a high performance symmetric high voltage Dual-Direction Silicon Controlled Rectifier with floating P+ (HVDDSCR_FP+) is designed for CAN bus under 0.18 μm BCD process. In order to predict and verify the ESD performance of the device, TCAD two-dimensional device simulation and Transmission Line Pulse (TLP) test system were used. The experimental results show that the HVDDSCR_FP + structure has not only symmetrical positive and reverse I-V curves, but also the characteristics of high holding voltage and high failure current. Compared with the traditional HVDDSCR, HVDDSCR_FP+, at 25V forward and reverse trigger voltages (Vt), has increased its holding voltage (Vh) from 12V to 20V, failure current (It2) from 5A to 35A. In the actual tape-out process, it is found that the width of the N-well has a great influence on the performance of the device. After analyzing the reason and improving it, the leakage current of the device is reduced from μA level to nA level.

Novel Symmetrical Dual-Directional SCR With p-Type Guard Ring for High-Voltage ESD Protection

The negative holding voltage of high-voltage (HV) dual-directional silicon-controlled rectifier (DDSCR) is usually attenuated to a very low level due to the grounded guard ring, which has been ignored by many researchers nowadays. In this brief, a novel symmetrical DDSCR (SDDSCR) is proposed to suppress the deterioration of DDSCR's negative holding voltage. By introducing a diffusion resistor into the p-type guard ring (PGR), experimental results indicated that the reverse parasitic SCR path associated with PGR is suppressed effectively. Thus, a symmetric high holding voltage characteristic is implemented for SDDSCR without increasing any silicon footprint. Moreover, the PGR resistor technology presented in this brief can be extended to various existing HV DDSCRs, which could improve their negative holding voltage deteriorated by guard ring.

Analysis and Measurement of Capacitance Characteristics of a Novel Light-Controlled Dual-Directional Gate Silicon-Controlled Rectifier

With the continuous development of optoelectronic devices, parasitic capacitance of electrostatic protection device in the optoelectronic control circuit has become an important factor affecting its response speed. This work designs and manufactures a novel light-controlled dual-directional gate silicon-controlled rectifier (LDGSCR) to study the relationship between light and parasitic capacitance based on 0.18-μm bipolar—complementary metal-semiconductor—double-diffused metal-oxide semiconductor process. The capacitance characteristics of LDGSCR is predicted and verified based on basic principles of the device, 3D device simulation, and capacitance–voltage characteristic C(V) test result. The results show that parasitic capacitance of LDGSCR is affected by both light and bias voltage due to selectivity of J2 junction to light wavelength. The parasitic capacitance of LDGSCR is interestingly divided into three stages of change as voltage increases under light, and the magnitude of capacitance increase varies with the change of light wavelength. In addition, the influence of darkness and light intensity on the parasitic capacitance of LDGSCR is studied. Finally, an optimal adjustment method that balances design windows of novel device and operating frequency of circuit is proposed. This work provides suggestions for the study of capacitance characteristics of light-controlled electrostatic protection devices.

A High Failure-Current Gate-Controlled Dual-Direction SCR for High-Voltage ESD Protection in 0.18-μm BCD Technology

To make a dual-direction silicon-controlled rectifier (SCR) that is highly robust in a high-voltage environment, a gate-controlled dual-direction SCR (GC-DDSCR) device is proposed. After analyzing the working principle of the device through the equivalent circuit and 2-D device simulation, the electro-static discharge (ESD) characteristics of the device are verified through the transmission line pulse (TLP) test. The failure current of the GC-DDSCR structure is greatly improved to 14.19 A compared with only 3.53 A of the same size traditional dual-direction SCR (TDDSCR) structure. The trigger voltage and the holding voltage of the GC-DDSCR are 24.23 and 20.15 V, respectively. In addition, this article explains the principle of GC-DDSCR devices with high protection capability. That is, because the device has a polysilicon gate electrode shorted to the anode (cathode), the electric field effect generated by the gate promotes carrier movement in the SCR path. Thus, the electric field force promotes the opening of the SCR path of the device and the direction of the electric field force is always consistent with the current direction. The overall failure capability of the device is effectively improved.

New DDSCR structure with high holding voltage for robust ESD applications* *Project supported by the National Natural Science Foundation of China (Grant Nos. 61774129, 61827812, and 61704145), the Huxiang High-level Talent Gathering Project from the Hunan Science and Technology Department, China (Grant No. 2019RS1037), and the Changsha Science and Technology Plan Key Projects, China (Grant Nos. kq1801035 and kq1703001).

A novel dual direction silicon-controlled rectifier (DDSCR) with an additional P-type doping and gate (APGDDSCR) is proposed and demonstrated. Compared with the conventional low-voltage trigger DDSCR (LVTDDSCR) that has positive and negative holding voltages of 13.371 V and 14.038 V, respectively, the new DDSCR has high positive and negative holding voltages of 18.781 V and 18.912 V in a single finger device, respectively, and it exhibits suitable enough positive and negative holding voltages of 14.60 V and 14.319 V in a four-finger device for ±12-V application. The failure current of APGDDSCR is almost the same as that of LVT-DDSCR in the single finger device, and the four-finger APGDDSCR can achieve positive and negative human-body model (HBM) protection capabilities of 22.281 kV and 23.45 kV, respectively, under 40-V voltage of core circuit failure, benefitting from the additional structure. The new structure can generate a snapback voltage on gate A to increase the current gain of the parasitic PNP in holding voltage. Thus, a sufficiently high holding voltage increased by the structure can ensure that a multi-finger device can also reach a sufficient holding voltage, it is equivalent to solving the non-uniform triggering problem of multi-finger device. The operating mechanism and the gate voltage are both discussed and verified in two-dimensional (2D) simulation and experiemnt.

A Novel Dual-Directional SCR Structure With High Holding Voltage for 12-V Applications in 0.13-μm BCD Process

This article proposes a dual-directional silicon-controlled rectifier (SCR) with a novel structure and high holding voltage to improve the electrostatic discharge (ESD) design area efficiency in high-voltage environments. In terms of structure, by decreasing the emitter injection efficiency of the p-n-p parasitic bipolar transistor formed at the bottom of the gate region, the SCR positive feedback gain is reduced, which endows the proposed device with improved snapback characteristics compared with the conventional low-voltage triggering SCR (LVTSCR) and low-trigger dual directional SCR (LTDDSCR). This article conducted 2-D and mixed-mode simulations to compare and analyze the operating principles of the proposed and traditional devices. Additionally, experimental devices were fabricated under the same conditions using the 0.13- $\mu \text{m}$ process to verify their electrical properties and latch-up immunity by measuring the transmission line pulse (TLP) and transient latch-up (TLU). This article also conducted a detailed analysis on the optimization of electrical properties for the ESD design window of the proposed device according to the design variables and application of segment topology, and also analyzed the temperature reliability using a hot chuck control system. The measurement results reveal that the proposed device is highly suitable for the 12-V-class ESD design window, has improved reliability, and can provide excellent area efficiency in related applications.

The Influence of N-Type Buried Layer on SCR ESD Protection Devices

This article investigates the effect of N-type buried layer (NBL) on the holding voltage and failure current of conventional low voltage triggered silicon-controlled rectifier (LVTSCR) and conventional dual directional silicon-controlled rectifier (DDSCR) devices. LVTSCR and DDSCR with N-type buried layer are fabricated on a 0.18- $\mu \text{m}$ Bipolar CMOS DMOS (BCD) technology. In order to verify and predict the effect of N-type buried layer on the characteristics of ESD protection devices, a transmission line pulse (TLP) testing system and a 2-dimension device simulation platform have been used in this work. According to the measurement results, the holding voltage ( ${\mathrm{ V}}_{\mathrm{ h}}$ ) and failure current ( ${\mathrm{ I}}_{\mathrm{ t2}}$ ) of the LVTSCR and DDSCR can be drastically improved by adding N-type buried layer.

New embedded DDSCR structure with high holding voltage and high robustness for 12-V applications**Project supported by the National Natural Science Foundation of China (Grant Nos. 61704145, 61774129, and 61827812), the Natural Science Foundation of Hunan Province, China (Grant No. 2019JJ50609), and the Key Technology Program of Changsha City, China (Grant No. kq1902042).

A new dual directional silicon-controlled rectifier based electrostatic discharge (ESD) protection device suitable for 12-V applications is proposed in this paper. The proposed device (NPEMDDSCR) is based on the embedded DDSCR (EMDDSCR) structure, in which the P+ electrode and P+ injection are removed from the inner finger. Compared with the conventional modified DDSCR (MDDSCR), its high holding voltage meets the requirements for applications. Compared with the embedded DDSCR (EMDDSCR), it has good conduction uniformity. The MDDSCR, EMDDSCR, and NPEMDDSCR are fabricated with an identical width in a 0.5-μm CDMOS process. In order to verify and predict the characteristics of the proposed ESD protection device, a transmission line pulse (TLP) testing system and a two-dimensional device simulation platform are used in this work. The measurements demonstrate that the NPEMDDSCR provides improved reliability and higher area efficiency for 12 V or similar applications. The measurement results also show that the NPEMDDSCR provides higher robustness and better latch-up immunity capability.

Design and analysis of a multi-finger dual-direction SCR discharging electro-static current in a gradual transition manner

In order to seek an electro-static discharge with higher failure current per unit area and latch-up immunity, a novel multi-finger dual-direction silicon controlled rectifier (DDSCR) using the 0.5 μm complementary and double-diffusion metal-oxide-semiconductor technology was proposed. The working principle of the device is analyzed by using equivalent circuit and technology computer aided design simulation. From the test result of the transmission line pulse testing system we can see that the holding voltages for the traditional dual-direction silicon controlled rectifiers with a single-finger and two-fingers are 11.34 V and 7.63 V, respectively, which is decreased as the number of fingers increases. The holding voltage of the proposed device is 12.2 V, which is higher than that of the traditional 2-finger DDSCR and suitable for communication interface high voltage electrostatic discharge (ESD) protection. Furthermore, the influence of some dimensions, fingers and total finger width on the device is discussed. The proposed device not only solves the problem of decreasing the holding voltage caused by increasing the number of fingers, but also has a slight effect on the failure current. The root cause for such holding voltage trend is their different working mechanisms. The proposed device is turning on one finger by another instead of simultaneously turning on in the multi-finger traditional devices. Therefore, the proposed ESD device owns a holding voltage similar to that of the 1-finger device.

A Radiation-Hardened Dual-Direction SCR Based on LDMOS for ESD Protection in the Extreme Radiation Environment

To mitigate the total ionizing dose (TID) effects of the dual-direction silicon-controlled rectifier, based on laterally diffused metal–oxide–semiconductor (LDMOS-DDSCR), a common-centroid layout arrangement with multiple octagonal units is proposed and fabricated in an 18-V Bipolar-CMOS-DMOS process. The symmetrical characteristics of the bidirectional electrostatic discharge (ESD) protection are verified by transmission line pulse tests. Gamma-ray irradiation experiments demonstrate that the proposed device is tolerant of TID effects up to 100 krad(Si), whereas the traditional finger-type LDMOS-DDSCR loses its function at 50 krad(Si). Finally, the ESD performance is also characterized at high temperatures which confirms that the proposed device is an excellent candidate for space applications.

The impact of radiation and temperature effects on dual-direction SCR devices for on-chip ESD protections

The reliability issues of integrated circuits are attracting more attention, especially in extreme environments like radiation and elevated temperature conditions. The impact of ionizing radiation and temperature effects on the electrostatic discharge (ESD) protection devices should not be negligible. In this paper, A low-voltage dual-direction silicon controlled rectifier (DDSCR) and a high-voltage DDSCR based on laterally diffused metal oxide semiconductor are chosen and fabricated in a 5 V/18 V Bipolar-CMOS-DMOS process. To study the combined effects of ESD and total-ionizing dose, transmission line pulse (TLP) measurements are conducted right after exposure to 60Co gamma-ray up to 200 krad(Si). Besides, the TLP tests are performed at different temperatures ranging from 300 to 400 K to show the impact of elevated temperature on ESD devices. In the meanwhile, the physical mechanisms of the synergistic effects are investigated by means of three-dimensional (3D) TCAD simulations.

Design and Optimization of High-Failure-Current Dual-Direction SCR for Industrial-Level ESD Protection

In an industrial-grade bus, transient voltage suppressor (TVS) devices that need to withstand inrush currents ensure electrostatic discharge (ESD) reliability of the core chip. This article designs four types of dual-direction silicon-controlled rectifier (DDSCR) device structures based on the 0.5-μm CMOS process. The ESD performance of the TVS device is predicted and verified based on the basic principles of the device, two-dimensional device simulation, and transmission line pulse test results. Four DDSCR structures are embedded with floating N+ to adjust the device's holding voltage window. The results show that the current release capacity of DDSCR_1 is 81.93 mA/μm. The current release capability of DDSCR_2, which has a double-dummy-gate structure, is 82.37 mA/μm. The current release capability of DDSCR_3 of the gate-controlled structure is 86.68 mA/μm. The current release capability of DDSCR_4 of the double-dummy-gate structure and the gate-controlled structure is 86.25 mA/μm. Furthermore, the effect of the size of these devices on the ESD characteristics was studied. The on-resistance of the device structure is calculated by the curve-fitting method. The influence of the dummy gate structure and the gate-controlled structure on the ESD characteristics is analyzed. Finally, the optimal device size to meet the window is found.

A compact LDMOS DDSCR for HV ESD protections with high robustness and reliability

The LDMOS-based silicon controlled rectifier (SCR) is commonly used in high voltage (HV) electrostatic discharge (ESD) protection due to its great current handling capability per area and HV protection ability. In this paper, an improved LDMOS-based dual direction SCR (LDMOS-DDSCR) device is designed by replacing floating N+ region with electrically-connected P+, N+ and P+ regions to enhance its ESD robustness, which is verified in a 0.5-μm (1p2m) 18 V HV CDMOS process. The internal mechanism of the proposed device is analyzed using two-dimension (2D) TCAD simulations, and the ESD performance is characterized by means of transmission line pulse (TLP) and very-fast TLP (VFTLP) measurements. Compared with the conventional LDMOS-DDSCR, the failure current of the compact LDMOS-DDSCR raises from 2.00 A to 4.02 A (increased by 101%), and the trigger voltage reduces from 44.28 V to 39.76 V, without sacrificing layout area. Furthermore, the TLP I-V curves of the proposed LDMOS-DDSCR are measured at different temperatures ranging from 25 °C to 125 °C, which proves its reliability and show potential use in the applications of high voltage integrated circuits.

An ESD robust high holding voltage dual-direction SCR with symmetrical I-V curve by inserting a floating P+ in PWell

The dual directional silicon-controlled rectifier (DDSCR) device is widely used in on-chip electrostatic discharge (ESD) protection owing to its bi-directional ESD protection and strong current-tolerating capability per area. In this paper, an asymmetrical dual directional ESD protection device for automotive application was developed in a 0.18-µm Bipolar CMOS DMOS (BCD) technology. In order to verify and predict the proposed ESD protection device’s characteristics, a transmission line pulse (TLP) testing system and a 2-dimension device simulation platform have been used in this work. According to the measurement results, the asymmetrical dual directional silicon-controlled rectifier with a floating P+ region (ADDSCR_FP+) increases the forward holding voltage (Vh) from 3.89 V to 19.7 V and increases the reverse holding voltage from 3.62 V to 19.5 V which only slightly decrease the failure current compared with the traditional asymmetrical dual directional silicon-controlled rectifier (ADDSCR). The ADDSCR_FP+ has the features of symmetrical forward and reverse I-V curves, high holding voltage and high failure current.

Dual direction SCR with deep well structure for high voltage ESD in communication bus

In order to improve the robustness of the ESD of the dual-direction silicon-controlled rectifier, a low doping deep well PB structure is proposed instead of the traditional high doping P+ structure. The ESD stress of the dual-direction SCR devices with deep well structure is discharged from inside and the lattice temperature of the device is low to avoid premature burnout of the device. The deep well PB structure on the surface of the device increases the parasitic resistance of the device and improve the conduction uniformity of the device. As the main conduction path of the device is located in NBL, the PB structure does not have a large influence on the sustain voltage. It is verified in a 0.25 μm BCD process. With equivalent circuit and two-dimensional device simulation, the working mechanism is analyzed. According to the transmission line pulse test results and comparing with the data from traditional dual-direction SCR structure. The device’s fault current increases from 5.486 A to 8.13 A which is suitable for communication bus high voltage electrostatic discharge (ESD) protection.

A Compact and Self-Isolated Dual-Directional Silicon Controlled Rectifier (SCR) for ESD Applications

In this paper, a compact and self-isolated dual directional silicon-controlled rectifier (CSDDSCR) developed in a single N-well has been proposed and demonstrated. Without using the P-well, the N-type isolation structure as well as an auxiliary trigger component, which are normally required in the traditional DDSCR, the novel CSDDSCR possesses a very high area-efficiency and robustness of ~8.81 V / $\mu$ m2. It is also shown that the CSDDSCR preserves a lower trigger voltage as 10 V, an adjustable holding voltage from 3.32 to 8.79 V under the TLP test, a smaller overshoot voltage of ~19 V at 2 A VFTLP stress, as well as an extremely low leakage current of ~94 pA measured at 3.3 V, making it a superior candidate for electrostatic discharge protection in the 3.3 V/5 V CMOS processes. Moreover, a holding voltage reversal effect has also been discovered and explained with TCAD simulation.

A Novel High Holding Voltage Dual-Direction SCR With Embedded Structure for HV ESD Protection

In order to boost the holding voltage of the multi-fingered dual-direction silicon-controlled rectifier, a novel embedded topology is proposed instead of the traditional interdigital multi-finger arrangement. It is verified in a 0.5- $\mu \text{m}$ 18-V standard CDMOS process and applied to the high-voltage electro-static discharge (ESD) protection. With equivalent circuit and 2D device simulation, the operation principle and working mechanism are analyzed. According to the TLP-test results, the holding voltage of the multi-finger device is greatly improved from 7.62 V (traditional interdigital structure) to 19.67 V (the proposed embedded structure), and it has a narrower ESD design window (9.26 V) than that of the interdigital counterpart (15.17 V). Furthermore, the principle of the multi-finger device with embedded topology features a superior holding voltage is explained by using the model of ladder resistance network. It is concluded that the Ron of the embedded structure is determined by the size of topology and almost unaffected by the number of fingers.