Driven-right-leg Research Articles

A Versatile In-Ear Biosensing System and Body-Area Network for Unobtrusive Continuous Health Monitoring.

To enable continuous, mobile health monitoring, body-worn sensors need to offer comparable performance to clinical devices in a lightweight, unobtrusive package. This work presents a complete versatile wireless electrophysiology data acquisition system (weDAQ) that is demonstrated for in-ear electroencephalography (EEG) and other on-body electrophysiology with user-generic dry-contact electrodes made from standard printed circuit boards (PCBs). Each weDAQ device provides 16 recording channels, driven right leg (DRL), a 3-axis accelerometer, local data storage, and adaptable data transmission modes. The weDAQ wireless interface supports deployment of a body area network (BAN) capable of aggregating various biosignal streams over multiple worn devices simultaneously, on the 802.11n WiFi protocol. Each channel resolves biopotentials ranging over 5 orders of magnitude with a noise level of 0.52 μVrms over a 1000-Hz bandwidth, and a peak SNDR of 119 dB and CMRR of 111 dB at 2 ksps. The device leverages in-band impedance scanning and an input multiplexer to dynamically select good skin contacting electrodes for reference and sensing channels. In-ear and forehead EEG measurements taken from subjects captured modulation of alpha brain activity, electrooculogram (EOG) characteristic eye movements, and electromyogram (EMG) from jaw muscles. Simultaneous ECG and EMG measurements were demonstrated on multiple, freely-moving subjects in their natural office environment during periods of rest and exercise. The small footprint, performance, and configurability of the open-source weDAQ platform and scalable PCB electrodes presented, aim to provide the biosensing community greater experimental flexibility and lower the barrier to entry for new health monitoring research.

Size Constraint to Limit Interference in DRL-Free Single-Ended Biopotential Measurements

In this work, it is shown that small, battery-powered wireless devices are so robust against electromagnetic interference that single-ended amplifiers can become a viable alternative for biopotential measurements, even without a Driven Right Leg (DRL) circuit. A power line interference analysis is presented for this case showing that this simple circuitry solution is feasible, and presenting the constraints under which it is so: small-size devices with dimensions less than 40 mm × 20 mm. A functional prototype of a two-electrode wireless acquisition system was implemented using a single-ended amplifier. This allowed validating the power-line interference model with experimental results, including the acquisition of electromyographic (EMG) signals. The prototype, built with a size fulfilling the proposed guidelines, presented power-line interference voltages below 1.2 µVPP when working in an office environment. It can be concluded that a single-ended biopotential amplifier can be used if a sufficiently large isolation impedance is achieved with small-size wireless devices. This approach allows measurements with only two electrodes, a very simple front-end design, and a reduced number of components.

Common-Mode Voltage Reduction in Capacitive Sensing of Biosignal Using Capacitive Grounding and DRL Electrode.

A capacitive measurement of the biosignals is a very comfortable and unobtrusive way suitable for long-term and wearable monitoring of health conditions. This type of sensing is very susceptible to noise from the surroundings. One of the main noise sources is power-line noise, which acts as a common-mode voltage at the input terminals of the acquisition unit. The origin and methods of noise reduction are described on electric models. Two methods of noise removal are modeled and experimentally verified in the paper. The first method uses a passive capacitive grounding electrode, and the second uses an active capacitive Driven Right Leg (DRL) electrode. The effect of grounding electrode size on noise suppression is experimentally investigated. The increasing electrode area reduces power-line noise: the power of power-line frequency within the measured signal is 70.96 dB, 59.13 dB, and 43.44 dB for a grounding electrode area of 1650 cm2, 3300 cm2, and 4950 cm2, respectively. The capacitive DRL electrode shows better efficiency in common-mode noise rejection than the grounding electrode. When using an electrode area of 1650 cm2, the DRL achieved 46.3 dB better attenuation than the grounding electrode at power-line frequency. In contrast to the grounding electrode, the DRL electrode reduces a capacitive measurement system’s financial costs due to the smaller electrode area made of the costly conductive textile.

An Integrated Multi-Channel Biopotential Recording Analog Front-End IC With Area-Efficient Driven-Right-Leg Circuit.

A multi-channel biopotential recording analog front-end (AFE) with a fully integrated area-efficient driven-right-leg (DRL) circuit is presented in this paper. The proposed AFE includes 10 channels of low-noise capacitive coupled instrumentation amplifier (CCIA), one shared 10-bit SAR ADC and a fully integrated DRL to enhance the system-level common-mode rejection ratio (CMRR). The proposed DRL circuit senses the common-mode at the CCIA output so that the AFE gain is reused as the DRL loop gain. Therefore, area efficient unit-gain buffer with small averaging capacitors can be used in DRL circuit to reduce the circuit area significantly. The proposed AFE has been implemented in a standard 0.18-μm CMOS process. The DRL circuit achieved more than 85% chip area reduction compared to the state-of-art on-chip DRL circuits and maximum 60 dB enhancement to system-level CMRR. Measurement results show high/low AFE gain of 60 dB/54dB respectively with 1 μA/channel current consumption under 1.0 V power supply. The measured AFE input-referred noise in 1 Hz - 10k Hz range is 4.2 μVrms and the maximum system-level CMRR is 110 dB.

A 400 GΩ Input-Impedance Active Electrode for Non-Contact Capacitively Coupled ECG Acquisition With Large Linear-Input-Range and High CM-Interference-Tolerance.

Electrocardiogram (ECG) is one of the major physiological vital signs and an effective monitoring method for patients with cardiovascular diseases. However, existing ECG recordings require a galvanic body contact, which is unpractical in daily life. This paper presents the design of an ECG chip that facilitates non-contact ECG recording through capacitive coupling. With the input impedance boosting techniques, as well as an active driven-right-leg (DRL) which boosts common-mode rejection ratio to 70dB, the single-ended capacitive feedback active electrode (AE) achieves ultra-high input impedance of 400 GΩ (< 0.5 Hz), a large common-mode interference tolerance (2.8 VPP), and a high linear-input-range (220 m VPP). Implemented in 0.18 μm 5V CMOS process, the prototype occupies an area of 1.23 mm2, and consumes 18 μA and 13 μA for the AE and DRL, respectively. Real life non-contact capacitively coupled ECG acquisition has been demonstrated, obtaining ECG waves and heart rate in the presence of motion artifacts as well as ambient interference.

BRAINsens: Body-Worn Reconfigurable Architecture of Integrated Network Sensors

Body sensor network (BSN) is a promising human-centric technology to monitor neurophysiological data. We propose a fully-reconfigurable architecture that addresses the major challenges of a heterogenous BSN, such as scalabiliy, modularity and flexibility in deployment. Existing BSNs especially with Electroencephalogarm (EEG) have these limitations mainly due to the use of driven-right-leg (DRL) circuit. We address these limitations by custom-designing DRL-less EEG smart sensing nodes (SSN) for modular and spatially distributed systems. Each single-channel EEG SSN with a input-referred noise of 0.82 μVrms and CMRR of 70dB (at 60Hz), samples brain signals at 512 sps. SSNs in the network can be configured at the time of deployment and can process information locally to significantly reduce data payload of the network. A Control Command Node (CCN) initializes, synchronizes, periodically scans for the available SSNs in the network, aggregates their data and sends it wirelessly to a paired device at a baud rate of 115.2kbps. At the given settings of the I2C bus speed of 100kbps, CCN can configure up to 39 EEG SSNs in a lego-like platform. The temporal and frequency-domain performance of the designed "DRL-less" EEG SSNs is evaluated against a research-grade Neuroscan and consumer-grade Emotiv EPOC EEG. The results show that the proposed network system with wearable EEG can be deployed in situ for continuous brain signal recording in real-life scenarios. The proposed system can also seamlessly incorporate other physiological SSNs for ECG, HRV, temperature etc. along with EEG within the same topology.

An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit.

This paper describes an integrated multichannel neural recording analog front end (AFE) with a novel area-efficient driven right leg (DRL) circuit to improve the system common mode rejection ratio (CMRR). The proposed AFE consists of an AC-coupled low-noise programmable-gain amplifier, an area-efficient DRL block and a 10-bit SAR ADC. Compared to conventional DRL circuit, the proposed capacitor-less DRL design achieves 90% chip area reduction with enhanced CMRR performance, making it ideal for multichannel biomedical recording applications. The AFE circuit has been designed in a standard 0.18-μm CMOS process. Post-layout simulation results show that the AFE provides two gain settings of 54dB/60dB while consuming 1 μA per channel under a supply voltage of 1 V. The input-referred noise of the AFE integrated from 1 Hz to 10k Hz is only 4 μVrms and the CMRR is 110 dB.

Design of sEMG-detecting circuit for EMG-Bridge.

A surface electromyography (sEMG) signal typically results from the electrical activities of many muscle fibers, and can be utilized as a signal source in prostheses due to its abundance of movement information. This paper proposes an sEMG-detection circuit for the acquisition of the controlling signal in EMG-Bridge (EMGB) systems. The detection circuit mainly comprises a preamplifier, a driven right leg (DRL) circuit, a high-pass filter (HPF), a low-pass filter (LPF), and a gain adjustable amplifying circuit. The common-mode rejection ratio (CMRR) of the circuit is higher than 120 dB, the input impedance is greater than 100 MΩ, the passband range is 20~450 Hz, and the frequency attenuation in stopband is not less than 120dB/dec.

NeuroMonitor: a low‐power, wireless, wearable EEG device with DRL‐less AFE

Electroencephalography (EEG) is an effective tool to non-invasively capture brain responses. Traditional EEG analogue front end (AFE) requires a driven right leg (DRL) circuit that restricts the number of channels of the device. The authors are proposing a new `DRL-less' AFE design, and have developed a wearable EEG device (NeuroMonitor), which is small, low-power, wireless, and battery operated. The EEG device with two independent channels was fabricated on an 11.35 cm 2 PCB that contained a system-on-a-chip microcontroller, a low-noise instrument amplifier, a low-power Bluetooth module, a microSD, a microUSB, and a LiPo battery. The DRL circuit was eliminated by utilising the high CMRR instrument amplifier with differential inputs, and followed by a modified high-Q active Twin-T notch filter (( f c Notch = 60 Hz, -38 dB). The signal was conditioned with a band-pass filter composed of a two-stage 2nd-order Chebyshev-I Sallen-Key low-pass filter cascaded with a passive 2nd-order low-pass filter ( f c LP = 125 Hz) and a 1st-order passive high-pass filter ( f c HP = 0.5 Hz). Finally, the signal was amplified to achieve an overall gain of 55.84 dB, and digitised with a 16-bit delta-sigma ADC (256 sps). The prototype weighs 41.8 gm, and has been validated against a research-grade EEG system (Neuroscan).

High gain driven right leg circuit for dry electrode systems

This paper presents an improved driven right leg (DRL) circuit compensation together with a practical implementation. The proposed design allows to increase common mode voltage attenuation compared with the widely used dominant pole compensation while maintaining the same proven stability margin and design criteria, and requiring only a modification of its passive feedback network. A sample implementation of the proposed DRL was obtained estimating the values of interference model parameters for a dry electrode measurement system. A dominant pole compensated DRL with the same stability margin was also implemented in order to experimentally validate the proposed design against this established alternative. Measurements were conducted under both controlled and uncontrolled interference conditions. The proposed compensation experimentally demonstrated achieving a better reduction of power line harmonics, with a peak comparative improvement of around 18 dB at 50 Hz.

Design and validation of a wearable "DRL-less" EEG using a novel fully-reconfigurable architecture.

The conventional EEG system consists of a driven-right-leg (DRL) circuit, which prohibits modularization of the system. We propose a Lego-like connectable fully reconfigurable architecture of wearable EEG that can be easily customized and deployed at naturalistic settings for collecting neurological data. We have designed a novel Analog Front End (AFE) that eliminates the need for DRL while maintaining a comparable signal quality of EEG. We have prototyped this AFE for a single channel EEG, referred to as Smart Sensing Node (SSN), that senses brain signals and sends it to a Command Control Node (CCN) via an I2C bus. The AFE of each SSN (referential-montage) consists of an off-the-shelf instrumentation amplifier (gain=26), an active notch filter fc = 60Hz), 2nd-order active Butterworth low-pass filter followed by a passive low pass filter (fc = 47.5 Hz, gain = 1.61) and a passive high pass filter fc = 0.16 Hz, gain = 0.83). The filtered signals are digitized using a low-power microcontroller (MSP430F5528) with a 12-bit ADC at 512 sps, and transmitted to the CCN every 1 s at a bus rate of 100 kbps. The CCN can further transmit this data wirelessly using Bluetooth to the paired computer at a baud rate of 115.2 kbps. We have compared temporal and frequency-domain EEG signals of our system with a research-grade EEG. Results show that the proposed reconfigurable EEG captures comparable signals, and is thus promising for practical routine neurological monitoring in non-clinical settings where a flexible number of EEG channels are needed.

Performance analysis of a DRL-less AFE for battery-powered wearable EEG

The driven-right-leg (DRL) circuit has been commonly used in the wall-powered EEG systems to reduce common-mode interference in the bio-potential amplifier. However, DRL circuit imposes limitations on the number of channels preventing modular development, and its effectiveness is diminished for a newer generation of battery-powered EEG systems. We present a performance investigation of DRL-less EEG circuit by designing a single-channel EEG with a novel Analog Front End (AFE) that contains a differential amplifier followed by a high-Q active notch filter. The prototyped wearable EEG system has been validated to record neural signals with and without the DRL circuit. The time domain and frequency domain signals show that the designed AFE is not impacted significantly (maximum 4dB difference) by the DRL elimination and maintains similar signal quality. The customized EEG with and without DRL offers CMRR of 72.98dB and 71.74dB, respectively, at 60Hz (power-line interference range in the USA), whereas CMRR of 72.64dB and 71.01dB, respectively, at 20Hz (representative EEG signal range). DRL elimination allows us to envision a sensor-level modular EEG system for neural monitoring in non-clinical environments.

A Driving Right Leg Circuit (DgRL) for Improved Common Mode Rejection in Bio-Potential Acquisition Systems.

The paper presents a novel Driving Right Leg (DgRL) circuit designed to mitigate the effect of common mode signals deriving, say, from power line interferences. The DgRL drives the isolated ground of the instrumentation towards a voltage which is fixed with respect to the common mode potential on the subject, therefore minimizing common mode voltage at the input of the front-end. The paper provides an analytical derivation of the common mode rejection performances of DgRL as compared to the usual grounding circuit or Driven Right Leg (DRL) loop. DgRL is integrated in a bio-potential acquisition system to show how it can reduce the common mode signal of more than 70 dB with respect to standard patient grounding. This value is at least 30 dB higher than the reduction achievable with DRL, making DgRL suitable for single-ended front-ends, like those based on active electrodes. EEG signal acquisition is performed to show how the system can successfully cancel power line interference without any need for differential acquisition, signal post-processing or filtering.

The Stability Analysis of a Biopotential Measurement System Equipped With Driven-Right-Leg and Shield-Driver Circuits

One of the major problems encountered in biopotential recording is electromagnetic interference (EMI). The major source of EMI, in bioelectric measurement systems, is mains power, which is mainly coupled to the system through stray capacitances. The interference reduction is usually implemented using driven-right-leg (DRL) and shield-driver circuits, which are both feedback circuits. A variety of other auxiliary circuits may also be used for safety, ESD protection, and radio-frequency EMI filtering. Therefore, the system has great potential to become unstable. The general equivalent circuit of the bioelectric measurement system, which models the parasitic capacitive couplings between mains power and the system, is well known. The stability analysis of such systems is performed based on the simplified model, which is extracted from the general model by neglecting many electrical elements. In this paper, a simple and powerful approach is proposed to define the loop gain of the bioelectric measurement system explicitly and directly from the general model. Due to the nature of the proposed method, it can be implemented directly using computer-aided design software, to calculate the loop gain of the general model. Thus, the design process is improved significantly and many complex situations can be analyzed more easily. In particular, the proposed approach shows its advantages when the power line interference is coupled to the system through various capacitive paths. Another contribution of this paper is the stability analysis of isolated amplifier system, which is equipped with transconductance DRL and shield-driver circuits.

Design of Seat Mounted ECG Sensor System for Vehicle Application

The causes of deaths in traffic accidents are predominantly human factors such as careless or heedlessness driving; recently, accidents that are believed to be due to deteriorated physical conditions, such as heart attacks, have been reported. Non-contact electrocardiography(ECG) monitor for continuous ECG detection while driving is needed to reduce a number of fatal accident by human error like this. Recently there are a lot of papers to detect cardiac electricity using capacitance coupling between human body and electrode. This sensor system must be adopted appropriate high input impedance circuit and noise reduction technique as a function of source impedance value especially for a seat mounted sensor. We investigated the impedances of the intermediary materials such as a seat cover and clothing for installing vehicle use by dielectrics measurement system can measure extra-high impedance (100TΩ), and designed an effective circuit configuration for common noise resistance, considering the effect of the sitting posture according to their results. The sensor system employed the DRL (Driven Right Leg) circuit is composed of two sensor head mounted into the seat cover and a electrode mounted on a steering wheel for reducing well common mode noise in cardiac electricity frequency. We have succeeded in attaining stable detection of cardiac electrical impulses during two driving conditions, stable driving at the average speed of 70km/h and driving with frequent changes at the speed of 0-30km/h, operations of the accelerator, brake, steering wheel, and direction indicator. Language: en

A new AC-coupled amplifier for portable ECG without reference electrode

This paper proposes a single power supply operated front-end AC coupling biopotential amplifier without reference electrode for portable electrocardiogram (ECG) with dual mode input for common-mode signal and common mode DC, which can effectively improve the Common Mode Rejection Ratio (CMRR) and the common mode impedance operating on a single power supply and therefore simplifying the circuit design. The proposed circuit design has a gain of 60 dB and a single supply of +5V achieves a CMRR over 130dB at 60Hz without any trimming. Actually, in comparison between ECG without Driven Right Leg (DRL) circuit and ECG with DRL circuit, the former has a built in lead-1 ECG for better signal to noise ratio. This result is also valid for portable ECG measurement.

Low-power low-noise analog signal conditioning chip with on-chip drivers for healthcare applications

This paper presents an ultra low-noise, low-voltage complete analog signal conditioning chip, fabricated in 180nm mixed-mode CMOS process. In contrast to many already-reported biomedical chips the test chip has been fabricated in a relatively scaled technology operating at low supply voltage of 1.8V. This enables targeting energy-efficient hand-held biomedical devices where low-noise analog signal conditioning, preliminary processing and low-power wireless functionalities will be integrated on one chip. The test chip features instrumentation amplifier (INA) with chopper modulation at the first stage. The second stage is a novel area efficient spike removal filter (SRF) for attenuating coupled chopping spikes. The last stage is a differential active RC filter to adjust gain and bandwidth of the forward channel. On-chip non-overlapping clock generators with frequency of 4kHz and 8kHz for SRF stage are also implemented on the test. The chip also features a reconfigurable driven-right-leg circuit (DRLC) and shield drive amplifier (SDA) in the feedback path specifically for portable healthcare instruments. The DRLC provides the feedback either with operational amplifier (op-amp) or operational transconductance amplifier (OTA), configurable by the user. The presented test chip, for the first time, demonstrates an integrated OTA-based DRLC along with INA. INA and drivers have been designed and optimized for minimum power dissipation using a power-oriented design flow. The measurement results show that the INA achieves input-referred noise density of 28nv/Hz and DC current of 5.9μA maintaining minimum of 109dB at 1.91kHz. Measurements also show that 34dB interference reduction at 50Hz is achieved with DRLC. Low operating voltage, wide range of specifications and reconfigurable modules and interconnections enable the chip to be used for broad range of signal conditioning applications.

Modular design of a long-term portable recorder for physiological signals

A portable biomedical signal recorder is valuable for the detection of acute symptoms. By the use of an ambulatory recorder, investigators and clinicians have more opportunity to analyze paroxysmal or sudden symptoms from the long-duration recorded signals. We propose a modular recorder that contains a motherboard, modules, and an isolated RS-232 interface. The modules have been modified to measure electrogastrogram (EGG), electrocardiogram (ECG), and electroencephalogram (EEG) signals. The compact motherboard includes a microcontroller with a built-in A/D converter, secure digital (SD) memory card, and the driven-right-leg (DRL) circuit. The power consumption of the proposed recorder is less than 2 mA (6 mW). It can continuously record a lead-II ECG signal with a 10-bit resolution for 3.9 days. As a result, the design is suitable for the purpose of long-term portable recording.

Driven-right-leg circuit design.

The driven-right-leg circuit is often used with biopotential differential amplifiers to reduce common mode voltage. We analyze this circuit and show that high loop gains can cause instability. We present equations that can be used to design circuits that minimize common mode voltage without instability. We also show that it is important to consider the reduction of high-frequency interference from fluorescent lights when determining the bandwidth of the drivenright-leg circuit.