Double Heterojunction Bipolar Transistor Device Research Articles

InP DHBT-Based IC Technology for 100-Gb/s Ethernet

It is now clear that 112-Gb/s data rate is the next step in the network evolution (100-Gb/s Ethernet). Due to its high speed and high breakdown voltage, the InP double-heterojunction bipolar transistor (DHBT) technology is particularly suited for signal processing and high-speed communication systems. This paper summarizes our InP DHBT device and integrated circuit (IC) technology developed for >; 100-Gb/s-class medium scale mixed-signal ICs. Key features and issues important for the growth and manufacturing of InP DHBTs with step-graded collectors are first discussed. The molecular-beam-epitaxy-grown transistors have cut-off frequencies (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> and f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ) of over 350 GHz, current gains of ~90, and common-emitter breakdown voltages of >; 4.5 V. Using this technology, we then fabricated and succeeded in 112-Gb/s testing of multiplexers and integrated clock and data recovery/1:2 demultiplexer ICs and modules with very clear eye waveforms. Using the same technology, a distributed amplifier intended for use as a modulator driver exhibited an output voltage swing of ~2 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> . These building-block ICs combine high-speed operation with high signal quality and enable 112-Gb/s optical fiber transmission.

On the breakdown behaviors of InP/InGaAs based heterojunction bipolar transistors (HBTs)

The breakdown behaviors of InP/InGaAs single heterojunction bipolar transistor (SHBT) and double heterojunction bipolar transistor (DHBT) are studied and demonstrated. By using a composite collector structure at the base–collector heterojunction, the undesired current-blocking effect, switching, hysteresis phenomenon usually found in an InP/InGaAs conventional DHBT are not observed in our DHBT device. Experimentally, as compared with the studied SHBT, the studied DHBT reveals the enhanced breakdown voltages, lower collector leakage current I CO, and smaller electron impact ionization α. Moreover, the temperature-dependent electron impact ionization characteristics and electrical reliability for both devices are also studied. Therefore, the studied DHBT device provides the promise for millimeter-wave and power circuit applications.

Comparative study on temperature-dependent characteristics of InP∕InGaAs single- and double-heterojunction bipolar transistors

Interesting temperature-dependent characteristics of InP∕InGaAs-based single-heterojunction bipolar transistor (SHBT) and double-heterojunction bipolar transistor (DHBT) devices are compared and studied. Experimentally, both studied devices show wider collector current (IC) operation regions, with over 11 decades in magnitude of collector current (IC=10−12to10−1A). However, the studied DHBT exhibits improved breakdown characteristics [common-emitter breakdown voltage (BVCEO)=8.05V and common-base breakdown voltage (BVCBO)=11.3V] and low output conductance at high temperature. Moreover, the undesired current-blocking effect, switching, hysteresis phenomenon usually found in an InP∕InGaAs conventional DHBT are not observed in the DHBT device. As compared with the studied SHBT, the studied DHBT shows a lower multiplication factor and weaker temperature dependence. Therefore, it is known that, based on experimental results, the studied DHBT device provides the promise for low-voltage and low-power circuit app...

Characteristics of an InP ∕ InGaAs Double Heterojunction Bipolar Transistor with an InAlGaAs ∕ InP Composite Collector Structure

The characteristics of an interesting double heterojunction bipolar transistor (DHBT) with an composite collector structure were demonstrated and studied. Experimentally, the operation regime was wider than 11 decades in magnitude of collector current density . As compared to previous reports, the studied device exhibited a relatively larger Early voltage, smaller base-collector reverse saturation current, , smaller multiplication factor, M-1, and smaller electron impact ionization, α. Moreover, the device studied also showed a relatively weaker temperature dependence on the electron impact ionization, α. Consequently, the DHBT device offers promise for low-voltage and low-power circuit applications.

On the Temperature-Dependent Electron Impact Ionizations in a Step-Graded InAlGaAs∕InP Collector Double Heterojunction Bipolar Transistor

The temperature-dependent electron impact ionizations of an InP/InGaAs double heterojunction bipolar transistor (DHBT) with a step-graded InAlGaAs/InP collector structure are studied and demonstrated from 300 to 400 K. Experimentally, the multiplication factor and electron ionization coefficient are increased with increasing temperature. Furthermore, the studied device shows a lower multiplication factor and weaker temperature dependence as compared with conventional InP/InGaAs HBTs. Therefore, the studied DHBT device with a step-graded InAlGaAs/InP collector structure provides promise for low-voltage and low-power circuit applications.

InGaP/InGaAs/GaAs DHBT structural materials grown by GSMBE

Heterojunction bipolar transistor (HBT) is of great interest for the application to microwave power and analog circuits. As known, decreasing bandgap energy of the base layer in HBT can result in a smaller turn-on voltage. Using InGaAs as a base material in GaAs HBT is a possible approach to achieve the aim. In this work, a novel InGaP/InGaAs/GaAs double heterojunction bipolar transistor (DHBT) structure with an InGaAs base was designed and grown by gas source molecular beam epitaxy (GSMBE). High-quality InGaAs/GaAs hetero epi-layers and a good doping figure were obtained through optimizing the layer structure and the growth condition. The DHBT devices of a 120 μm × 120 μm emitter area were fabricated by normal process and the good DC performance was obtained. A breakdown voltage of 10 V and an offset voltage of just 0.4 V were achieved. These results indicate that the InGaP/InGaAs/GaAs DHBT is suitable for low power-dissipation and high power applications.

Development of 6.00Å graded metamorphic buffer layers and high performance In0.86Al0.14As∕In0.86Ga0.14As heterojunction bipolar transistor devices

In x Al 1 − x As ∕ In x Ga 1 − x As heterojunction bipolar transistors (HBTs) with lattice parameters ranging from 6.00to6.058Å employing the use of narrow band gap InxGa1−xAs base epitaxial layers toward InAs (0.86&amp;lt;Xln&amp;lt;1) allows for the development of high speed digital and mixed signal circuits to perform at half the power required for conventional group III-V-based HBT device technologies. However, one of the key challenges inhibiting the development of low power narrow band gap HBT device circuits is the absence of semi-insulating (SI) substrates with lattice parameters towards 6.058Å. Therefore, a metamorphic InxAl1−xAs (0.52&amp;lt;Xln&amp;lt;0.86) graded buffer layer (GBL) grown on InP by molecular beam epitaxy was investigated as a means to enable a SI template with a lattice parameter of 6.00Å. The metamorphic InxAl1−xAs GBL thickness is desired to be less than a micron in order for this approach to be compatible with the aggressive design rules of high-density transistor circuits. In this study, In0.86Al0.14As∕In0.86Ga0.14As double heterojunction bipolar transistor devices were grown on 0.90, 0.45, and 0.23μm thick InxAl1−xAs GBLs to assess the role of buffer layer thickness on both defect formation and device performance. The material characterization results for the 0.90 and 0.45μm thick buffer layers exhibited a crosshatch pattern with a surface rms roughness of 4nm and threading dislocation densities of ∼106cm−2. Excellent dc and rf characteristics from metamorphic HBT devices with submicron emitter widths were observed with low turn-on voltage of 0.45V, high current gain, low reverse junction leakage(&amp;lt;1μA), and rf peak performance in the vicinity of 150GHz. Finally, preliminary circuits (dividers and delay chains) have been designed, fabricated, and demonstrated with the 6.00Å HBT technology.

Dielectric-assisted trilayer lift-off process for improved metal definition

We have developed a simple, trilayer lift-off process for obtaining metal of various thickness while retaining good feature definition down to 1 μm, using only standard photoresist and developer, and e-beam evaporated dielectric. This process has been implemented for fabrication of high speed circuits using InP/InGaAs/InP double heterojunction bipolar transistor devices. This structure is nonplanar, with a topography of about 1.3 μm from the top of the emitter to the substrate level for interconnects. Clean edges are obtained for all of the metallization steps. Metal lift-off with our trilayer process is easily accomplished by gentle rinsing with acetone, and does not require the use of high pressure spray or any heat treatment, such as boiling in a solvent to aid lift-off. This new process has greatly improved our circuit yield.