Doping Technology Research Articles

Neutron-Transmutation Doping and Radiation Modification of Semiconductors: Current Status and Outlook

This review focuses on the development of neutron-transmutation doping (NTD) and radiation modification (RM) technologies for semiconductor materials (Si and III–V compounds) in Russia. The advantages of NTD and RM materials over growth-doped semiconductors are demonstrated. The main tasks and outlook for the development of radiation technologies based on research and commercial RBMK-reactors operated in Russia are discussed.

33.3: Invited Paper: OLEDs with Doped Transport Layers for Highly Efficient Displays

AbstractIn this paper, we discuss recent experiments which prove that evaporated organic films can be efficiently doped by coevaporation with dopant molecules. Key advantages for devices are the high conductivity and the formation of ohmic contacts despite large energetic barriers.Organic light emitting diodes (OLEDs) with electrically doped transport layers show significantly improved properties: For instance, we have achieved a brightness of 100Cd/m2 already at a voltage of 2.55V, well below previous results for undoped small‐molecule devices.The advantages of doping are even more pronounced for top‐emitting, inverted OLED structures: Due to the ohmic contacts nearly independent of the contact properties, it is possible to realize inverted top‐emitting devices with parameters comparable to standard devices. Also, it is possible to deposit ITO anodes on such devices without significant sputter damage since the active regions of the device are protected by thick doped transport layers. Our doping technology is thus a significant advantage for active‐matrix OLED displays and other displays on opaque substrate.

Experiment and Modelisation Results on Laser Thermal Processing for Ultra-Shallow Junction Formation: Influence of Laser Pulse Duration

AbstractAccording to the International Technology Roadmap for Semiconductors (ITRS), the doping technology requirements for the MOSFET source and drain regions of the future CMOS generations lead to a major challenge. A critical point of this evolution is the formation of ultra-shallow junctions(USJ) for which present technologies, based on ion implantation and rapid thermal annealing, will hardly meet the ITRS specifications. Laser Thermal Processing (LTP) has been shown to be a potential candidate to solve this fundamental problem. In the present paper, LTP experiments have been performed with two XeCl excimer lasers (λ= 308 nm) with different pulse characteristics. The first laser (Lambda Physik, Compex 102) delivers 200 mJ laser pulses with a duration of ∼25 ns. The second laser is an industrial tool (SOPRA, VEL 15) that delivers 16 J laser pulses with a duration of ∼200 ns and allows to anneal a few cm die in a single laser shot. Here we examine the influence of the pulse duration on LTP of B+ (with and without Ge+ pre-amorphization) and BF2 implanted silicon samples on the basis of real-time optical monitoring of the laser induced melting/recrystallisation process, four-point probe resistivity measurements, secondary ion mass spectrometry (SIMS) depth profiles. Experimental results are compared to finite element modelisation (FIDAP Fluent Software) that takes into account both laser pulses. The activated dopant dose, junction depth and sheet resistance, as a function of the laser fluence and shot number for both lasers, confirm the efficiency of laser processing to realize ultra-shallow and highly doped junctions as required by the future CMOS generations. Influence of the pulse duration on the USJ formation process is also discussed.

Ion doping system for low temperature poly-silicon TFT

Abstract Ion doping technology (IDT) for impurity doping is exactly one of the most important technology in the manufacturing of low temperature poly-silicon (LPS) TFT. Improvement of IDT are carried on according to more large-size glass and the requirement of LPS-TFT’s performance. IDT has become attractive very much, because it is required the application for forming source/drain, LDD region and adjusting Vth. We have developed ion doping system for large-size glass up to 730×920 mm 2 . It is focused to achieve using the sheet style (rectangular) beam and scanning glass, and currently we have developed the new system that has the function of mass separation of ion beam.

The effect of plasma exposure and annealing atmosphere on shallow junction formation using plasma source ion implantation

The effect of recoil-implantation and out-diffusion in plasma source ion implantation (PSII) on ultra-shallow p +/n junction formation has been studied. Because the wafer is directly exposed to plasma, diborane radicals in the plasma can be adsorbed on the wafer surface. The amount of recoil-implanted boron as an additive dose was measured. In the annealing process, increasing the nitrogen pressure from vacuum to 360 torr, decreased the boron out-diffusion. In addition, increasing the annealing time rendered the boron out- and in-diffusion severe. Considering recoil implantation, the wafers were implanted with a dose of 1.98×10 15 atoms/cm 2. The as-implanted wafers were subsequently spike-annealed at 1000 °C in nitrogen ambient. With implant energy of 0.5 and 1 keV, ultra-shallow junction depths of 360 and 380 Å, respectively, could be acquired. In addition, sheet resistance of 420 and 373 Ω/□ were obtained, respectively. This junction depth and sheet resistance prepared by PSII was found to satisfy next-generation memory-device doping technology.

The fabrication of advanced transistors with plasma doping

Plasma doping (PLAD) has recently been developed to become a reliable doping technology for the silicon industry. The extreme difficulty of implanting the doping species at the very low energy required by very advanced transistor technology (sub-0.1 μm) by standard ion implantation is strong motivation for device manufacturers to explore alternative doping technology, such as PLAD. In this paper, we show how we have used the PLAD technique to improve the ultra-shallow junction (USJ) process formation and the USJ characteristics. We have integrated this process into a very advanced industrial complementary metal-oxide semiconductor (CMOS) process flow. The electrical performance of p-type metal–oxide semiconductor field-effect transistors (pMOSFETs) fabricated by PLAD or ion implantation is compared. We show that the benefit of using the PLAD technique is increased as the transistors are shrunk from 0.18 down to 0.09 μm.

A novel atomic doping technology for ultra-shallow junction of SOI-MOSFETs

A novel technology to fabricate an ultra shallow source and drain extension (SDE) junctions for the future SOI-MOSFETs was investigated. In this technology, a dopant in an adsorbed layer on SOI surface diffuses into the substrate by the rapid thermal annealing (RTA) or laser annealing (LA). Arsenic adsorbed layer is formed using UHV CVD apparatus during thermal decomposition of AsH 3 on Si (001) at 550 °C with a base pressure of ∼1×10 −10 Torr. RTA and LA have been identified as preferred annealing process for shallow junction formation because it provides low thermal budget control for junctions and high level of dopant activation and defect annealing. This method made it possible to control the junction depth with low sheet resistance for the sub 0.1 μm SOI-MOSFET.

Characteristics of BF 3 plasma-doped gate/source/drain for 0.18-μm pMOSFETs

A BF 3 plasma doping (PLAD) process has been utilized in shallow source/drain (S/D) extension and source/drain/gate doping for high-performance 0.18-μm pMOSFETs. Low-resistance shallow junctions were obtained using a BF 3 PLAD system with a high-performance low-energy boron doping technology. The drive current and transconductance of pMOSFETs with plasma-doped S/D extensions are remarkably improved compared to those of BF 2 + ion-implanted devices, due to the low resistance of the S/D extension at the equivalent short-channel-effect characteristics. The fluorine ions in the BF 3 plasma-doped silicon are significantly less than in the BF 2 + implanted one. In the case of surface channel pMOSFETs with a BF 3 plasma-doped gate, the boron penetration and depletion in the gate poly were reduced because of the reduced fluorine incorporation into the gate poly compared to those of a conventional BF 2 ion-implanted gate. The improved characteristics of BF 3 plasma-doped gate enhance the drive current and gate oxide quality of pMOSFETs compared to conventional BF 2 +-implanted devices. No plasma damage was identified, and cobalt salicide formation is also very compatible with the plasma-doped p +/ n junction.

Fabrication of open stencil masks with asymmetric void ratio for the ion projection lithography space charge experiment

For the ion projection lithography space charge experiment [P.W.H. de Jager et al., J. Vac. Sci. Technol. B 17, 3098 (1999)] a suitable stencil test mask has been realized and used. This article addresses the stress engineering and fabrication process of this specific test mask with openings in the range of some few 100 nm up to some 100 μm. This large difference in stencil pattern dimensions causes reactive ion etching (RIE) lag (dependence of the etch rate on feature size and pattern density) during the fabrication process and considerable stress variations across the membrane field. The solution to these problems was by (i) implementing novel doping technologies to create variable thickness areas on the membrane serving as reinforcement and stress relief structures, and (ii) adjusting the design to feature sizes and pattern densities to the same order of magnitude for the e-beam lithography and RIE processing steps. The etching of the openings through the 3 μm thick Si membrane was done by inductively coupled plasma etching with gas chopping techniques. These methods as devoloped for this specific test mask can be used to improve the stencil mask technology in general.

History of industrial and commercial ion implantation 1906–1978

This article reviews the history of ion implantation, the genealogy of commercial implanter manufacturing companies, and identifies some of the people who have helped to make the industry what it is today. It will concentrate on the time period from 1906, when the first ion implanter was “invented,” until 1978, when ion implanters are considered to have come of age. It is clear that the ion implanter has enabled semiconductor technology to travel the International Technology Roadmap for Semiconductors, where microns of junction depths in the mid-1960’s are now in the submicron regime at the start of the new millennium. However, new shallow doping technologies that may eventually replace some implant steps are now being developed by several companies.

A novel doping technology for ultra-shallow junction fabrication: boron diffusion from boron-adsorbed layer by rapid thermal annealing

A new doping method to fabricate an ultra-shallow junction for the sub-0.1 μm pMOSFET was investigated, in which boron in an adsorbed layer diffused into Si substrate during rapid thermal annealing (RTA) at high temperature. This method made it possible to control the junction depth and doping concentration by varying quantitatively the boron coverage and to achieve a high doping efficiency due to the high surface localization of boron. The boron diffusion from an adsorbed layer with low boron coverage of below ∼0.45 ML produced extremely shallow junction (below ∼25 nm) with low sheet resistance (below ∼2.5 kΩ/sq.). This doping technique was applied to form a shallow source and drain extension region for sub-0.1 μm pMOSFET. The pMOSFET fabricated showed a fairly good performance, indicating an effective suppression of the short channel effect. This suggests that the boron atomic-layer doping is a more promising doping technique to form ultra-shallow junctions with good electrical characteristics.

Effect of Ge Pre-amorphization on Junction Characteristics for Low Energy B Implants

AbstractThe drive towards developing deep sub-micron CMOS devices places more challenges on semiconductor processing. From the standpoint of doping technology, the challenge is to achieve ultra-shallow p+/n source/drain extension junctions for PMOS. Among the various approaches being pursued to meet this challenge, pre-amorphization was used to curtail channeling of the as-implanted Boron. The effect of pre-amorphization on junction depth and junction sheet resistance in the ultra-low implant energy regime is investigated in this study. Pre-amorphization was achieved with Ge implant. B was implanted at energies of 250eV to 5keV and at a dose of 1×1015cm−2 into crystalline and pre-amorphized wafers. Both spike anneal at 1050°C and furnace anneal at 500°C to 750°C were performed after B implants. In all spike anneal cases, the pre-amorphized wafers exhibit higher sheet resistance and shallower junction depth than crystalline wafers. In all furnace anneal cases, shallower junction depth as well as lower sheet resistance can be achieved with pre-amorphized wafers. Higher pre-amorphization energy induces lower sheet resistance after both furnace and rapid thermal anneal (RTA).

III-V nitrides for electronic and UV applications

Tremendous progress has been made in recent years in the growth, doping and processing technologies of the wide bandgap semiconductors. The principal driving force behind this activity is the potential use of, for example, the 1114 nitrides in high-power, high-temperature, high-frequency electronic and optical devices resistant to radiation damage. This article reports the current state of the art for producing some selected devices from the III-V nitrides.

Evaluation of charging damage test structures for ion implantation processes

Control of charging damage is a critical issue in both current and future ion implantation systems. The development of sub-0.18 μm devices will make control of wafer charging more difficult and more important. In addition, sub-0.18 μm devices will require novel doping technologies such as ultralow energy ion implanters or plasma doping, PLAD. Here, we examine the efficacy of two, very distinct, charging monitors. They are Varian Research Center’s, VRC, antenna-MOS devices, and CHARM-2 devices. Some of the limitations and advantages of each test device are examined. In addition, results from implantations using both PLAD and a traditional beamline system are reported. It is found that the results from the VRC devices are consistent with production results while correlations with CHARM-2 results are less clear. It is shown in this article that these differences are due to the fundamental nature of the CHARM technique combined with how modern ion implanters operate. It is also noted that CHARM is well suited for examining charging damage in steady state processes, but these same concerns for the reliability of predictions based on CHARM-2 data will arise for any ion/plasma process in which the current to the surface undergoes rapid variations.

Fabrication technology of polysilicon resistors using novel mixed process for analogue CMOS applications

A new mixed doping technology, in which arsenic ions were implanted into a phosphorus-doped polysilicon film, has been developed to obtain extremely low temperature coefficient of resistance (TCR) polysilicon resistors. For the same sheet resistance (R) value of 75 /spl Omega///spl square/, the TCR of the polysilicon resistor fabricated by the proposed process was /spl sim/4.3 times lower (112 ppm//spl deg/C) than that of the conventional phosphorus-doped polysilicon resistor (479 ppm//spl deg/C).

Shallow junction doping technologies for ULSI

Abstract The fabrication of thin, sub-40 nm doped layers in Si with high concentrations of electrically active dopants and box-like profiles is a major technological challenge. Making these regions without introducing residual defects in the material and without affecting the properties of other material regions in the device is even more difficult. The need to control these properties of doping profiles in ultra-large-scale integrated (ULSI) circuits has driven the study of low energy implantation, transient enhanced diffusion (TED), and focused the search fornew shallow junction doping techniques. In this article, wereview the motivation for shallowjunctions, specific requirements for shallow junctions used in deep sub-micron dimension metal-oxide-semiconductor field effect transistors (MOSFETs), current understanding of implant and diffusion processes, and the state-of-the-art in low energy implantation and a number of alternate doping technologies, including plasma implantation, gas-immersion laser (GILD) doping, rapid vapor-phase doping (RVD), ion shower doping, and decaborane (B10H14) implantation.

Conduction and low-frequency noise in high temperature processed polycrystalline silicon thin film transistors

The performance of n- and p-channel high-temperature processed polycrystalline silicon thin-film transistors (polysilicon TFTs) has been investigated by conduction and low-frequency noise measurements. The polysilicon films were doped by boron or phosphorus ion implantation at concentrations of about 6×1016 and 3×1017 cm−3, respectively, and hydrogenated by ion implantation of hydrogen. Undoped and nonhydrogenated polysilicon films were also used for comparison. Channel length reduction due to dopant diffusion from the source and drain contacts was found to affect the transistor conduction and its associated noise. Low-frequency noise measurements indicate that the noise power spectral density of the drain current is mainly due to carrier number with correlated mobility fluctuation. The experimental data reveal the presence of exponential band tails in both n- and p-channel hydrogenated undoped polysilicon TFTs. In nonhydrogenated boron doped n-channel devices, high density of band tails and deep levels are present. Hydrogenation removes the deep levels and passivates significantly the band tails. In both hydrogenated and nonhydrogenated phosphorus doped p-channel devices, the density of traps is very high resulting in pinning of the Fermi level. The results indicate the necessity for improvement of the doping technology.

Boron doping of silicon by plasma source ion implantation

We have performed an extensive analysis of the structural and electrical characteristics of 150 and 200 mm Si wafers boron doped by low-energy (−0.5 to −5 kV) plasma source ion implantation (PSII) from a BF 3 plasma and subsequent rapid thermal annealing. The formation of shallow junctions (60 nm or less) required for 0.18 μm device geometries has been verified by secondary ion mass spectrometry measurements and electrical characterization. Rutherford backscattering spectrometry and high resolution electron microscopy analyses have shown a thin (≤5 nm) amorphous region in the as-implanted silicon; no evidence of dislocations or other extended defects has been observed. After annealing, the implanted silicon appears to be perfectly crystalline. Good doping uniformity across a wafer and good wafer-to-wafer repeatability have been observed in the PSII process. Excellent device characteristics (threshold voltage rolloffs, junction leakage, etc.) have been obtained from MOSFET structures fabricated using this doping technology. All results suggest that boron doping of silicon by PSII results in materials and device characteristics that are suitable for advanced device fabrication.

Multiple Sb ion implantation for deep-submicron pMOS channel doping

We propose a channel doping technology for pMOSFET's in which Sb is multiply ion implanted to produce a uniform doping profile in the region deeper than the minimum projected range of the multiple ion implantation. We derive a threshold voltage model and show how to realize this uniform doping profile, which is verified with experimental data. We study the short-channel effect of this device using a two-dimensional (2-D) device simulator, and show that this transistor can readily operate with a gate length of down to 0.1 /spl mu/m.

Metalorganic vapor phase epitaxy of II–VI materials for visible light emitters

The metalorganic vapor phase epitaxial (MOVPE) growth of II–VI compounds for visible light-emitting structures is complicated by a variety of growth chemistry, defect, and doping issues. While MOVPE has been successful in the growth of individual layers required in such structures, MOVPE has lagged behind molecular beam epitaxy (MBE) in the formation of working devices. The choice of the specific heterojunction systems utilized in the device structure can have a strong impact on the utility of MOVPE in the eventual formation of II–VI visible light emitters. The current stage of development of MOVPE for these applications is reviewed in the paper, with emphasis on the development of suitable growth and doping technologies.