Domain-specific Customization Research Articles

Learning Malicious Circuits in FPGA Bitstreams

Computing platforms are integrating field-programmable gate arrays (FPGAs) to support domain-specific customization. Multiple tenants can share these FPGAs by configuring them at runtime. However, attackers can abuse this capability by programming the FPGAs with malicious functions. A malicious configuration bitstream can launch denial of service, overheat the FPGA, leak sensitive information via side channels, enable remote monitoring, and launch voltage and timing attacks. We consider time-based multitenancy, where multiple tenants use the FPGA at different time intervals and not at the same time. We propose a defense based on machine learning (ML) algorithms to detect bitstreams of malicious circuits and malicious circuits mixed with legitimate circuits by analyzing the static features extracted from FPGA bitstreams. The proposed approach can help detect malicious bitstreams without the need for reverse engineering of the bitstream or having access to the design netlist. Our results on Xilinx FPGAs indicate that supervised classifiers may identify malicious bitstreams representing ring-oscillator circuits with a true-positive rate (TPR) of 100% and a false-positive rate (FPR) of only 4%. In addition, for the extremely difficult problem of detecting malicious bitstreams embedded in legitimate bitstreams, a pipeline of a random forest and a support vector machine classifiers trained on subarrays of bitstreams can help detect bitstreams of malicious circuits embedded in legitimate designs with TPR of 95.5% and FPR of 30.4%.

RISC-V Instruction Set Architecture Extensions: A Survey

RISC-V is an open-source and royalty-free instruction set architecture (ISA), which opens up a new era of processor innovation. RISC-V has the characteristics of modularization and extensibility, and explicitly supports domain-specific custom extensions. Nowadays, RISC-V is a popular ISA for embedded processors. However, there is still a gap between the capabilities of RISC-V and the requirements of various emerging computing scenarios (e.g., artificial intelligence, cloud computing). Recently, the RISC-V standards organization has continuously introduced new ISA extensions to meet the needs of advanced computing. There are also a variety of novel research proposed customized extensions of RISC-V for certain scenarios. As far as we know, there is a lack of a survey to systematically present the research progress of RISC-V ISA extensions. The goal of this paper is to provide a comprehensive survey on existing works about RISC-V ISA extensions. First, the application scenarios of RISC-V are introduced, and the requirements for ISA extensions are analyzed. Then, we survey the progress of official RISC-V ISA extension specification and recent research on RISC-V ISA extension. Finally, we highlight some possible future research opportunities on the RISC-V ISA extension.

Renovated XTEA Encoder Architecture-Based Lightweight Mutual Authentication Protocol for RFID and Green Wireless Sensor Network Applications

Wireless sensor networks find applications everywhere in day to day activities right from attendance entry systems to healthcare monitoring systems. The evolution of the Internet of Things (IoT) as the Internet of Everything (IoET) makes the wireless sensor network omnipresent and increases the use of Radio Frequency Identification (RFID) for the proper identification of devices and sensor nodes which are mostly battery operated. As technology evolves, security threats also increase rapidly. This mandates a strong and energy-efficient green solution. This work attempted to address these issues by effectively deploying the lightweight encryption scheme called Extended Tiny Encryption Algorithm (XTEA). Though the XTEA is lightweight and famous, it is commonly known for various attacks. Our work patches the security threats in the XTEA by applying domain-specific customization, random number utilization, and undisclosed key renewal techniques. Two custom Renovated XTEA Mutual Authentication Protocol (RXMAP) encoder architectures, namely, RXMAP-1 and RXMAP-2, are proposed based on the replacement of accurate computational blocks with approximate blocks. The proposed RXMAP protocol is evaluated for its computational and storage overhead and verified against various security threats using BAN logic formal verification and informal verification. The proposed encoder architectures are simulated for functional verification, and ASIC implementation is done with a 132 nm process node. ASIC implementation results show that the proposed designs RXMAP-1 and RXMAP-2 occupy 53.11% and 53.31% lesser area compared to XTEA I and 52.97% and 53.18% lesser area compared to XTEA II implementation. The total power consumed by the proposed encoder architectures RXMAP-1 and RXMAP-2 is 68.76% and 71.64% lesser than XTEA II implementation, respectively, while maintaining the equal throughput.

Multilayer document model for semantic document management services

PurposeThe purpose of this paper is to identify the benefits of an approach in which document management systems (DMSs) are based on a formal and explicit document model, primarily in terms of facilitating domain-specific customization.Design/methodology/approachWithin this paper, a generic document model is proposed. The model consists of two layers. A general purpose layer, which represents common features of the documents, and a domain-specific layer, modeling properties particular to application domain. The general purpose layer is based on ISO 82045, providing high degree of interoperability with other systems developed with respect to this set of standard.FindingsSplitting document model into the layers enables DMSs to be tailored for each particular domain of application, depending on the general purpose layer. The existence of domain-specific layer allows documents to be interpreted differently in different domains of application.Practical implicationsIn order to enable customization of DMS for a particular domain, the implementation of domain-specific document layer is required. Also, the proposed model does not explicitly deal with document dynamics.Originality/valueThe proposed document ontology is general enough to provide the representation of documents not depending on a specific scope of application, yet flexible enough to enable extensions through which domain-specific document features can be expressed. The separation of document model enables development of core DMS offering services relying explicitly on the general purpose layer on one hand, as well as domain-specific customization of DMS on the other.

The Materials Data Facility: Data Services to Advance Materials Science Research

With increasingly strict data management requirements from funding agencies and institutions, expanding focus on the challenges of research replicability, and growing data sizes and heterogeneity, new data needs are emerging in the materials community. The materials data facility (MDF) operates two cloud-hosted services, data publication and data discovery, with features to promote open data sharing, self-service data publication and curation, and encourage data reuse, layered with powerful data discovery tools. The data publication service simplifies the process of copying data to a secure storage location, assigning data a citable persistent identifier, and recording custom (e.g., material, technique, or instrument specific) and automatically-extracted metadata in a registry while the data discovery service will provide advanced search capabilities (e.g., faceting, free text range querying, and full text search) against the registered data and metadata. The MDF services empower individual researchers, research projects, and institutions to (I) publish research datasets, regardless of size, from local storage, institutional data stores, or cloud storage, without involvement of third-party publishers; (II) build, share, and enforce extensible domain-specific custom metadata schemas; (III) interact with published data and metadata via representational state transfer (REST) application program interfaces (APIs) to facilitate automation, analysis, and feedback; and (IV) access a data discovery model that allows researchers to search, interrogate, and eventually build on existing published data. We describe MDF’s design, current status, and future plans.

CDL: an extensible constraints framework for model-based development

The model-based paradigm has progressed from scientific research to industrial use. Great effort has gone into providing elaborate meta-models for different application domains, such as aviation or automotive. Instance models have to fulfil certain criteria originating from different areas, such as the development process or legal requirements, and more. These criteria are usually defined in the beginning of the development process, and often statically implemented in the tool editor. In the constraint definition framework and language CDL presented here, the Tool Smith can provide reusable constraints for a domain expert, who creates a custom constraints set in turn. The modeller uses these domain-specific custom constraints and applies them to the instance model he develops. Furthermore, in CDL, constraints can be augmented with actions supporting the modeller to repair defects on the model. The contribution of this work is an extensible constraint framework and language, supporting the model-based development process. A case study from the automotive domain is described, showing the feasibility of the approach.

Accelerating an application domain with specialized functional units

Hardware specialization has received renewed interest recently as chips are hitting power limits. Chip designers of traditional processor architectures have primarily focused on general-purpose computing, partially due to time-to-market pressure and simpler design processes. But new power limits require some chip specialization. Although hardware configured for a specific application yields large speedups for low-power dissipation, its design is more complex and less reusable. We instead explore domain-based specialization, a scalable approach that balances hardware’s reusability and performance efficiency. We focus on specialization using customized compute units that accelerate particular operations. In this article, we develop automatic techniques to identify code sequences from different applications within a domain that can be targeted to a new custom instruction that will be run inside a configurable specialized functional unit (SFU). We demonstrate that using a canonical representation of computations finds more common code sequences among applications that can be mapped to the same custom instruction, leading to larger speedups while specializing a smaller core area than previous pattern-matching techniques. We also propose new heuristics to narrow the search space of domain-specific custom instructions, finding those that achieve the best performance across applications. We estimate the overall performance achieved with our automatic techniques using hardware models on a set of nine media benchmarks, showing that when limiting the core area devoted to specialization, the SFU customization with the largest speedups includes both application- and domain-specific custom instructions. We demonstrate that exploring domain-specific hardware acceleration is key to continued computing system performance improvements.

Accelerating an application domain with specialized functional units

Hardware specialization has received renewed interest recently as chips are hitting power limits. Chip designers of traditional processor architectures have primarily focused on general-purpose computing, partially due to time-to-market pressure and simpler design processes. But new power limits require some chip specialization. Although hardware configured for a specific application yields large speedups for low-power dissipation, its design is more complex and less reusable. We instead explore domain-based specialization, a scalable approach that balances hardware’s reusability and performance efficiency. We focus on specialization using customized compute units that accelerate particular operations. In this article, we develop automatic techniques to identify code sequences from different applications within a domain that can be targeted to a new custom instruction that will be run inside a configurable specialized functional unit (SFU). We demonstrate that using a canonical representation of computations finds more common code sequences among applications that can be mapped to the same custom instruction, leading to larger speedups while specializing a smaller core area than previous pattern-matching techniques. We also propose new heuristics to narrow the search space of domain-specific custom instructions, finding those that achieve the best performance across applications. We estimate the overall performance achieved with our automatic techniques using hardware models on a set of nine media benchmarks, showing that when limiting the core area devoted to specialization, the SFU customization with the largest speedups includes both application- and domain-specific custom instructions. We demonstrate that exploring domain-specific hardware acceleration is key to continued computing system performance improvements.

Domain Specific Custom Search for Quicker Information Retrieval

Recently researchers are using Google scholar widely to find out the research articles and the relevant experts in their domain. But it is unable to find out all experts in a relevant research area from a specific country by a quick search. Basically the custom search technique is not available in the current Google scholar’s setup. The authors have combined custom search with domain-specific search and named as domain specific custom search in this research. First time this research introduces a domain specific custom search technique using new search methodology called n-paged-m-items partial crawling algorithm. This algorithm is a real-time faster crawling algorithm due to the partial crawling technique. It does not store anything in the database, which can be shown later on to the user. The proposed algorithm is implemented on a new domain scholar.google.com to find out the scholars or experts quickly. Finally the authors observe the better performance of the proposed algorithm comparing with Google scholar.

SAT based enforcement of domotic effects in smart environments

The emergence of economically viable and efficient sensor technology provided impetus to the development of smart devices (or appliances). Modern smart environments are equipped with a multitude of smart devices and sensors, aimed at delivering intelligent services to the users of smart environments. The presence of these diverse smart devices has raised a major problem of managing environments. A rising solution to the problem is the modeling of user goals and intentions, and then interacting with the environments using user defined goals. ‘domotic effects’ is a user goal modeling framework, which provides ambient intelligence (AmI) designers and integrators with an abstract layer that enables the definition of generic goals in a smart environment, in a declarative way, which can be used to design and develop intelligent applications. The high-level nature of domotic effects also allows the residents to program their personal space as they see fit: they can define different achievement criteria for a particular generic goal, e.g., by defining a combination of devices having some particular states, by using domain-specific custom operators. This paper describes an approach for the automatic enforcement of domotic effects in case of the Boolean application domain, suitable for intelligent monitoring and control in domotic environments. Effect enforcement is the ability to determine device configurations that can achieve a set of generic goals (domotic effects). The paper also presents an architecture to implement the enforcement of Boolean domotic effects, and results obtained from carried out experiments prove the feasibility of the proposed approach and highlight the responsiveness of the implemented effect enforcement architecture.

Customizable Domain-Specific Computing

To meet computing needs and overcome power density limitations, the computing industry has entered the era of parallelization. However, highly parallel, general-purpose computing systems face serious challenges in terms of performance, energy, heat dissipation, space, and cost. We believe that there is significant opportunity to look beyond parallelization and focus on domain-specific customization to bring significant power-performance efficiency improvement.