Dislocation-free Areas Research Articles

(Invited) Application of Synchrotron X-Ray Topography Techniques to the Analysis of Defect Microstructures in Bulk GaN Substrates and Epilayers for Power Devices

Wide bandgap semiconductor gallium nitride (GaN), along with silicon carbide (SiC) are replacing silicon materials in the applications for power electronic devices. While SiC-based power technologies are based on bulk SiC substrates, GaN-based power technologies have until recently been based on GaN layers grown on foreign substrates such as sapphire, SiC and Si substrates. To achieve the full potential of GaN power devices, devices on bulk GaN substrates are desirable. In this review, the use of synchrotron X-ray topography techniques to evaluate defects and strain in bulk GaN substrates for vertical device development is presented. Ray tracing simulations is shown to effectively identify the Burgers vectors of all dislocations on X-ray topographs from GaN materials. Ammonothermal-grown GaN substrate wafers show the best quality among all the wafers. These wafers, which are free of basal plane dislocations (BPDs), have low curvature and threading mixed dislocations (TMDs) dominant among the TDs. However, certain ammonothermal substrates contain growth sectors with different impurity concentrations that are likely inherited from prior seed expansion growth runs. Patterned hydride vapor phase epitaxy (HVPE) GaN reveal a starkly heterogeneous distribution of dislocations with large areas containing low threading dislocation densities in between a grid of strain centers with higher threading dislocation densities and BPDs. These substrates also contain growth sector boundaries separating core regions growing in <11-22> directions and surrounding regions growing along [0001]. HVPE GaN substrates are characterized by high lattice distortion and dislocation densities of the order of 105-106 cm-2, which is much higher than 103-104 cm-2 of ammonothermal samples and dislocation-free areas in the patterned HVPE samples. Epitaxial growth and other processes involving heat treatment (including annealing) does not nucleate new defects but can result in interactions of dislocations (threading screw dislocations(TSDs)/threading mixed dislocations (TMDs)/threading edge dislocations (TEDs)) with point defects leading to changes in dislocation configurations. Mg-ion implantation for p-type doping does not change the distribution of dislocation but introduces lattice damage. By Rocking curve Analysis by Dynamical Simulation (RADS) analysis of X-ray rocking curves, the depth profile of strain can be obtained and correlated with doping profile. During annealing the implanted samples to heal lattice damage and activate the Mg ions, proper capping is necessary to limit loss of matter and introduction of additional lattice distortion. However, high pressure annealing has been shown to eliminate the need for capping. The effect on microstructure from other selectively area doping techniques such as etch and regrowth, diffusion and neutron transmutation will also be discussed.

Conduction mechanism of Schottky contacts fabricated on etch pits originating from single threading dislocation in a highly Si-doped HVPE GaN substrate

This paper reports the relationship between a single dislocation structure and current leakage mechanism observed in a Pt/n+-GaN Schottky contacts with the combined use of transmission electron microscopy (TEM) and conductive atomic force microscopy (C-AFM). The contacts were fabricated on a substrate grown by hydride vapor phase epitaxy. TEM analysis clarified that large- and small-size etch pits are attributed to mixed/screw and edge dislocations, respectively. Schottky contacts formed on the surfaces of large and small etch pits (L-EPC, S-EPC), a dislocation-free flat area (FLAT), and a Schottky barrier diode with a diameter of 50 μm (SBD) were prepared and their temperature-dependent current-voltage characteristics were measured using C-AFM. Analysis of the forward bias characteristics revealed that the Schottky barrier height increased and the ideality factor approached unity with increasing temperature. Such temperature dependence of the barrier height was well explained by barrier inhomogeneity at the metal/semiconductor interface. From the analysis of the reverse bias characteristics, we found that field emission (FE) currents caused by the high donor concentration of the sample were the dominant conduction mechanism for S-EPC and FLAT. On the other hand, for L-EPC, the FE currents were overlapped by Poole-Frenkel emission (PFE) currents. For SBD, the leakage currents were successfully explained by the FE and thermionic field emission (TFE) mechanisms by assuming dislocation regions with a lowered barrier height. These findings suggest that mixed dislocations are associated with PFE and lower the Schottky barrier.

Lateral Selective SiGe Growth for Local Dislocation-Free SiGe-on-Insulator Virtual Substrate Fabrication

Dislocation free local SiGe-on-insulator (SGOI) virtual substrate is fabricated using lateral selective SiGe growth by reduced pressure chemical vapor deposition. The lateral selective SiGe growth is performed around a ∼1.25 μm square Si (001) pillar in a cavity formed by HCl vapor phase etching of Si at 850 °C from side of SiO2/Si mesa structure on buried oxide. Smooth root mean square roughness of SiGe surface of 0.14 nm, which is determined by interface roughness between the sacrificially etched Si and the SiO2 cap, is obtained. Uniform Ge content of ∼40% in the laterally grown SiGe is observed. In the Si pillar, tensile strain of ∼0.65% is found which could be due to thermal expansion difference between SiO2 and Si. In the SiGe, tensile strain of ∼1.4% along 〈010〉 direction, which is higher compared to that along 〈110〉 direction, is observed. The tensile strain is induced from both [110] and [−110] directions. Threading dislocations in the SiGe are located only ∼400 nm from Si pillar and stacking faults are running towards 〈110〉 directions, resulting in the formation of a wide dislocation-free area in SiGe along 〈010〉 due to horizontal aspect ratio trapping.

(G03 - Best Student Presentation Award) Lateral Selective SiGe Growth for Dislocation-Free Virtual Substrate Fabrication

SiGe virtual substrates (VS) having low-surface roughness with less defects are essential for fabricating emerging quantum devices such as qubits. Various techniques to grow VS are reported e.g. conventional graded buffers (1,2) and reverse graded buffers (3). However, these methods require several micrometer-thick buffer layers, having threading dislocations (TDs) network and develop crosshatch patterns resulting in high surface roughness, needing chemical mechanical polishing for planarization. In our previous work, lateral-selective Ge growth (4) was performed in a cavity formed by selective vapor phase etching (VPE) of Si from side of mesa-patterned SiO2 /Si structures fabricated on buried oxide (BOX) to create smooth and dislocation-free local Ge by horizontal aspect ratio trapping (ART). In this work, we demonstrate lateral-selective SiGe growth to realize smooth and dislocation-free local SiGe VS by lateral ART and discuss its surface morphology, strain and dislocations.Lateral-selective SiGe growth is done in a reduced-pressure chemical vapor deposition (RPCVD) system. Thermally oxidized silicon-on-insulator (SOI) wafers with 300 nm SiO2/300 nm Si/2 μm BOX are used. For the sample preparation, 6.3 μm square checkerboard SiO2/Si mesa structure with [110] oriented sidewalls is fabricated by photolithography patterning and reactive ion etching. After standard RCA cleaning followed by HF dip, the wafer is loaded into RPCVD reactor and pre-baked at 850oC in H2 to remove residual oxide. Thereafter, lateral HCl VPE of Si is performed at 850oC from side of mesa. Si pillar remains at center of the mesa. Then, SiGe is selectively deposited in the cavity around the Si pillar using a SiH2Cl2-GeH4-HCl gas mixture at 750oC. Finally, the top SiO2 is removed by HF. Atomic force microscopy (AFM) is used to measure the surface roughness. Energy dispersive X-Ray spectroscopy (EDX) is used for measuring Ge content distribution in SiGe. Micro-Raman spectroscopy is used to analyze strain distribution in Si and SiGe. Nano-beam diffraction (NBD) is employed for estimating the relative change of in- and out-of-plane SiGe lattice parameters. Plan-view transmission electron microscopy (TEM) is used for imaging dislocations.Fig. 1 shows the AFM image for surface morphology of lateral-selective Si0.6Ge0.4 around the Si pillar. SiGe has root mean square roughness of ~0.16 nm, which is similar to blanket Si(001) (~0.14 nm), because the SiGe surface roughness is determined by interface roughness of top SiO2 and sacrificially etched Si. Uniform Ge content of ~40% in SiGe layer is observed by EDX analysis (Fig. 2). In the Si pillar part of Fig. 3, relative uniform tensile-strain of ~0.4% is observed. Since Si is negligibly strained in unpatterned area of SOI (taken as reference), hence during HCl VPE at 850oC, Si pillar/SiO2 interface could slip by higher thermal expansion of Si as interface decreases. Tensile-strain in Si pillar could be formed during cooling process. Ideally, ~1.68% lattice mismatch strain should exist in fully-relaxed ~40% SiGe on Si. However, higher tensile-strain (~2.5%) in SiGe is observed at corners along [010]. To clarify the reason of higher strain at corners, in- and out-of-plane SiGe lattice parameters near Si pillar (as marked in Fig 4(a)) are investigated by NBD. Higher in-plane lattice parameter in [110] is observed in the edge part of the SiGe lamella as compared to the center part (Fig. 4(b)). However, out-of-plane lattice parameter in [001] is homogeneous across entire SiGe (Fig. 4(c)). Because SiGe has uniform Ge concentration as shown in Fig. 2, higher lattice parameter in the edge part of Fig. 4(b) is caused by strain difference. This is because SiGe lamella edge (away from Si pillar) is more relaxed as compared to SiGe lamella center (beside Si pillar) which is confirmed by vertically grown ~700 nm 40% SiGe on blanket Si(110). Symmetric strain distribution does also exist in 90° rotated direction. Therefore, the tensile-strain in [010] is induced from both [110] and [-110]. In Fig. 5, stacking faults of SiGe on (111) plane are observed along [110] and [1-10]. TDs are present along [111], terminated by top SiO2/BOX and located up to first ~400 nm from Si while misfit dislocations are at Si/SiGe interface. Wide dislocation-free area in SiGe is present along [010].This technique enables dislocation-free local SiGe-on-insulator substrate fabrication which can be applied for thin and high quality VS for the quantum devices. References E. A. Fitzgerald et al., J. Appl. Phys., 63, 693 (1988).E. A. Fitzgerald et al., Appl. Phys. Lett., 59, 811 (1991).V. A. Shah et al., Appl. Phys. Lett., 93, 192103 (2008).Y. Yamamoto et al., ECS J. of Solid State Sci. and Technol., 3, 353 (2014). Figure 1

Lateral Selective SiGe Growth for Dislocation-Free Virtual Substrate Fabrication

Dislocation free local SiGe-on-insulator virtual substrate is fabricated using lateral selective SiGe growth by reduced pressure chemical vapor deposition. The lateral selective SiGe growth is performed around ~1.25 µm square Si (001) pillar in a cavity formed by HCl vapor phase etching of Si at 850 °C from side of SiO2 / Si mesa structure on buried oxide. Smooth root mean square roughness of SiGe surface of 0.14 nm, which is determined by interface roughness between the sacrificially etched Si and the SiO2 cap, is obtained. Uniform Ge content of ~40% in the laterally grown SiGe is observed. In the Si pillar, tensile strain of ~0.65% is found which could be due to thermal expansion difference between SiO2 and Si. In the SiGe, tensile strain of ~1.4% along <010> direction, which is higher compared to that along <110> direction, is observed. The tensile strain is induced from both [110] and [-110] directions. Threading dislocations in the SiGe are located only ~400 nm from Si pillar and stacking faults are running towards <110> directions, resulting in wide dislocation-free area formation in SiGe along <010> due to horizontal aspect ratio trapping.

X-ray Topography Characterization of GaN Substrates Used for Power Electronic Devices

Gallium nitride (GaN) substrates grown by different methods were characterized by high-resolution x-ray diffraction and synchrotron x-ray topography. Using the monochromatic beam in the grazing incidence geometry, high-resolution x-ray topographs reveal the various dislocation types present. Dislocation contrasts were correlated with ray-tracing simulation results successfully so that the Burgers vectors of the dislocations could be determined. Ammonothermal-grown GaN substrate wafers show the best quality among all the wafers. These wafers, which are free of basal plane dislocations (BPDs) have threading mixed dislocations (TMDs) dominant among the threading dislocations (TDs). Images of patterned hydride vapor phase epitaxy (HVPE) GaN reveal a starkly heterogeneous distribution of dislocations with large areas containing low threading dislocation densities in between a grid of strain centers with higher threading dislocation densities and BPDs. The strain level of regular HVPE GaN substrates is very high, and the dislocation density is around 105–106 cm−2, which is much higher than 104 cm−2 of ammonothermal samples and dislocation-free areas in the patterned HVPE samples.

In-plane anisotropy in the direction of the dislocation bending in α-Ga2O3 grown by epitaxial lateral overgrowth

Threading dislocations in α-Ga2O3 grown by epitaxial lateral overgrowth (ELO) were observed by using atomic force microscopy after a surface etching using 10 wt% KOH aqueous solution heated at 60 °C. The ELO α-Ga2O3 was characterized by an in-plane anisotropy in the direction of the dislocation bending as followings: the dislocations in ELO α-Ga2O3 bend in the direction of α-Ga2O3, while the dislocation-free areas expand in the direction from the positions of windows. The anisotropy is an important factor to control the dislocations in α-Ga2O3 and to optimize the ELO of α-Ga2O3.

Analysis of Dislocations in CdZnTe Epitaxial Film with Kelvin Probe and Conductive Atomic Force Microscopy

The correlation between threading dislocations and leakage current in a CdZnTe(001)/GaAs epilayer grown by close-spaced sublimation was studied using scanning electron microscopy, Kelvin probe force microscopy, conductive atomic force microscopy (C-AFM) and current–voltage (I–V) systems. The electrostatic potential differences between the charged dislocations and the CZT epitaxial film were found to be lower than those in bulk CZT crystal. C-AFM tests in the CZT epitaxial film under forward bias demonstrated that dislocations guided the high current leakage paths. The leakage current at dislocation sites was found to be two orders higher than that at dislocation-free areas with an applied bias of 5 V. The rapid increase in leakage current under applied bias in the range of 3.5–7.5 V was associated with the Poole–Frenkel effect, where high leakage current arises from the high density of trapped carriers escaping from the traps segregated around dislocations.

Novel methods for dislocation density estimation in highly compacted tangles

Dislocation lines are usually observed in thin foil images obtained by transmission electron microscopy (TEM). Based on conventional methods involving stereological relationship and line counting, dislocation densities have been calculated in distinct materials, mostly in plastically deformed metals and alloys. However, under certain plastic deformation conditions, such as those associated with dynamic strain aging (DSA), dislocation arrangements may develop highly compact tangles. Inside DSA dense tangles, the individual identification of lines for stereological counting becomes impracticable. In the present work, two novel methods to estimate dislocation densities in highly compact tangles are proposed. The first method is exemplified in TEM images of cells and banded walls substructure of an austenitic stainless steel plastically deformed under DSA condition. In a second method, the average dislocation density of such TEM images is proposed to be calculated by the proportional sum of area fractions multiplied by corresponding dislocation densities of visible dislocation and highly compact tangle areas as well as dislocation-free area.

Dislocation distribution and patterning in [formula omitted]-axis Mg single crystals during early compression

Dislocation distribution and patterning during the onset of uniaxial compression of 〈a〉-axis Mg single crystals was investigated by transmission electron microscopy (TEM) and etch-pitting technique. The crystals deform by dislocation glide using basal and nonbasal slip systems. The high hardening rate Θ ≈E/50−E/30 indicates the effective forest hardening by nonbasal dislocations observed in the microstructure. Distribution of dislocation etch-pits shows the polygonized arrangement of dislocations along the basal plane. TEM observations reveal the heterogeneous structure of dislocations clustered in dense arrays surrounded by dislocation free areas. Dislocation arrangements that are building blocks of the microstructure include monopoles, dipoles, multipoles, ribbons, walls, bundles, and braids. The patterns are characterized with respect to their dislocation content and spatial distribution. They fall into the category of low energy structures, which favorite the configurations reducing the elastic energy of the arrays. The degree of interactions between basal and 〈c+a〉 slip systems is attributed to playing a key role in the formation of observed dislocation arrangements.

Crystalline quality distributions of the type IIa diamond substrate and the CVD diamond layer processed by chemical mechanical polishing using a SiO2 wheel

We have grown a high-quality type-IIa single-crystal diamond substrate, which had a large (001) growth sector with a dislocation-free area of 3.5 × 3.5 mm2, and strong free exciton (FE) emissions were observed by cathodoluminescence (CL), while dislocations, stacking faults, and defect-related CL emissions at 340 and 400 nm were observed in the (111) growth sector. After CVD growth on the off-angled type-IIa substrate processed by SiO2 chemical mechanical polishing, the intensity of the FE emission became 3 times higher and the electronic quality became more homogeneous, indicating that a high-quality CVD layer was successfully grown and the lateral growth eliminated the evolution of point defects in the substrate. On the other hand, the CVD layer on the (111) growth sector had hillocks and defect-related CL emissions, indicating that the stacking faults have a highly negative effect on the electronic quality of the CVD layer compared with the dislocations.

Evolution of microstructure and mechanical properties of Ti/TiB metal-matrix composite during isothermal multiaxial forging

Mechanical behavior and microstructure evolution of a Ti/TiB metal-matrix composite during multiaxial forging (MAF) at 700 and 850 °C and a strain rate 10−3 s−1 were studied. The composite was produced via in-situ 3Ti + TiB2→2Ti+2TiB reaction during spark plasma sintering at 1000 °C. Mechanical behavior in terms of aggregated σ-Σε curves during MAF at both temperatures demonstrated a pronounced softening following by a steady-like flow stage. Microstructure evolution during MAF at both temperatures was associated with (i) dynamic recrystallization of the titanium matrix and the formation of dislocation-free areas of ∼1 μm in diameter and (ii) shortening of TiB whiskers by a factor of ∼3. MAF at 700 and 850 °C to cumulative strain ∼5.2 resulted in a considerable increase in the low-temperature ductility without substantial loss in strength. Contributions of different strengthening mechanisms into the overall strength of the Ti/TiB metal–matrix composite were discussed.

Schottky performance variation on r-plane and c-plane of GaN micro truncated-pyramid grown by selective area MOCVD

The electric properties of Pt Schottky contacts on semipolar r-plane and polar c-plane of GaN micro truncated-pyramid are compared. The Schottky diodes of the inclined r-plane sample illustrate a relatively inferior rectified performance than that of the top c-plane GaN in term of the lower Schottky barrier heights, larger ideality factor and reverse leakage current. By depositing Pt metal on the dislocation-free area of the top of GaN micro pyramid, the Schottky performance of r-plane GaN can be slightly improved, but still shows much larger reverse leakage current than that of c-plane GaN. It is found that polarization-related surface states and incorporation of donor impurities, rather than dislocation, should mainly contribute to this remarkable electric discrepancy of the planes.

Growth of aluminum nitride on flat and patterned Si (111) by high temperature halide CVD

The aim of the present study is to evaluate the possibility of improving crystalline quality of AlN deposited on Si (111) substrates by implementation of substrate patterning. Growth on flat Si (111) substrates was conducted to investigate influence of deposition parameters on the growth behavior and quality of resulting AlN films. This investigation showed that SiC buffer layer is required to suppress disorientation of the AlN layer, optimum growth temperature is about 1260°C, Al-rich conditions favor more rapid coalescence of the nucleation island while N-rich conditions lead to the formation of a smooth surface. Transposition of the resulting AlN growth recipe on to patterned Si (111) substrates revealed reduction of the stress in AlN, bending of the threading dislocations and formation of a dislocation free area in the overgrown region. For the formation of a continuous layer on silicon pillars, we propose a novel technique based on the decrease of the mean free path of gaseous species leading to localized growth of AlN on the top of the pillars. Such continuous layer exhibit lower crack density compared to that on a flat substrate. Thus, the growth of AlN on pillar patterned Si substrate is seen to be a promising way for the further improvement of the AlN films quality.

Trials of Solution Growth of Dislocation-Free 4H-SiC Bulk Crystals

Solution growth of high-quality 4H-SiC bulk crystals has been performed by using Si-Cr based melt at 2000°C. Through enlargement of crystal diameter which is controlled by meniscus height during growth, dislocation free area has been successfully obtained on the periphery of the crystal. However, the threading dislocations in the seed crystal have penetrated into the grown crystal and have been located around the center of the crystal. To reduce dislocation density in the grown crystals, we have used threading-dislocation-free seedcrystals prepared by solution growth on (1-100). The solution growth on the seed crystal sliced from the (1-100) crystal has resulted in very low dislocation density of grown crystals. In an area of 16 mm2 for the growth surface, no dislocation has been detected.

Single‐crystal sapphire microstructure for high‐resolution synchrotron X‐ray monochromators page 290–298 by Raphaël P. Hermann et al.

Hard X-ray monochromatization with 10−7 relative resolution is possible in Bragg back reflection from dislocation free areas of near perfect Al2O3 single crystals. The background topograph reveals the microstructure in an Al2O3 single crystal with a dislocation density ∼100 cm−2.

Experimental determination of dependence of vertical growth rate on surface supersaturation in GaAs(001) microchannel epitaxy and growth optimization

Surface supersaturation in microchannel epitaxy (MCE) by liquid-phase epitaxy is a key parameter to control the width-to-thickness ratio (aspect ratio), which determines the dimensions of the dislocation-free area. The interstep distance of a spiral step at a screw-dislocation and curve-fitting of screw-like steps at stacking faults (SFs) are employed to estimate the surface supersaturation during MCE. The dependence of the vertical growth rate on the surface supersaturation was experimentally studied in GaAs(001) MCE. As a result, 2D nucleation at SFs was determined to act as a strong step source, which is stronger than a typical spiral step at a screw-dislocation over a wide range of surface supersaturation. Precise control of the surface supersaturation is important to optimize the growth conditions for MCE. An MCE layer with a large aspect ratio can thus be reproducibly obtained using appropriately controlled surface supersaturation.

(Invited) Advanced Germanium Epitaxy for Photonics Application

Investigations of low threading dislocation density (TDD) Ge growth using reduced pressure chemical vapor deposition for photonics application are reviewed. By interrupting the Ge growth process and annealing for several times during Ge epitaxy (cyclic annealing), TDD of below 1×106 cm-2 is achieved for 4.7 µm thick Ge. Root mean square of roughness below 0.5 nm is realized. Thin and low TDD Ge layer fabrication is demonstrated by depositing thick Ge with cyclic annealing process followed by HCl etching. Dislocation-free area of local Ge on insulator is formed between [110] and [1-10] direction by lateral selective Ge growth in cavity between SiO2 cap and buried oxide, which is formed by sacrificial Si etching. Using an atomic-layer-doping approach, self-limitation of incorporated P dose at ~1/4 monolayer is obtained offering heavy n-doping in Ge. P diffusion suppression by delta-doped Si in Ge is observed. By Ge growth followed by HCl etching process, photodiode with one order of magnitude lower dark current compared to standard Ge growth with cyclic annealing is fabricated.

(Invited) Synchrotron White-Beam X-Ray Topography Analysis of the Defect Structure of HVPE-GaN Substrates

For demanding GaN-based applications like laser diodes or high mobility transistors there is a need for substrate material with low defect densities, since threading dislocations act as centers of non-radiative recombination, increasing the leakage current, reducing the room temperature mobility and thereby limiting the efficiency, performance and lifetime of devices. Hydride vapor-phase epitaxy (HVPE) is the most common technique for the growth of large area freestanding GaN wafers with diameters up to 50 mm and a threading dislocation density below 107 cm−2. An alternative technique with great potential for the growth of GaN bulk crystals is the ammonothermal growth method. For this method GaN threading dislocation densities as low as 5 × 103 cm−2were reported [1]. We are interested examining significant differences in the defect structure of the GaN substrates which can be observed in samples obtained from different manufacturers or as a function of the growth technique. In this work we present a detailed analysis of defect structures of freestanding GaN (0001) crystals grown by HVPE and the ammonothermal method from different vendors. Synchrotron white-beam X-ray topography (SWXRT), high resolution X-ray diffraction (HRXRD) and microphotoluminescence (µPL) were used for this combined study. SWXRT in two principal X-ray topography geometries was used in the course of this analysis, namely the large-area back-reflection mode and section transmission mode. HRXRD reciprocal space mappings and in-plane measurements were used for mosaicity analyses. The combination of these methods allows a detailed statement of the nature, density and distribution of typical defects in GaN bulk crystals with a large field of view. As an example, Fig. 1 shows a large-area back-reflection topograph (0006 reflection) of a HVPE GaN substrate. The topograph shows dislocation free areas, surrounded by rather sharp lines, indicating good material quality with low defect density. These features are interpreted as dislocation cell walls, suggesting the formation of a cellular defect network within this GaN sample, analogous to what was commonly observed in LEC GaAs [2]. With the combination of the results from SWXRT, HRXRD and µPL a consistent model for different defect structures of the freestanding GaN samples grown by HVPE and the ammonothermal method is discussed. References P.J. R. Doradzinski, R. Dwilinski, J. Garczynski, L.P. Sierzputowski, Y. Kanbara, in Technology of Gallium Nitride Crystal Growth, edited by D.Ehrentraut, E. Meissner, and M. Bockowski, (Springer-Verlag, Heidelberg, ISBN 978-3-642-04828-9), 137-158, (2010). P.J. McNally, P.A.F. Herbert, T. Tuomi, M. Karilahti, and J.A. Higgins, J. Appl. Phys. (1996) 79, 8294. Figure 1

Growth of bulk GaN crystals by the Na-flux point seed technique

In this paper, progress in the Na-flux point seed technique (SPST) will be reviewed. Bulk GaN crystals with a diameter of 2.1 cm, a height of 1.2 cm, and large dislocation-free areas were successfully produced by SPST. Panchromatic cathodoluminescence images of a wafer sliced parallel to the c-face from the crystal showed the lack of dark spots due to dislocations over a large area of the wafer. Structural properties were evaluated using synchrotron X-ray diffraction analysis at SPring-8. The full width at half maximum of the 006 rocking curve was found to be 2.1 arcsec, close to the calculated value of 2.0 arcsec for a perfect GaN crystal, indicating that crystals grown by SPST have an almost perfect structure. In addition, we have extended the use of SPST to the coalescence growth of GaN crystals to increase the wafer diameter and obtained a 2 in. GaN wafer with a low dislocation density and a low curvature by this technique.