Discontinuous Space Vector PWM Research Articles

A Carrier-Based Discontinuous Space-Vector PWM for Common-Mode Voltage Reduction in Dual-Input Three-Level T-Type Inverters With Unbalanced Neutral-Point Voltages

A Carrier-Based Discontinuous Space-Vector PWM for Common-Mode Voltage Reduction in Dual-Input Three-Level T-Type Inverters With Unbalanced Neutral-Point Voltages

Active Vector Modification for Circulating Current Suppression of Paralleled Inverters Using Two-Step Sector Indexing-Based Discontinuous SVPWM

Due to the discrepancy of paralleled inverters, the zero-sequence circulating current (ZSCC) is a critical issue in a paralleled inverter fed permanent magnet synchronous machine (PMSM) drive system. The conventional solution to this issue is to adjust the duration of two zero vectors, however, will not be appropriate under the discontinuous space vector pulse-width modulation (DSVPWM) control using only one zero vector. For overcoming the above issues, an active vector modification based ZSCC suppression and a two-step sector indexing based DSVPWM are proposed in this paper. It uses both reference voltage and current vectors to jointly determine the drive signals in a two-step manner, which avoids the circulating current jump due to the coexistence of different zero vectors and can also reduce the switching loss by 50% in theory. Meanwhile, the low-frequency ZSCC can be online suppressed by a proposed real-time modification of durations of active vectors, which is finally verified together with the proposed two-step sector indexing method on a PMSM fed by two paralleled inverters.

Discontinuous Space Vector Pulse Width Modulation for Six Switch Converter With Independent Control of Phase Voltages and Switching Device Stress Alleviation

This paper presents a discontinuous space vector pulse width modulation (DSVPWM) for the six-switch inverter. To provide a broader alternative of DSVPWM for the six-switch inverter, the space vector method employing three zero vector partitioning parameters has been used to generate the modulation signals. A simple mathematical transformation is applied to the resulting modulation signals. This, along with the switching logic results in the accurate synthesis of the phase voltages in both the linear and non-linear regions of operation. The operating modes are chosen to ensure independent phase voltages. Furthermore, the use of the three zero vector partitioning parameters for the DSVPWM not only alleviate the switching stresses of the devices but ensures even distribution of the stress in the top, middle and bottom devices in a leg of the converter. An application of the converter is the symmetrical two-phase induction motor (STPIM) drive. Experimental results validate the theory and analysis including an open loop v/f operation of the STPIM drive.

Inverter Harmonic Suppression for Permanent Magnet Synchronous Machine Drives Based on Discontinuous SVPWM With Variable Switching Frequency

Since one phase of discontinuous space vector pulse-width modulation (DSVPWM) is always clamped, the inverter nonlinearity induces obvious 3rd and 6th harmonics in <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dq</i> -axis currents and voltages. Besides, there are non-negligible spiky switching harmonics in permanent magnet synchronous machine (PMSM) drives of PWM-controlled with fixed switching frequency. To solve these issues, an inverter harmonic suppression strategy for DSVPWM with variable switching frequency is proposed in this paper. Firstly, an inverter nonlinearity model including dead time, switching delay, and device voltage drops under DSVPWM is proposed, and a standstill test is presented for the estimation of distorted voltage terms due to inverter nonlinearity. Then the spiky switching harmonics are dispersed by the proposed chaotic-DSVPWM based on Tent map. Finally, the effectiveness of the proposed method is demonstrated on a PMSM platform, which shows quite good performance in the suppression of both low- and high-frequency harmonics. The paper reveals that the inverter harmonics under DSVPWM can be easily reduced by distorted voltage compensation and variable switching frequency.

An Analytical Discontinuous Space-Vector PWM for Three-Level Inverters With Unbalanced DC-Link Voltages

When faced with unbalanced dc-link voltages of three-level inverters, extra harmonics will be generated with reduced linear modulation region if the conventional pulsewidth modulation (PWM) for balanced dc-link voltages is adopted. In this article, in order to suppress output harmonics and maximize the linear modulation region, as well as to reduce switching losses, the discontinuous space-vector PWM (DSVPWM) is investigated and improved for three-level inverters with unbalanced dc-link voltages. First, subsectors in the vector diagram with unbalanced dc-link voltages are optimally redivided for low switching losses, and concisely determined by a cutting-line method. Then, the modulation waves are analytically derived based on the calculated dwell times of the vector states. And an analytical DSVPWM for dealing with unbalanced dc-link voltages is proposed and implemented by a carrier-based algorithm, which can significantly reduce the computation burden. Finally, the proposed analytical DSVPWM is verified through comparative experiments, presenting its merits of high linear modulation region, high efficiency, and relatively low output harmonics.

Medium and Large Vector-Based SVPWM Technique for Five-Phase Two-Level Inverter

In recent years, interest in the use of multi-phase (more than three-phase) dc/ac inverters in applications such as electric vehicles, electric traction, more electric aircraft, ship propulsion, aerospace applications, etc. has been increasing day by day. The paper presents the Discontinuous Space Vector Pulse Width Modulation (DSVPWM) technique for control of a five-phase two-level inverter. The five-phase DSVPWM algorithm uses zero, medium and large vectors combination. When calculating vectors dwell times, calculations are made by directing the Vref to Sector-1 regardless of which sector it falls into. Thus, complex calculations are reduced. DSVPWM controlled five-phase two-level inverter that feeds an RL load is simulated using MATLAB/Simulink-Simscape blocks. To demonstrate the effectiveness of the used DSVPWM algorithm, five-phase inverter's output voltages, current waveforms and their FFT analysis are given for different modulation indexes and switching frequencies.

Hybrid Discontinuous Space Vector PWM Strategy for Three-Level Inverters under Two-phase Loads Condition

The output performance of three-level inverters will be deteriorated under two-phase loads condition if conventional discontinuous PWM (DPWM) strategies are adopted. To solve the above issue, the amplitude and the phase angle of basic voltage vectors are modified in this article. Accordingly, sectors and triangles of the space vector diagram are reconsidered, duty cycles of basic vectors synthesized the reference vector are recalculated. And then four types of DPWM applicable for two-phase load are put forward. Although the harmonic distortion of the output waveform is reduced, discontinuous intervals are not optimum distributed. To further improve the output waveform quality, the amplitude of average current ripple vector is introduced as the evaluation index to redistribute discontinuous intervals of phase voltage in each fundamental period. Then, a hybrid DPWM strategy is presented and the harmonic distortion of the output waveform is minimized. Meanwhile, the neutral-point voltage ripple and the switching loss are also suppressed. The effectiveness of the hybrid DPWM strategy is verified by both simulation and experimental results.

Analysis of Current Flowing Through Disabled Converters in Parallel AC/DC Power Conversion System

When not all the converters are enabled in a parallel ac/dc power conversion system, some current flows through the disabled converters. This current not only distorts the current waveform of the ac side but also causes extra loss and unintended power flow from the ac to the dc side. In this article, the reason for this current flow is identified, and the total current according to the number of paralleled converters and its operating conditions are analyzed. A new pulsewidth modulation (PWM) method is proposed to minimize the current. And, the zero-sequence voltage and the consequent current flowing through the disabled converters under the proposed PWM method are compared to those under the conventional PWM methods. As a result, it was identified that discontinuous space vector PWM (DPWM) is not a proper PWM method because it causes a large current at some operating conditions. According to both simulation and experimental results, the magnitude of the current flows through disabled converters under the proposed PWM was about 40% less than that under sine PWM and DPWM, and it was about 10% less than that under continuous space vector PWM.

Optimal Discontinuous Space Vector PWM for Zero-Sequence-Circulating Current Reduction in Two Paralleled Three-Phase Two-Level Converter

This article proposes an optimal discontinuous pulsewidth modulation (ODPWM) strategy to reduce the zero-sequence circulating current (ZSCC) for paralleled three-phase two-level converters. While existing methods generally entail a tradeoff between the ZSCC peak and the switching losses, this article fully explores the redundancy in the vector sequences to further improve both objectives. First, we derive eight candidate vector sequences for 60° sectors, each sequence with minimal switching times and ZSCC changing rate. Second, we divide each 60° sector into 12 subsectors, each is equipped with one of the eight candidates. The comparisons show that the proposed method maintains the same maximum ZSCC peak of existing best methods while using the minimal switching times, or effectively reducing the switching loss by up to 50%; the ZSCC of the proposed method is minimal across the major modulation regions, guaranteeing a smaller loss of the common mode inductor and further reducing the semiconductor losses. We implement the proposed optimal vector sequences in a carrier-based modulation scheme, the references of which depends on the subsector. Despite the complex geometry of the subsectors, the decision procedure is simple. Finally, the experimental results confirm the effectiveness of the proposed ODPWM.

Common-Mode and Phase-to-Ground Voltage Reduction in Back-to-Back Power Converters With Discontinuous PWM

Discontinuous space vector pulsewidth modulation (DSVPWM) techniques are an interesting option for three-phase, two-level power converters when efficiency is a key factor. Such is the case of back-to-back (B2B) power converters used mainly in wind energy conversion systems and electrical drives. The application of DSVPWMs to B2B converters increases the common-mode (CM) and phase-to-ground (PG) voltages by 50%, compared to conventional space vector pulsewidth modulation (SVPWM7). Higher CM and PG voltages cause bearing currents and insulation stress, which reduce system reliability. In this article, this problem is addressed and two DSVPWM strategies are presented to reduce the CM and PG voltages in B2B power converters. In the first proposal, the CM and PG are both limited to the same values as the conventional SVPWM7 without introducing additional commutations. In the second proposal, a further modification is added to reduce the CM by 50%, compared to the SVPWM7, although this modulation strategy eventually requires two additional commutations in certain periods. Experimental and simulation results validate the performance of the proposed strategies.

Application of Barycentric Coordinates in Space Vector PWM Computations

This paper proposes the use of barycentric coordinates in the development and implementation of space-vector pulse-width modulation (SVPWM) methods, especially for inverters with deformed space-vector diagrams. The proposed approach is capable of explicit calculation of vector duty cycles, independent of whether they assume ideal positions or are displaced due to the DC-link voltage imbalance. The use of barycentric coordinates also permits a well-defined and universal approach to the problem of identifying the region in which the reference vector is located. It completely avoids the use of angles, trigonometric functions, and inverse trigonometric functions and is chiefly based on matrix operations which are well suited for digital signal processor implementation. The proposed approach is exposed and validated for the special case of three-level neutral-point clamped (NPC) inverter controlled by a discontinuous space-vector PWM.

A Discontinuous Space Vector PWM Algorithm in abc Reference Frame for Multilevel Three-Phase Cascaded H-Bridge Voltage Source Inverters

Previous space vector pulse-width modulation (SVPWM) methods for a multilevel three-phase voltage source inverter (VSI) have the problems including the computational complexity to identify the location of the reference voltage vector, the memory requirements of switching states and corresponding duty ratios, or no generalized switching pulse durations of switches. These problems are related to the level number, and they become critical at a high level number. In this paper, a discontinuous SVPWM algorithm in the abc reference frame is first proposed for a multilevel three-phase cascaded H-bridge (CHB) VSI. The L -level three-phase SVPWM problem is solved based on the two-level three-phase SVPWM one. Thus, the computational complexity to determine the nearest three switching states and corresponding duty ratios is independent of the level number. Furthermore, the proposed algorithm provides a systematic approach to calculate the switching pulse durations for a multilevel three-phase CHB VSI, and the approach can be extended to different multilevel three-phase VSIs. The proposed algorithm has no memory requirement and low computational complexity. It is verified by the simulation and experimental results for a five-level three-phase CHB VSI.

Discontinuous Space Vector PWM Strategy of Neutral-Point-Clamped Three-Level Inverters for Output Current Ripple Reduction

In order to meet the high performance and efficiency requirements, a new space vector-based discontinuous modulation strategy for neutral-point clamped three-level inverter is presented in this paper. Different from the conventional discontinuous PWM (DPWM) strategies, a new clamping state is applied to synthesize the reference voltage under the condition of low modulation index. The rms value of output current ripple for different clamping states are calculated, and then the distribution of the new clamping state and the other two clamping states adopted in conventional DPWMs is optimized based on the calculation results. The switching sequences are redesigned according to the new distribution of the three clamping states. The output voltage and current, switching loss, neutral-point voltage ripple and the common mode voltage of the proposed DPWM strategy and DPWM0–DPWM3 are compared by simulation and experimental results. The results show that by the use of the proposed strategy, the values of total demand distortion of output current ( I TDD) and weighted total harmonic distortion of output voltage $({\boldsymbol{V}_{{\mathbf{WTHD}}}})$ are the lowest. Furthermore, the product of switching loss and $I_{\rm TDD}$ of the proposed strategy maintains the lowest within a large range of modulation index-load angle plane. It can be concluded that the utilization of the new clamping state and optimal distribution of different clamping states could enhance the output performance of the inverter. Moreover, the high-efficiency requirement can also be realized at the same time.

RETRACTED ARTICLE: ANN-based MPPT algorithm for solar PMSM drive system fed by direct-connected PV array

In this paper, artificial neural network (ANN) based on a maximum power point tracking (MPPT) algorithm is developed for a solar permanent magnet synchronous motor (PMSM) drive system used without a boost converter and batteries. The discontinuous space vector PWM technique is used to drive two-level inverter which is directly fed by three parallel-connected Kyocera KD205GX-LP PV modules. The ANN-based MPPT algorithm estimates the voltages and currents corresponding to maximum powers produced by PV array at the maximum power point (MPP) for swiftly changing situations such as solar radiance and temperature. These maximum powers are given as input signal to vector control algorithm of PMSM. The PMSM is designed by using Infolytica/MotorSolve software so that the phase-to-phase maximum value of its operating voltage is 20 V. The use of three-phase PMSM presents more efficient solutions to the trading solar systems with dc motor or induction motor. Thus, an effective solar system is achieved. The performance of developed ANN-based MPPT algorithm, designed PMSM, vector-controlled driver and solar system is analyzed by using MATLAB/SimPowerSystems blocks under the rapidly changing environmental conditions.

Discontinuous SVPWM Techniques of Three-Leg VSI-Fed Balanced Two-Phase Loads for Reduced Switching Losses and Current Ripple

In this paper, various types of discontinuous space vector pulse-width modulation techniques for a three-leg voltage source inverter supplying balanced two-phase loads are proposed. The main objectives of the paper are to analyze switching loss characteristics associated with semiconductor devices and to reduce output current ripple by dealing with various types of zero space vector time in each switching sequence. Capabilities of reductions in switching losses and current ripple for both balanced and unbalanced output phase voltages at high modulation index and load power factor angle of 30° lagging are focused. The validity of the proposed techniques is verified by simulation and experimental results in terms of voltage spectrum, current waveforms, reductions in switching losses, and output current ripple at high modulation index when compared to a continuous space vector pulse-width modulation technique.

Leakage current and commutation losses reduction in electric drives for Hybrid Electric Vehicle

Nowadays, leakage current and inverter losses, produced by adjustable-speed AC drive systems become one of the main interested subject for researchers on Electric Vehicle (EV) and Hybrid Electric Vehicle (HEV) technology. The continuous advancements in solid state device engineering have considerably minimized the switching transients for power switches but the high dv/dt and high switching frequency have caused many adverse effects such as shaft voltage, bearing current, leakage current and electromagnetic interference (EMI). The major objective of this paper is to investigate and suppress of the adverse effects of a PWM inverter feeding AC motor in EV and HEV. A technique to simultaneously reduce the leakage current and the switching losses is presented in this paper. Based on a discontinuous space vector pulse width modulation (DSVPWM) and a modular switches gate resistance, inverter losses and leakage current are reduced. Algorithms are presented and implemented on a DSP controller and experimental results are presented.

FPGA Based Optimized Discontinuous SVPWM Algorithm for Three Phase VSI in AC Drives

The discontinuous space vector pulse width modulation (SVPWM) has well-known that can reduce switching losses. By simplifying the thermal management issues, the discontinuous SVPWM can potentially reduce the inverter size and cost. However, using the modulation due to different time interval equations for each sector can introduce glitches at the points when the sector is changed. The more main problem, it can increase unwanted harmonic content and current ripple. Consider the decrease in switching losses associated with discontinuous modulation allows the system to utilize a higher switching frequency, this paper present high frequency switching of optimized discontinuous SVPWM based on FPGA to overcome the problems above. The proposed SVPWM has been successfully implemented by using APEX20KE Altera FPGA to drive on a three phase inverter system with 1.5 kW induction machine as load. The results have proved that the method can reduce harmonic content and current ripple without glitches. DOI : http://dx.doi.org/10.11591/ijpeds.v3i1.735

Analytical Evaluation of Switching Characteristics in Five-Phase Drives with Discontinuous Space Vector Pulse Width Modulation Techniques

This paper deals with flux harmonic distortion factor (HDF) and current ripple analysis for various discontinuous space vector PWM (SVPWM) techniques, applicable in conjunction with five-phase two-level inverter-fed ac motor drives. The analysis is based on the application of the recently developed polygon approach for multiphase systems. The results are compared throughout with the corresponding continuous SVPWM techniques. Two different SVPWM methods, based on different selections of the active vectors, are encompassed by the analysis. The analytical study is supported with simulation and experimental result, obtained using a five-phase induction motor.

Study on the Novel Generalized Discontinuous SVPWM Strategies for Three-Phase Voltage Source Inverters

In this paper, a novel generalized discontinuous space-vector pulse width modulation (DSVPWM) strategy called DSVPWMx, which includes DSVPWMP, DSVPWMN, DSVPWMPN0, DSVPWMPN1, DSVPWMPN2, and DSVPWMPN3, is proposed for three-phase voltage source inverters. Six sectors are redivided into 12 ones based on space-vector pulse width modulation (SVPWM) and local over modulation method. The principle of the new DSVPWMx is developed, essential relationship among different DSVPWMx strategies and linear modulation ranges of DSVPWMx are discussed. The characteristics for DSVPWMx and the traditional discontinuous pulse width modulation (DPWM) strategies such as DPWMMAX, DPWMMIN, DPWM0, DPWM1, DPWM2, and DPWM3 named as DPWMx are studied on the basis of harmonic distortion and switching loss. The simulation and experimental results verify that the DSVPWMx strategies are right and feasible.

Analysis of Discontinuous Space Vector PWM Techniques for a Seven-Phase Voltage Source Inverter

This paper presents discontinuous space vector PWM (DPWM) techniques for a seven-phase voltage source inverter (VSI). Space vector model of a seven-phase VSI shows that there exist 128 space vectors with different lengths and maps into fourteen sided polygons. A number of possibilities could arise to implement modulation of inverter legs due to large number of available space voltage vectors. Two strategies are adopted here; one utilising large and two middle sets of space vectors to implement discontinuous space vector PWM. Clamping of legs of inverter to either positive or negative dc bus leads to discontinuity in the switching and consequently offers reduced switching loss modulation strategy. A significant reduction in switching losses can be achieved while employing DPWM in a seven-phase VSI. A generalised method is also proposed to realize the DPWM in a seven-phase VSI. Comparison of continuous and discontinuous PWM is presented in terms of switching current ripple. The experimental set-up is illustrated and the experimental results are presented. DOI: http://dx.doi.org/10.11591/ijpeds.v2i2.244