Discharge Time Lag Research Articles

Study on Address Discharge Characteristics by Changing Ramp-Down Voltage in AC PDPs

The address discharge characteristics formed when an address pulse is applied in AC plasma display panels are investigated by changing the ramp-down voltage during the reset period. The address discharge time lag can be reduced when the difference between the ramp-down voltage and the scan-low voltage is set at a high value during the ramp-down period because the loss of the wall charges accumulated between the scan (Y) and address (A) electrodes during the reset period is minimized. In addition, the voltage applied to the X electrode during the ramp-down period can prevent the voltage margin from reduction even though applying high voltage difference on the Y electrodes.

Influence of Gold Nanoparticles on the Characteristics of Plasma Display Panels

This paper proposes a modified alternating current plasma display panel (PDP) in which gold nanoparticles are incorporated into a bare MgO layer to enhance the performance of the protective layer. The proposed structure's ion-induced secondary electron yield, which is expressed in a gamma value ( value) is greater than that of a bare MgO layer; as a result, the operating voltage decreases by 10 V to 20 V. The integration of emitted infrared (IR) light and the power density consumed by the discharge current are both increased, but the ratio of increment is greater for the case of the IR light. Consequently, IR efficacy is increased. The IR response time of the sustain discharge and the address discharge time lag are reduced by the enhanced wall charge accumulation characteristic and the exoelectron emission property. The results of ultraviolet photoelectron spectroscopy show that a MgO layer with Au nanoparticles has a lower work function than a conventional bare MgO layer. Furthermore, the structure that is not flattened by nanoparticles seems to enhance the secondary electron emission property of the MgO protective layer. Consequently, the value is enhanced by the two reasons previously mentioned.

The Effect of Disordered Microscale Holes in the Front Dielectric Layer of AC Plasma Display Panels

Using polymethyl methacrylate (PMMA) beads, disordered microscale holes were fabricated in the front dielectric layer of ac plasma display panels. The density of the disordered microscale holes was easily controlled by varying the weight percentage of the PMMA beads. As their density increased, the voltage of self-erasing discharge and the minimum sustain voltage decreased. In addition, the sustain discharge time lag was improved according to the measurement results of the response time and spatiotemporal infrared emission from an intensified charge-coupled device camera. The wall voltage at the state of sustain discharge was investigated by measuring the threshold voltage using wall voltage measurement system. In the test panel of the front dielectric layer with disordered microscale holes, the wall voltage increased. In addition, the increase in the wall voltage at the state of sustain discharge was improved as the density of the disordered microscale holes increased. The decrease in the self-erasing discharge and minimum sustain voltage and the improvement of the sustain discharge time lag resulted from a strong electric field that originated in the increase in the wall voltage.

49.3: Discharge Characteristics of PDPs with the Ternary Oxides Protective Layers Manufactured by Using All‐In‐Vacuum Process

AbstractThe discharge characteristics of PDPs with the protective layers of MgO based ternary oxides are investigated. The panels with a gas mixture of Ne‐Xe20% are manufactured by “all‐in‐vacuum” process, in which the front panels are processed without an exposure to ambient air after the deposition of protective layer. Compared with PDPs with conventional MgO protective layer, a discharge voltage is lowered by 40V and a discharge time lag is shortened within 1 μs.

42.4: Effect of Carbon Nanotubes in a PDP Back Plate on Addressing Discharge Time Lag

AbstractThe effect of carbon nanotubes (CNTs) in a back plate of a plasma display panel (PDP) for reducing the addressing discharge time lag was investigated. Field enhancement with CNTs played a significant role in reducing the addressing discharge time lag.

Fe가 첨가된 MgO 보호막의 표면특성 개선에 관한 연구

플라즈마 디스플레이 패널(Plasma Display Panel : PDP)이 다른 평판 디스플레이 분야(Liquid Crystal Displays(LCDs) and organic light emitting diodes(OLEDs) 등)와 경쟁에서 이기기 위해서는 제품의 고화질화, 저소비전력와 고속구동 등의 성능향상이 필요하다. 본 논문에서는 PDP의 성능향상을 위하여 유전체 보호층으로 쓰이는 MgO 박막에 Fe를 미량 첨가한 박막을 증착하고, 그 특성에 대하여 연구하였다. e-beam 증착법으로 증착된 Fe 도핑 된 MgO 박막의 표면특성과 전기광학적 특성을 4인치 테스트 패널을 제작하여 연구하였다. Fe가 도핑된 MgO 박막을 가지는 PDP는 Fe가 도핑되지 않은 PDP에 비해 낮은 방전전압 특성을 나타내었으며, 이는 박막에서 측정된 2차전자방출계수의 실험결과와 잘 일치되었다. 증착된 박막의 결정성과 표면 거칠기는 XRD 와 AFM 측정방법을 통하여 결정되었다. 또한, Fe가 도핑된 PDP는 고속구동을 위한 향상된 어드레스 방전 늦음의 특성을 나타내었다.

Characterization of the Initial Stage of Discharges between Micro-gap in Liquid using Optical Measurement

The pulsed arc discharges in liquid between a micro-gap composed of a tungsten wire and a copper rod were characterized for the application to electrical discharge micro-machining. We discussed the spark formation and optical emission spectral lines of micro-gap discharge in liquid. The discharge time lag depends on the breakdown process and discharge position on the surface of the plate electrode. Intense broadband continuum radiation was observed during the pulsed discharge before which clear spectral lines appeared. The excitation temperature of copper atom was obtained using the spectral lines.

Bipolar drive waveform for long-gap high-Xe plasma display panels

Abstract This paper proposes a drive waveform for plasma display panels (PDPs) which have a long discharge gap and use a high Xe-content discharge gas mixture. The proposed waveform uses bipolar sustain pulses, except for the last sustain pulse of each sub-field, to suppress undesired sustain discharges between facing electrodes; these sustain discharges degrade picture quality. The waveform uses a unipolar pulse for the last sustain to reduce the time lag of the address discharge. A reset waveform was designed for the long-gap high-Xe PDP and implemented in the drive waveform. The proposed waveform was tested on a 12% Xe 42-in. XGA (1024 × 768) single-scan AC PDP which had a sustain discharge gap of 180 μm. The measured dark luminance was 0.16 cd/m 2 , full-white luminance was 284 cd/m 2 , and luminous efficiency was 1.617 lm/W. The sustain voltage margin was higher than ±10 V at the operating point.

Analysis of the driving characteristics for an ACPDP with an auxiliary electrode using the voltage‐transfer closed surface

Abstract— The driving characteristics and wall‐charge model of an ac plasma‐display panel (ACPDP) with an auxiliary electrode were investigated by using voltage‐transfer closed‐surface modeling. To understand the wall‐charge behavior of an ACPDP with an auxiliary electrode qualitatively, voltage‐transfer closed‐surface analysis was applied to a test panel under the full driving waveform. The voltage‐transfer closed surfaces were obtained after the sustain, reset, and address periods, when the full‐stage driving waveform was employed with the test panel. As a result, it was proven that the wall‐charge model predicted in the previous work corresponded with the wall‐charge behavior of an ACPDP with an auxiliary electrode. Also, based on the resultant form after the address period, the wall‐charge model after the address period was recently added and the entire wall‐charge model was completed in this work. In addition, by investigating the trajectory of the cell‐state movement during the reset period, it was confirmed that the priming effect affected the reduced discharge time lag of an ACPDP with an auxiliary electrode under the newly proposed driving waveform for reducing address time lag.

Discharge characteristics of a plasma display panel with hump-shape electrodes

The long gap discharge in a plasma display panel has an advantage of high luminous efficacy but has a deficiency of high firing voltage as well. A hump-shape electrode is suggested to reduce the firing voltage of a long gap discharge while maintaining high luminous efficacy. The effects of hump electrodes inserted between two sustain electrodes are investigated by experiment and with a three-dimensional fluid simulation. The experimental results show that hump structure has lower firing and sustain voltage than the conventional long gap structure. A three-dimensional fluid simulation shows that the hump electrode enhances discharge ignition while maintaining the same optical characteristics of the long gap discharge. Also, the hump structure guarantees the addressing reliability with a reduced discharge time lag.

Evaluation of global land-to-ocean fresh water discharge and evapotranspiration using space-based observations

Summary We estimate global fresh water discharge from land-to-oceans ( Q ) and evapotranspiration ( ET ) on monthly time scales using a number of complimentary hydrologic data sets. This estimate is possible due to the new capability of measuring oceanic and land water mass changes from GRACE as well as the space-based measurements of oceanic and land precipitation ( P l ) and oceanic evaporation. Monthly time series of Q show peaks in July and January, and those of ET show peaks in March, May and August. Our estimates of Q and ET are correlated with P l indicating qualitatively that our estimates capture temporal patterns of Q and ET reasonably well. Comparison of our Q with two other previous estimates based on the Global Runoff Data Centre (GRDC) river gauges network shows that our maximum peak in Q occurs about a month later than previous estimates. In addition, we compare our estimation of Q and ET to 20th century simulations from the WCRP CMIP3 multi-model archive assessed in the IPCC 4th Assessment Report. Runoff ( R ) and ET from AOGCMs tend to only exhibit the annual cycle, but the Q estimated in this study exhibits additional semi-annual variations that exists in P l as well. In addition, R from the models shows a maximum peak 2 months earlier than the estimated Q , which is due partly to the river discharge time lag that most AOGCMs do not take into account. These results indicate that current AOGCMs exhibit basic shortcomings in simulating Q and ET accurately. The new method developed here can be a useful constraint on these models and can be useful to close budget of global water balance.

High‐contrast driving method for advanced CEL structure with magnesium oxide single‐crystal powder in ACPDP

Abstract— A new driving method for an advanced‐CEL‐structure panel has been developed. Picture qualities have been upgraded. Discharge time lags are drastically shortened by priming electron emission from magnesium oxide (MgO) single‐crystal powder, refered to as a crystal emissive layer (CEL). The advanced‐CEL‐structure panel has CEL material on the surface of not only the surface‐discharge‐electrode side but also on the address‐electrode side. This panel structure enables a stable opposed discharge when the address electrode functions as a cathode. By utilizing the opposed discharges in the reset and LSB‐SF sustain periods, the dark‐room contrast ratio has been drastically increased to over 20,000:1, which is higher than five times that of the conventional method, and the luminance of the least‐significant‐bit sub‐field (LSB‐SF) is as low as 0.1 cd/m2, which is one‐fourth that of the conventional method. The high‐picture‐quality PDP TVs refered to as “KURO” that employs these technologies have been introduced into the marketplace.

Improved discharge time lag of address pulse in an ACPDP with auxiliary electrodes

Abstract— New driving waveforms are proposed for an ACPDP with an auxiliary electrode. Auxiliary pulses and a stepped scan pulse during the address period distinguish the proposed waveforms from conventional waveforms. The address discharge time lag in an ACPDP with auxiliary electrodes was improved by application of auxiliary pulses and a stepped scan pulse during the address period. The interaction between the auxiliary pulse and the stepped scan pulse generates priming particles directly prior to the address discharge, and these priming particles influence the address discharge. As a result, the firing voltage of the address pulse is lowered, and the minimum address voltage is lower than that of conventional driving waveforms. Experimental results confirm that the address discharge time lag of the proposed waveforms is 32% lower than that of conventional driving waveforms.

P‐143: New Drive Waveforms for High Speed Erase Addressing

AbstractWe propose a new high speed driving waveform which uses a negatively biased voltage to the common electrode and an alternating ramp voltage to the scan electrode during the reset period and an erase address scheme. It showed short discharge time lag under 800nsec, wide address voltage margin over 40V and improved jitter characteristics among different color cells in a 7.5inch test panel with 50inch full HD resolution. Its fast discharge characteristics was attributed to the formation of stronger wall voltage near the middle of the gap during the reset period and the consequent bigger electric field during the scan period which was confirmed by the 3 dimensional emission observation and voltage domain analysis.

P‐138: Driving Waveforms for Reducing Address Discharge Time Lag in an AC PDP with Auxiliary Electrodes

AbstractThe address discharge time lag in an AC PDP with auxiliary electrodes was improved by applying auxiliary pulses and a stepped scan pulse during the address period. Interaction between the auxiliary pulse and the stepped scan pulse generated priming particles during the address period, influencing the address discharge positively. As a result, the minimum address voltage was reduced, and was lower than that of conventional driving waveforms. Furthermore, when the proposed waveforms were applied, the address discharge time lag was improved by 32% compared to that of the conventional driving waveforms with the same address voltage.

The Operation Characteristics of an Alternating Current Plasma Display Panel With Si-Doped MgO Protecting Layer

In this paper, the operation characteristics of an ac plasma display panel (PDP) with Si-doped MgO protecting layer are investigated. The test panels are fabricated with the protecting layers of conventional MgO and Si-doped MgO, and the operation voltage margin, luminous efficacy, and address discharge time lag are observed. Even though the test panel with Si-doped MgO protecting layer showed lower operation voltages, higher luminous efficacy, and shorter statistical discharge time lag, its addressing discharge characteristics become deteriorated as the scanning time is increased from the end time of the reset period. The photon-induced surface conductivity increased by Si doping into MgO, and surface charges on the Si-doped MgO protecting layer showed faster decay characteristics compared to those on the conventional one. It is believed that the impurity doping into the protecting layer can improve the short-period characteristics of an ac PDP, but the long-term stability of surface charge retention is deteriorated.

High‐speed driving waveform based on reset and address discharge analysis using a Vt closed curve in ACPDPs

Abstract— Driving waveforms having both high‐speed address and low background were developed using Vt closed curve analysis. To prevent a misfired discharge during a sustain period, the voltage difference at the end of the ramp setup between the X‐Y electrodes remains constant. Because background luminance becomes higher (although the address discharge time lag becomes shorter) as the voltage difference between the A‐Y electrodes becomes larger, a low reset voltage and an address bias voltage were adopted during the ramp‐up period.

플라즈마 디스플레이 패널의 고속 구동을 위한 세폭 펄스 어드레스 방전특성

본 연구는 1,080개의 주사선수를 가지는 full-HD PDP를 위한 새로운 고속구동방식에 관한 것으로 고속 어드레스에 의한 표시방전의 방전특성을 고찰하여 새로운 구동방식의 특성을 평가하였다. 이 구동방식에서 어드레스 펄스의 폭이 좁아지면 최초 표시방전의 상대적 방전강도와 방전지연시간은 그 영향을 받는다. 어드레스 펄스의 인가위치의 변화는 방전강도와 무관하나 방전지연시간에는 영향을 미친다. 그러나 어드레스 펄스의 인가위치가 6[㎲]이내이고 펄스의 폭이 0.7[㎲]이내라면, 어드레스 펄스의 인가위치나 폭에 무관하게 안정된 표시방전을 유도할 수 있다. 실험결과로부터 폭이 좁은 어드레스 펄스를 사용하는 고속구동기술은 축적되는 벽전하의 부족으로 인해 공간전하의 영향에 매우 민감하다는 것을 알았다.

Influence of wall charge distribution on time lag of address discharge in AC plasma display panels

The influence of wall charge distribution on the time lag of address discharge in an AC plasma display panel is investigated using two different reset waveforms: one (typical reset) induces both face and surface discharges and the other (TR reset) induces face discharges only. The measured formative time lag and statistical time lag of address discharge for TR were 21–31 ns and 31–74 ns shorter than the one for the typical reset, respectively. The TR reset resulted in much less increase of statistical time lag than the typical reset when the reset-to-address time interval was increased, and ∼70 ns smaller deviation of the statistical time lag among different color cells. Calculations show that the TR reset forms a much smoother wall charge profile, which is less susceptible to cell parameter variations, than the typical reset. The observed differences in the time lags of address discharge between different scan lines and color cells are strongly correlated to the differences of the wall charge profile, indicating that a smooth wall charge profile formed by the reset using face discharges only reduces the time lag of address discharge and minimizes the susceptibility of address discharge to cell parameter variation.

P‐204L: Late‐News Poster: Analysis of Statistical Time Lags Based on Wall Charges Prior to Address Discharge Using Vt Close‐Curve Method for Full‐HD AC‐PDP

AbstractThe high speed address is an important parameter to lower cost technology for the realization of full HD‐PDP. The wall charge supplied from the reset period is an important factor for affecting the fast and stable discharge characteristics during an address period. It is found that as the voltage level of the negative falling ramp in the reset waveform is lower, the accumulated wall charges during the ramp‐up period are more erased, thus reducing the amounts of wall charges prior to address discharge. The resultant changes in the address discharge characteristics were examined in the 42‐in. ac‐PDP with a high Xe (11 %) content. In particular, the measured Vt close‐curves and corresponding IR emission profiles show that less amounts of wall charges prior to an address discharge induce the decrease in the statistical time lag and total address discharge time lag in address period, thereby resulting in the stable and fast addressing. Therefore, it is advantageous to use the electric field from the applied voltage during an address discharge instead of utilizing the wall charges from the reset period for the stable and fast addressing.