Digital Signal Integrity Research Articles

Design of a Common-Mode Rejection Filter Using Dumbbell-Shaped Defected Ground Structures Based on Equivalent Circuit Models

An efficient design method is proposed for a compact common-mode rejection (CMR) filter utilizing dumbbell-shaped defected ground (DS-DG) structures and gap-coupled stub (GCS) resonators. A CMR filter for differential lines helps to improve the signal integrity of high-speed digital signals on printed circuit boards. The proposed CMR filter design is based on the equivalent circuit models, while the previous designs depended heavily on the DS-DG structure optimization using the EM simulations. The proposed CMR filter effectively rejects the common-mode components while minimally affecting the differential signals. To prove the simplified design approach, a fifth-order Chebyshev band-stop filter is designed with three DS-DG structures and two GCS resonators. From the simulated and measured results, it is found that the proposed CMR filter provides ~90% fractional frequency bandwidth with more than 20 dB of common-mode rejection ratio and less than 0.6 dB of insertion loss of the differential signal.

The Impact of the Connection Failure of Ground Solder Balls on Digital Signal Waveform

Ball-grid array (BGA) packages are widely used in digital signal devices, whose reliability and signal integrity are critical. In this research, the impact of failed ground solder balls on digital signal waveforms was theoretically modeled and analyzed, and the results were experimentally verified. A 3-D electromagnetic field model of a digital signal transmission channel with failed ground solder balls was developed to analyze the signal transmission in the frequency domain. In addition, a time-domain waveform simulation system was developed to examine the changes in the digital signal waveforms before and after degradation. Based on the structural and signal transmission characteristics of the solder area with failed ground solder balls, an equivalent circuit model of the degraded solder area was developed, which accurately predicts the effect of the failed ground solder balls on the amplitude and rising edge of the digital signals. The results obtained from the simulation were validated using experimental tests. This study fully examines the effects of the location and number of failed ground solder ball on signal transmission in both the frequency and the time domain. It provides insight and guidance regarding the impact on signal integrity of such faults, which serves to assist in improved packaging reliability and the development of fault detection strategies for such electronic systems.

Characterization and Digital Signal Integrity Analysis of PHEMTs using an Eye Diagram

Digital Performance analysis of high electron devices used in microwave communication systems is crucial for ensuring their suitability to ever-increasing high-speed data rate applications. This study aims at characterizing a 0.5x200μm dimension pseudomorphic heterojunction transistor and studying the effect of the device characteristics on various parameters of digital bit streams. It has been found that while the device can be predicted to be suitable for a wide range analog bandwidth application however digital application can be satisfactory only in a narrower range only and that a correlation has been established between digital bit rate and various small signal parameters of the device.

Investigations on the Effect of Electrical Contact Degradation on High Speed Wide‐Band Signal Integrity

Electrical contact degradation will affect the signal integrity resulting in poor communication performance. In the present work, the effect of electrical contact degradation on wide-band digital signal integrity was studied using both the theoretical analysis and experimental testing. The characteristics of digital signals with rise times of 200ps, 400ps, 600ps and 800ps through connectors with different degradation levels were studied. The maximum bandwidth of these signals can reach up to 1.75GHz. An equivalent model of the connector with degraded contact surface was developed and the experimental results are consistent with the model results approximately. The influence of capacitance characteristics caused by degraded contact surface on digital signal waveform was calculated and analyzed. The results of this paper are helpful in developing a better understanding of the characteristics of wide-band digital signal waveforms through the degraded contact surface and provide a theoretical support to identify failure features in fault diagnosis.

Modeling and Analysis of Signal Integrity of High-Speed Interconnected Channel With Degraded Contact Surface

High-speed interconnected channels, including printed circuit boards (PCBs) and high-speed connectors, are widely used in digital baseband communication systems. Connector degradation may lead to deterioration of the integrity of digital signals and is one of the major causes of low communication quality. In this work, the effect of electrical contact degradation on signal integrity was investigated using model analysis and experimental testing. A 3-D electromagnetic field model of a high-speed channel with a degraded contact surface was developed to evaluate transmission loss, signal reflection, and crosstalk. Using multiconductor transmission line theory and contact physics, a distributed parameter circuit model of a high-speed channel with a degraded contact surface was also developed. The electromagnetic field model results are in good agreement with those obtained from the distributed parameter circuit model. Both the electromagnetic field model and the circuit model results are validated using experimental tests. The results of this investigation provide a better understanding of the characteristics of signal transmission through a degraded contact surface in a high-speed channel and theoretical support for identifying failure features in fault diagnosis.

Investigation of the improvement of signal integrity in electrical circuits with degraded contacts using differential transmission

High-speed backplane connectors are extensively used in digital baseband communication circuits. Connector degradation may lead to deterioration of the integrity of digital signals and is one of the major causes of low communication quality. In this study, an accelerated test was used to produce degraded connector samples. Based on the degradation characteristics of the connector electrical contact surface, the differential transmission method was applied to enhance signal integrity in such degraded electrical contact circuits. Referring to the Gigabit Ethernet standard, the differential signal waveforms and eye diagrams of high-speed channels with un-degraded and degraded connectors were studied. Improvement of the circuit reliability by differential transmission was demonstrated from the perspectives of both experimental investigations and analysis using probability calculations.

Optimization of Eye Diagram Based on Adaptive Decision Feedback Equalizer for High Speed Digital System

Eye diagram used in a lot of radio and telecommunication application, but it can also be used in digital signal integrity. This kind of analysis is a common indicator of performance in digital transmission systems. As integration density and data rates increase, dispersive losses, reflections and crosstalk can severely degrade signal integrity. Fortunately, these effects are linear processes. Accordingly, simple, on-chip signal processing techniques can compensate for them. In this paper we introduce an approach to improve eye diagram for data transmission that indicate the signal strength by using adaptive Decision Feedback Equalizer (DFE) in receiver circuits of digital system. The simulation results are presented to validate the efficiency of the proposed method.

Linear mode photon counting with the noiseless gain HgCdTe e-avalanche photodiode

A linear mode photon counting focal plane array using HgCdTe mid-wave infrared (MWIR) cutoff electron initiated avalanche photodiodes (e-APDs) has been designed, fabricated, and characterized. The broad spectral range (0.4 to 4.3 μm) is unique among photon counters, making this a “first of its kind” system spanning the visible to the MWIR. The low excess noise [F(M)≈1] of the e-APDs allows for robust photon detection while operating at a stable linear avalanche gain in the range of 500–1000. The readout integrated circuit (ROIC) design included a very high gain-bandwidth product resistive transimpedance amplifier (3×1013 Ω-Hz) and a 4 ns output digital pulse width comparator. The ROIC had 16 high-bandwidth analogs and 16 low-voltage differential signaling digital outputs. The 2×8 array was integrated into an LN2 Dewar with a custom leadless chip carrier and daughter board design that preserved high-bandwidth analog and digital signal integrity. The 2×8 e-APD arrays were fabricated on 4.3 μm cutoff HgCdTe and operated at 84 K. The measured dark currents were approximately 1 pA at 13 V bias where the measured avalanche photodiode gain was 500. This translates to a predicted dark current induced dark count rate of less than 20 KHz. Single photon detection was achieved with a photon pulse signal-to-noise ratio of 13.7 above the amplifier noise floor. A photon detection efficiency of 50% was measured at a photon background limited false event rate of about 1 MHz. The measured jitter was in the range of 550–800 ps. The demonstrated minimum time between distinguishable events was less than 10 ns.

Neutralization of LC- and RC-Disturbances with Left-Handed and NGD Effects

This paper focus is on the neutralization technique of the unwanted physical disturbances in the radio frequencies (RF) and digital electronic structures. Most of parasitic effects induced in these systems can be modeled by RC- and LC- passive networks. For canceling these disturbing effects, we can proceed with the transfer function neutralization in the considered operating frequency bands. This neutralization concept is developed by using first, a left-handed (LH) and negative group delay (NGD) circuits inspired from metamaterials. The fundamental theoretical approach illustrating the RC- and LC-effects transfer function neutralization is described. Synthesis relations enabling to determine the elements of the LH and NGD circuit correctors in function of the perturbation parameters are established. Numerical and experimental demonstrators are presented to validate the technique proposed. This later is particularly useful for the improvement of the analogue and digital signal integrity degraded by electromagnetic interferences.

Nickel‐gold plating of copper PCB traces and signal losses

PurposeThe purpose of this paper is to discuss nickel gold plating of PCB traces and its adverse effects on signal integrity, and to explore the other key drivers in optimising yields and controlling PCB processes that impinge on signal integrity.Design/methodology/approachThe paper is a response to requests from PCB fabricators to explain why the losses on impedance controlled traces on PCBs were sometimes higher than expected.FindingsWhile nickel is acceptable on short lengths of pad to accommodate gold plating, plating the whole trace length is generally not good practice from a digital signal integrity perspective. In addition, with the fastest serial transmission rates in the 10 to 20 GHz region and long serial words in some situations designers may need to consider both the associated high and low frequency performance.Originality/valueWith the development of ultra high speed digital bus architectures, PCB fabricators will appreciate the need to add an understanding of the drivers of insertion loss (base material loss tangent data, foil roughness and copper cross sectional areas) to their existing experience of architectures with minimal losses.

Predicting Microwave Digital Signal Integrity

High-speed digital signal integrity at data rates above 6 Gb/s is an obstacle to reliable serial link operation. Two signal integrity challenges include dispersion due to frequency-dependent losses and reflections created at impedance mismatches. Signal integrity analysis relies on time-domain simulation of pseudo-random data patterns. This paper explores a predictive method for interconnect eye closure caused by reflections at the transmitter and receiver and does not require extensive time domain simulation. Worst-case bounds on intersymbol interference and data-dependent jitter aid prediction for link budgets under channel variations. This method is applied to the design of a passive equalizer.

Noise properties in breaking and loose contacts and their effect on quality degradation of digital signal

Electric contact discharge is subject closely related to digital information transmission, and integrity of digital signals for realizing high reliability transmission. This kind of problem is a part of EMC (electromagnetic compatibility). From such a viewpoint, contact noise problems will be mentioned which disturb and degrade digital signals. The induction noise and radiation noise from discharge, electrostatic discharge (ESD), and connector related fundamental subject will be mentioned.

An On-Chip Multi-Channel Rail-to-Rail Signal Monitoring Technique for Sub-100-nm Digital Signal Integrity

A compact on-chip signal monitor circuit uses voltage mode sensing by a source follower circuit with small input device geometry, followed by a current-mode sample and a hold circuit that is connected to a shared current output bus. A prototype signal monitor circuit demonstrated a 1.1-GHz effective bandwidth for 1.0-V full-swing digital signals in a 90-nm CMOS technology, where the monitor used 2.5-V I/O CMOS transistors and occupied a 30μm x 120 μm silicon area. We also showed that such signal monitor circuits can be tailored to sense of power-supply, ground, as well as full-swing logic signal wirings, and form an array with a single current output. Therefore, an on-chip multi-channel signal monitor enables multiple-points as well as multiple-voltage domain waveform acquisition for the purpose of the in-depth study of digital signal integrity.

Microwaves meet digital signal integrity

Digital design now demands mixed-signal design techniques to ensure that high-speed onboard signal traces will work in the target system. The speeds now demanded by protocols such as PCI Express even demand the use of mixed-signal techniques from the microwave world.