Digital Integrated Circuit Technology Research Articles

An Investigation of the Operating Principles and Power Consumption of Digital-Based Analog Amplifiers

Digital-based differential amplifiers (DDA) are particularly suitable to low voltage digital integrated circuit technologies. This paper presents an exhaustive analysis of digital-based analog amplifiers to take advantage of today’s high-performance digital technologies, and of computer aided design (CAD), which is commonly employed to design integrated circuits. The operating principle and the main mathematical relations of digital-based differential amplifiers are discussed along with an exhaustive explanation of its operating regions and of the corresponding power consumption. These aspects, which are not discussed in the literature, are very important for the circuit designers. Finally, a detailed description of the design procedure of the UMC 180nm standard CMOS technology is provided.

Scaling Trends of Digital Single-Event Effects: A Survey of SEU and SET Parameters and Comparison With Transistor Performance

The history of integrated circuit (IC) development is another record of human challenges involving space. Efforts have been made to protect ICs from sudden malfunctions due to single-event effects (SEEs). These effects are triggered by only a single strike of particle radiation, such as an $\alpha $ -ray or cosmic ray, originating from our solar activity and galactic events including supernovas. This article explores how SEEs have evolved along with the progress in complementary metal-oxide-semiconductor (CMOS) digital IC technology, or device scaling, from the early micrometer-scale generations to the current nanometer-scale generations. For this purpose, focusing on basic digital elements, that is, inverters and static random access memories (SRAMs), this study collected more than 100 sets of data on four characteristic parameters of single-event upsets (SEUs) and single-event transients (SETs), both of which are undesired flips in digital logic states. The results show that all the examined parameters, such as the SEU critical charge, decrease with the device feature size. Analysis involving structure classification, such as bulk versus silicon-on-insulator (SOI) substrates and planar versus fin channels, reveals relationships between the examined SEE parameters and other device features such as the power supply voltage. All the data collected in this survey are explicitly given in tables for future exploration of IC reliability.

A Digital-Based Ultra-Low-Voltage Pseudo-Differential CMOS Schmitt Trigger

A digital-based Pseudo-differential Schmitt trigger is proposed in this paper which is suitable for ultra-low voltages and pure digital integrated circuit technologies. The proposed Schmitt trigger is implemented according to the design procedure of an analog Schmitt trigger and only using digital CMOS inverters. It is composed of a differential comparator consisting of two CMOS inverters and a cross-coupled inverter pair positive feedback which has simultaneously two outputs of noninverting and inverting. The proposed circuit is the only digital Schmitt trigger which operates in differential mode and its hysteresis center can be changed by the input voltage. Implementing the circuit in digital-based allows the proposed Schmitt trigger to operate in 0.4[Formula: see text]V ultra-low-voltage. Principle operation of the proposed circuit is discussed theoretically and using formulas and its performance is verified by simulation in TSMC 0.18[Formula: see text][Formula: see text]m CMOS process. The proposed circuit occupies only [Formula: see text][Formula: see text][Formula: see text]m2 chip area due to the very low number of transistors. The hysteresis width of the proposed Schmitt trigger is 205[Formula: see text]mV and consumes only 6.64[Formula: see text]nW power.

A Digital-Based Analog Differential Circuit

A novel, digital-in-concept approach in the design of analog differential circuits, suitable to very low voltage, aggressively scaled, pure digital integrated circuit technologies, is explored in this paper. A differential stage based on the proposed technique is presented and its operation as a voltage comparator and as an operational amplifier in negative feedback configurations is discussed and demonstrated on the basis of theory and simulations. The practical feasibility of the proposed approach is finally verified by experiments carried out on a proof-of-concept prototype.

Home-built magnetic resonance imaging system (0.3 T) with a complete digital spectrometer

A home-built magnetic resonance imaging (MRI) system with a complete digital spectrometer has been designed for investigation of plants and animals. With the application of the latest digital integrated circuit technology, the digital spectrometer is greatly simplified without the loss of flexibility and performance. A powerful pulse sequence compiler with a graphical editor can allow the user to edit the pulse sequence more easily and more conveniently than ever before. Moreover, a permanent magnet capable of producing a 180 mm diam spherical homogeneous region is employed in our MRI system to ensure a comparatively large image size. Compared with previous work, our MRI system has the features of flexibility, relatively large imaging size, and low cost. Experimental results obtained with the proposed system are presented in this article.

Robust technique for on-chip DC current measurements

A robust and highly scalable technique for measuring DC currents is described. The circuit consists largely of digital electronics except for a comparator and a passive RC filter. This simple structure is able to force a voltage at a circuit node while measuring the current that flows into it. The technique has been successfully demonstrated using a prototype constructed using a 0.35mm CMOS chip. The demand for highly integrated mixed-signal ICs has increased rapidly in recent years. This is mostly driven by the communications industry. However, as the level of integration increases, more and more analogue components are becoming buried deep inside the digital circuitry without external I/O access. Consequently, initial device character- isation and production testing of these components has become more challenging. An area of IC testing that is being affected by this high level of integration are the DC parametric tests. These tests are conducted to characterise a wide variety of mixed-signal circuits such as analogue-to-digital converters (ADCs), PLLs and bias networks. Also, these tests are needed in digital test applications such as pad current leakage and IDDQ tests. One type of DC parametric tests that is of focus involves forcing a voltage at a circuit node while measuring the current that flows into it. The traditional method for on- chip current measurements is by using a transimpedance amplifier (1, 2), an integrating network (3, 4) or a shunt resistance (5). However, all of these circuits involve the use of elaborate ADCs with trimmed components, which makes them more expensive and relatively nonscalable for on-chip implementation. This paper presents a novel technique for force-voltage current measurements. It makes use of simple ADCs and programmable voltage references (DACs) to capture the DC transfer characteristic of an internal load at different current levels. Once known, the transfer characteristic of the internal load can be used indirectly to determine the value of an unknown current level connected to the test circuit. The proposed method requires mostly digital logic with the exception of a comparator and several passive RC components. As a result, the circuit architecture will be able to take advantage of the down-scaling of digital integrated circuit technology and not be affected by the reduction in power supply voltages. Also, the system is programmable,

Chip-scale modules for high-level integration in the 21st century

This paper describes a new level of integration and innovation required to meet the integrated circuit (IC)- and system-level challenges of the 21 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">st</sup> century. We present a technology platform in which chip-scale modules (CSMs) provide greater functionality, higher performance, lower cost, and faster time to market for many of today's emerging products. Our approach is to build CSMs that overcome formidable integration barriers without compromising individual IC technologies. By integrating various IC technologies and their supporting components, we exceed single on-chip performance. Functionality is increased through integration, and performance is improved by maintenance of an on-chip electrical environment. Applications include integrating large blocks of memory with logic, mixing analog and digital IC technologies, and integrating high-frequency ICs with high-quality (high-Q) passive components. The CSM technology platform is poised to unlock the full potential of IC technology and unleash the innovations of designers.

Optical repeater circuit design based on InAlAs/InGaAs HEMT digital IC technology

This paper describes an optical repeater circuit that uses an InAlAs/InGaAs HEMT digital integrated circuit (IC) chip set. The chip set includes a 64-Gb/s 2:1 multiplexer (MUX), a 40-Gb/s demultiplexer (DEMUX), a 46-Gb/s decision circuit (DEC), and a 48-GHz frequency divider (DIV). Electrically multiplexed and demultiplexed 40-Gb/s 300-km transmission is successfully demonstrated.

The application of gallium arsenide integrated circuit technology to the design and fabrication of future generation digital signal processors: promises and problems

The development of gallium arsenide digital integrated circuit technology has progressed rapidly during the past decade. It is argued that in order to derive the maximum benefit from this technology as it is inserted into next-generation signal and data processors, all aspects of the design, assembly, testing, and maintenance of the systems will have to be considered synergistically. Salient issues which must be considered in the implementation of these advanced digital processors are reviewed, including the effects of system, logic board, chip layout, and packing constraints on memory layout, logic design, and arithmetic implementation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The Need for a Wholistic Design Approach when using Gallium Arsenide Technology

The emerging Gallium Arsenide digital integrated circuit technology is rapidly becoming well enough established that designers of signal and data processors are planning its incorporation into advanced computational engines of all types. An examination of the characteristics of present and future generation GaAs integrated circuits indicates that they will emphasize moderate on-chip gate counts and high gate speeds. Complete advantage can be taken of GaAs digital technology only if traditional signal processor architectures are completely recast at the memory layout, logic design, arithmetic implementation, and system architecture levels, and if these issues are considered in combination with system, logic board, and chip layout and packaging constraints in a single integrated approach.

TheSLC 96Subscriber Loop Carrier System: Overview

Like all digital transmission systems, digital subscriber loop carrier seems destined to play an ever-increasing role in modern communication networks. This trend derives its strength from basic and pervasive factors: (1) the great ease with which digital transmission can support new services, particularly those related to any form of data transmission; (2) the seemingly inexhaustible potential of digital integrated circuit technology to realize ever-decreasing cost, size, and power-per-circuit function; (3) the great promise digital transmission holds for synergy with digital switching. This paper provides an overview to a series of papers that describe in detail AT&T Technologies eminently successful entry in this market, the SLC® 96 Subscriber Loop Carrier System. Emphasis is placed on the background leading to the development and the forces that shaped the system's architecture.

New Biomedical Disciplines and Advances in Computer Performance through Speed Enhancements - Convergence of Problems and Solutions

A class of signal processing problems has been identified which is characterized by input data bandwidths greater than 100 × 106 bytes/second and/or by throughput requirements beyond 5 × 108 arithmetic operations/second, thereby requiring specialized hardware processor implementations for their solution. Examples of such problems from biomedical environment will be presented and discussed. These large computational problems may be suitable candidates for solution by means of an emerging digital integrated circuit technology based upon Gallium Arsenide substrate material, in which the switching speed of the basic gates is enhanced. The technology of GaAs devices, the digital systems which will employ them in an optimal manner, and the tools necessary to design these systems to operate in very high frequency regimes, are described and reviewed.

Recent Advances in GaAs Digital IC Technology

Interest in the GaAs digital integrated circuit technology is growing at a rapid pace. In this paper a comparative analysis of the GaAs FET technology and Si technologies is made. Recent developments at our laboratory are discussed. These include: (1) The implementation of the processing of 3 inch diameter wafers, which brings GaAs fabrication in line with standard semiconductor precessing; (2) Data on the performance of frequency divider circuits showing operation at clock rates as high as 2.6 GHz for a simple D-flip-flop architecture (equivalent to 77 ps average NOR gate propagation delay), and showing excellent performance over a wide temperature range; (3) the design of a GaAs RAM cell capable of very low static power dissipation (>1 µW/bit).

Performance of digital integrated circuit technologies at very high temperatures: John L. Prince, Bruce L. Draper, E. A. Rapp, J. N. Kronberg and Lewis T. Fitch IEEE Trans. Components, Hybrids, Manuf. Technol.CHMT-3(4) 571 (December 1980)

Performance of digital integrated circuit technologies at very high temperatures: John L. Prince, Bruce L. Draper, E. A. Rapp, J. N. Kronberg and Lewis T. Fitch IEEE Trans. Components, Hybrids, Manuf. Technol.CHMT-3(4) 571 (December 1980)

Performance of digital integrated circuit technologies at very high temperatures : John L. Prince, Bruce L. Draper, E. A. Rapp, J. N. Kronberg and Lewis T. Fitch. IEEE Trans. Components, Hybrids, Manuf. Technol.CHMT-3 (4) 571 (December 1980)

Performance of digital integrated circuit technologies at very high temperatures : John L. Prince, Bruce L. Draper, E. A. Rapp, J. N. Kronberg and Lewis T. Fitch. IEEE Trans. Components, Hybrids, Manuf. Technol.CHMT-3 (4) 571 (December 1980)

Process evaluation test structures and measurement techniques for a planar GaAs digital IC technology

The successful development of a new integrated circuit (IC) technology requires a significant effort in process evaluation. This is particularly true for the high-speed low-power planar GaAs digital IC technology, which involves a relatively new semiconductor material, new processing techniques, and pursues LSI complexity using very-fine-line lithography (1-µm dimensions). This paper contains a review of the strategy employed to monitor and evaluate each of the key process steps, and to evaluate the uniformity of device parameters. The principal process evaluation test structures are discussed along with measurement techniques, and examples of measurement results are given. Our emphasis on measurement automation to facilitate the collection of a large volume of data and their statistical analysis is reflected in the paper. Examples of wafer statistics are given.

Performance of Digital Integrated Circuit Technologies at Very High Temperatures

Results of detailed investigations of the performance and reliability of digital bipolar and complementary metal-oxide-semiconductor (CMOS) integrated circuits over the 25-340°C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results from experimental simulations of dielectrically isolated CMOS are also discussed. In general, it was found that commercial Schottky-clamped transistor-transistor logic (TTL) and dielectrically isolated, low power Schottky-clamped TTL functioned to junction temperatures in excess of 325°C. Standard gold-doped TTL functioned only to 250°C, while commercial isolated integrated injection logic (l2L) functioned to the range of 250-275°C. Commercial junction-isolated CMOS, buffered and unbuffered, functioned to the range of 280-310+°C, depending on the manufacturer. Experimental simulations of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340°C. High temperature life testing of experimental, silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious lifelimiting problems to date. No barrier to reliable functionality of TTL bipolar or CMOS integrated circuits at temperatures in excess of 300°C has been found.

VLSI Impact on microprocessor evolution, usage, and system design

The rapidly expanding capability of Large-Scale and Very-Large-Scale Integration (LSI and VLSI) and their interaction with computer technology gave birth to the now ubiquitous microprocessor. Recent trends in digital integrated-circuit technology and their impact on microprocessor technology will be reviewed. Additionally, we will categorize microprocessors, discuss the microprocessor industry, and overview their impact on industrial, commercial, and consumer applications. Finally, we will discuss the impact VLSI will have on both chip and system design.

VLSI Impact on Microprocessor Evolution, Usage, and System Design

The rapidly expanding capability of Large-Scale and Very-Large-Scale Integration (LSI and VLSI) and their interaction with computer technology gave birth to the now ubiquitous microprocessor. Recent trends in digital integrated-circuit technology and their impact on microprocessor technology will be reviewed. Additionally, we will categorize microprocessors, discuss the microprocessor industry, and overview their impact on industrial, commercial, and consumer applications. Finally, we will discuss the impact VLSI will have on both chip and system design,

A Flexible Digital and Analogue Hybrid Integrated Circuit Technology

A Flexible Digital and Analogue Hybrid Integrated Circuit Technology