Differential Transconductance Research Articles

A Novel Dual-Mode Dual Type Hysteresis Schmitt Trigger and its Applications using Single Differential Voltage Current Conveyor Transconductance Amplifier

A Novel Dual-Mode Dual Type Hysteresis Schmitt Trigger and its Applications using Single Differential Voltage Current Conveyor Transconductance Amplifier

Multifunctional Phototransistor Based on Double Van der Waals Heterojunction with Reversed Band Edge Bending

AbstractDouble van der Waals heterojunctions (vdWHs) based on 2D materials showcase multifunctional properties, including anti‐ambipolar behavior and polarization‐sensitive photodetection capabilities, providing a new degree of freedom for the development of next‐generation integrated electronics and optoelectronics. Herein, this work reports an anti‐ambipolar transistor with high polarized photosensitivity based on MoS2/Ta2NiS5/WSe2 double vdWH with back‐to‐back type‐I band alignment. It demonstrates a noticeable negative differential transconductance with an ultrahigh peak‐to‐valley ratio of 4.3 × 104 and a bidirectional transconductance variation from 41.6 to −17.5 nS when VD = 2 V. It is ascribed to the effective gate‐modulation of the reversed band edge bending at the double vdWH interfaces. Additionally, the structure benefits from a photogating effect and the anisotropic Ta2NiS5 interlayer, achieving a peak responsivity of 120.58 A W−1 and a decent specific detectivity of 2.65 × 1012 Jones at VD = 2 V and Vg = 5 V and exhibiting an exceptional photocurrent anisotropic ratio of 15.31 via the photovoltaic effect under 635 nm light. These findings not only expand the potential applications of the advanced 2D Ta2NiS5 material but also offer valuable insights for the development of multifunctional optoelectronic devices leveraging 2D double vdWHs.

A Mixture of Negative-, Zero-, and Positive-Differential Transconductance Switching from Tellurium/Indium Gallium Zinc Oxide Heterostructures.

Conventional transistors have long emphasized signal modulation and amplification, often sidelining polarity considerations. However, the recent emergence of negative differential transconductance, characterized by a drain current decline during gate voltage sweeping, has illuminated an unconventional path in transistor technology. This phenomenon promises to simplify the implementation of ternary logic circuits and enhance energy efficiency, especially in multivalued logic applications. Our research has culminated in the development of a sophisticated mixed transconductance transistor (M-T device) founded on a precise Te and IGZO heterojunction. The M-T device exhibits a sequence of intriguing phenomena, zero differential transconductance (ZDT), positive differential transconductance (PDT), and negative differential transconductance (NDT) contingent on applied gate voltage. We clarify its operation using a three-segment equivalent circuit model and validate its viability with IGZO TFT, Te TFT, and Te/IGZO TFT components. In a concluding demonstration, the M-T device interconnected with Te TFT achieves a ternary inverter with an intermediate logic state. Remarkably, this configuration seamlessly transitions into a binary inverter when it is exposed to light.

0.5 V Multiple-Input Fully Differential Operational Transconductance Amplifier and Its Application to a Fifth-Order Chebyshev Low-Pass Filter for Bio-Signal Processing.

This paper presents a multiple-input fully differential operational transconductance amplifier (MI-FD OTA) with very low power consumption. To obtain a differential MOS pair with minimum supply voltage and minimum power consumption, the multiple-input bulk-driven MOS transistor operating in the subthreshold region is used. To show the advantage of the MI-FD OTA, a fifth-order Chebyshev filter was used to realize a low-pass filter capable of operating with a supply voltage of 0.5 V and consuming 60 nW at a nominal setup current of 3 nA. The proposed filter uses five MI-FD OTAs and five capacitors. The total harmonic distortion (THD) was 0.97% for a rail-to-rail sinusoidal input signal. The MI-FD OTA and the filter application were designed and simulated in the Cadence environment using a 0.18 µm CMOS process from TSMC. The robustness of the design was confirmed by Monte Carlo analysis and process, voltage, and temperature corner analysis.

Charge transfer mechanism for realization of double negative differential transconductance

With development of information age, multi-valued logic (MVL) technology utilizing negative differential transconductance (NDT) phenomenon has drawn attention as next-generation computing technology that can replace binary logic. However, because conventional NDT devices primarily use ternary logic, multiple-peak NDT device is required for higher-radix MVL that can process more datasets. Here, van der Waals double-peak anti-ambipolar transistor (AAT) as NDT device was developed by utilizing peak voltage (Vpeak) modulation of NDT peak. For realization of quaternary logic, Vpeak modulation technology was developed through charge transfer mechanism from channel, thereby shifting NDT peak and increasing peak-to-valley current ratio (PVCR). Furthermore, Double-peak AAT was implemented through parallel configuration of two AATs with different Vpeak values. Finally, quaternary inverter with four widely stable logic states was implemented by utilizing the developed double-peak AAT with two distinct NDT peaks and high PVCR. This double-peak AAT is expected to contribute to the development of next-generation MVL technology capable of processing datasets.

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits.

Multivalued logic (MVL) technology is a promising solution for improving data density and reducing power consumption in comparison to complementary metal-oxide-semiconductor (CMOS) technology. Currently, heterojunction transistors (TRs) with negative differential transconductance (NDT) characteristics, which play an important role in the function of MVL circuits, adopt organic or 2D semiconductors as active layers, but it is still difficult to apply conventional CMOS processes. Herein, we demonstrate an oxide semiconductor (OS) heterojunction TR with NDT characteristics composed of p-type copper(I) oxide (Cu2O) and n-type indium gallium zinc oxide (IGZO) using the conventional CMOS manufacturing processes. The electrical characteristics of the fabricated device exhibit a high Ion/Ioff ratio (∼3 × 103), wide NDT ranges (∼29 V), and high peak-to-valley current ratios (PVCR ≈ 25). The electrical properties of 15 devices were measured, confirming uniform performance in the PVCR, NDT range, and Ion/Ioff ratio. We analyze the device operation by varying the source/drain (S/D) position and changing the device geometry and the thickness of the Cu2O layer. Additionally, we demonstrate heterojunction ambipolar TR to elucidate the transport mechanism of NDT devices at a high gate voltage (VGS). To confirm the feasibility of the MVL circuit, we present a ternary inverter with three clearly expressed logic states that have a long intermediate state and greater margin of error induced by wide NDT regions and high PVCR.

0.5-V 281-nW Versatile Mixed-Mode Filter Using Multiple-Input/Output Differential Difference Transconductance Amplifiers.

This paper presents a new low-voltage versatile mixed-mode filter which uses a multiple-input/output differential difference transconductance amplifier (MIMO-DDTA). The multiple-input of the DDTA is realized using a multiple-input bulk-driven MOS transistor (MI-BD-MOST) technique to maintain a single differential pair, thereby achieving simple structure with minimal power consumption. In a single topology, the proposed filter can provide five standard filtering functions (low-pass, high-pass, band-pass, band-stop, and all-pass) in four modes: voltage (VM), current (CM), transadmittance (TAM), and transimpedance (TIM). This provides the full capability of a mixed-mode filter (i.e., twenty filter functions). Moreover, the VM filter offers high-input and low-output impedances and the CM filter offers high-output impedance; therefore, no buffer circuit is needed. The natural frequency of all filtering functions can be electronically controlled by a setting current. The voltage supply is 0.5 V and for a 4 nA setting current, the power consumption of the filter was 281 nW. The filter is suitable for low-frequency biomedical and sensor applications that require extremely low supply voltages and nano-watt power consumption. For the VM low-pass filter, the dynamic range was 58.23 dB @ 1% total harmonic distortion. The proposed filter was designed and simulated in the Cadence Virtuoso System Design Platform using the 0.18 µm TSMC CMOS technology.

Tunable floating and grounded memristor emulator Model

ABSTRACT A Differential Difference Current Conveyor Transconductance Amplifier (DDCCTA) based resistor tunable memristor emulator has been proposed in this work. The emulator can be used in both grounded and floating circumstances. The proposed design incorporates only one active block along with few passive components. Moreover, the circuit can operate in both incremental and decremental modes, by simply changing the input ports. The circuit demonstrates all the characteristics of an ideal memristor up to 6 MHz. The proposed model has been simulated using TSMC 0.18m process parameter and occupies an area of 51 × 42.5 m2 chip-area, excluding capacitor. The circuit’s reliability has been verified by studying non-ideal, non-volatile, Monte-Carlo, process corner variations analysis. The circuit applicability has been tested through series/parallel combinations. To validate the experimental demonstration, AD844AN and CA3080 have been used to make a prototype, which shows good agreement with theoretical and simulation results.

A 0.8 V, 14.76 nVrms, Multiplexer-Based AFE for Wearable Devices Using 45 nm CMOS Techniques.

Wearable medical devices (WMDs) that continuously monitor health conditions enable people to stay healthy in everyday situations. A wristband is a monitoring format that can measure bioelectric signals. The main part of a wearable device is its analog front end (AFE). Wearables have issues such as low reliability, high power consumption, and large size. A conventional AFE device uses more analog-to-digital converters, amplifiers, and filters for individual electrodes. Our proposed MUX-based AFE design requires fewer components than a conventional AFE device, reducing power consumption and area. It includes a single-ended differential feedback operational transconductance amplifier (OTA) and n-pass MUX-based AFE circuits which are related to the emergence of low power, low area, and low cost AFE-integrated chips that are required for wearable biomedical applications. The proposed 6T n-pass multiplexer measures a gain of -68 dB across a frequency range of 100 kHz with a 136.5 nW power consumption and a delay of 0.07 ns. The design layout area is approximately 9.8 µm2 and uses 45 nm complementary metal oxide semiconductor (CMOS) technology. Additionally, the proposed single-ended differential OTA has an obtained input referred noise of 0.014 µVrms, and a gain of -5.5 dB, while the design layout area is about 2 µm2 and was designed with the help of the Cadence Virtuoso layout design tool.

Superionic Silver Halide Solid Electrolyte: Dielectric Property and Iontronic Memtransistor Application for Bioinspired Computing

AbstractTechnology like high‐level parallel information processing and storage in the brain remains a dream to the researchers using conventional solid‐state electronics. Here, a robust thin film bilayer superionic dielectric of poly(ethylene oxide) (PEO) and rubidium silver iodide (RbAg4I5) is developed to fabricate solid‐state iontronic synaptic memtransistors, which can serve as the basic building blocks for the hardware‐implementation of neuromorphic computing. X‐ray photoelectron spectroscopy and impedance measurements precisely confirm the stoichiometric composition of RbAg4I5 and dielectric nature combining with a PEO layer, respectively. The superionic bilayer PEO/RbAg4I5 gating effectively modulates the channel conductance analogously and displays memtransistor functionality. Interestingly, the transfer curves depict a colossal hysteresis yielding negative differential transconductance of peak‐to‐valley ratio up to 5 × 103 after the gate‐controlled resistive switching. Systematic electrical characterizations reveal a variety of synaptic behaviors, including the inhibitory postsynaptic current, paired‐pulse depression, and potentiation/depression curve. Finally, an artificial neural network for off‐chip digit recognition is simulated to assess the performance of the device for the neuromorphic application and achieved a test accuracy of 95.94% on the Modified National Institute of Standards and Technology dataset.

0.3-V Voltage-Mode Versatile First-Order Analog Filter Using Multiple-Input DDTAs.

This paper presents a versatile first-order analog filter using differential difference transconductance amplifiers (DDTAs). The DDTA employs the bulk-driven (BD) multiple-input MOS transistors technique (MI-MOST) operating in the subthreshold region. This results in low-voltage and low-power operational capability. Therefore, the DDTA, designed using 130 nm CMOS technology from UMC in the Cadence environment, operates with 0.3 V and consumes 357.4 nW. Unlike previous works, the proposed versatile first-order analog filter provides first-order transfer functions of low-pass, high-pass, and all-pass filters within a single topology. The non-inverting, inverting, and voltage gain of the transfer functions are available for all filters. Furthermore, the proposed structure provides high-input and low-output impedance, which is required for voltage-mode circuits. The pole frequency and voltage gain of the filters can be electronically controlled. The total harmonic distortion of the low-pass filter was calculated as -39.97 dB with an applied sine wave input signal of 50 mVpp@ 50 Hz. The proposed filter has been used to realize a quadrature oscillator to confirm the advantages of the new structure.

Single current follower differential input transconductance amplifier based grounded lossy capacitance multiplier with large multiplication factor

AbstractIn this paper, a new lossy capacitance multiplier (CM) circuit using a single current follower differential input transconductance amplifier (CFDITA), one resistor and one capacitor (virtually grounded) is presented. The proposed circuit does not require any passive component matching constraints and has independently controllable equivalent capacitance with a multiplication factor up to 7102. Both ideal and non‐ideal analyses of the proposed CM circuit are carried out and compared. The performance of the proposed CM circuit is validated using a CMOS CFDITA and its validity is supported by various analyses including frequency analysis, transient analysis, Monte‐Carlo analysis and temperature analysis. The workability of the proposed circuit is also tested using layout design, and its pre and post‐simulated results are appended. The results are further confirmed with experimental results using the AD844 and LM13700 ICs with CFDITA implementation.

Current mode multi scroll chaotic oscillator based on CDTA

Compared to voltage mode circuits, current mode circuits have advantages such as large dynamic range, fast speed, wide frequency band, and good linearity. In recent years, the development of call flow modeling technology has been rapid and has become an important foundation for analog integrated circuits. In this paper, a current mode chaotic oscillation circuit based on current differential transconductance amplifier (CDTA) is proposed. This proposed circuit fully utilizes the advantages of current differential transconductance amplifier: a current input and output device with a large dynamic range, virtual ground at the input, extremely low input impedance, and high output impedance. The linear and non-linear parts of the proposed circuit operate in current mode, enabling a true current mode multi scroll chaotic circuit. Pspice simulation results show that the current mode chaotic circuit proposed can generate multi scroll chaotic attractors.

Novel approach for implementing ternary value logic devices showing negative differential transconductance characteristics by Fowler–Nordheim tunneling

Ternary value logic (TVL) devices are gaining attention owing to the limitations of binary devices in handling the increasing amount of information. However, the development of ternary devices has been hindered by the complex structures and use of materials lacking CMOS compatibility. This study presents a novel approach to develop ultra-simple TVL devices using thin-tunnel gate dielectrics of AlOx films and TiO2 channel layer. TVL devices are obtained by employing TiO2-based transistors with AlOx films as an oxide tunneling dielectric layer. The device exhibits typical transistor switching characteristics at low gate voltage (VG) and negative differential transconductance owing to Fowler−Nordheim tunneling current at high VG. The reversible implementation of three states, namely, ON, intermediate (INT), and OFF, with the same probability, is demonstrated with excellent reproducibility even after 200 cycles. A circuit is constructed to demonstrate the three output voltage states with respect to the input voltage by connecting the TVL device to a resistor. Additionally, the value and width of the plateau region of the INT output voltage state can be tuned by adjusting the variable resistance values. These highly simplistic TVL devices have the potential for application in low-power, highly integrated, and ultra-miniature electronic devices, thanks to their high level of CMOS compatibility.

Gate-Tunable van der Waals Photodiodes with an Ultrahigh Peak-to-Valley Current Ratio.

Photodetectors and imagers based on 2D layered materials are currently subject to a rapidly expanding application space, with an increasing demand for cost-effective and lightweight devices. However, the underlying carrier transport across the 2D homo- or heterojunction channel driven by the external electric field, like a gate or drain bias, is still unclear. Here, a visible-near infrared photodetector based on van der Waals stacked molybdenum telluride (MoTe2 ) and black phosphorus (BP) is reported. The type-I and type-II band alignment can be tuned by the gate and drain voltage combined showing a dynamic modulation of the conduction polarity and negative differential transconductance. The heterojunction devices show a good photoresponse to light illumination ranging from 520-2000nm. The built-in potential at the MoTe2 /BP interface can efficiently separate photoexcited electron-hole pairs with a high responsivity of 290mAW-1 , an external quantum efficiency of 70%, and a fast photoresponse of 78µs under zero bias.

Antiambipolar Transistor with Double Negative Differential Transconductances for Organic Quaternary Logic Circuits

AbstractOrganic integrated circuits have emerged as potential candidates for next‐generation computing technology because of their low‐cost production, light weight, and mechanical flexibility. However, the incompatibility of organic devices with modern lithographic techniques leads to a major bottleneck, that is, low integration density. Herein, it is attempted to solve this issue by developing an organic quaternary inverter that exhibits four distinguishable logic states and thus, can significantly improve the level of device integration. The key component of the inverter is a double‐peaked antiambipolar transistor (DAAT) with a double sequential negative differential transconductance characteristic. First, the DAAT is developed by employing two lateral p‐n heterojunctions, namely C8‐BTBT/PTCDI‐C8 and C8‐BTBT/PhC2‐BQQDI, in which three distinct conducting paths are produced in a step‐by‐step manner in accordance with the increase in the gate voltage (VG). Next, the quaternary inverter circuit is implemented by connecting the DAAT with an n‐type transistor. The inverter exhibits four logic states with a complete drain voltage to ground voltage sweep. Finally, a strategy of optimizing the thickness of the PTCDI‐C8 layer to improve the voltage transfer characteristics of the quaternary inverters is demonstrated. This study, thus, represents a step toward the development of high‐performance organic integrated circuits.

A Fully Differential Difference Transconductance Amplifier Topology Based on CMOS Inverters

This manuscript presents a fully differential difference transconductance amplifier (FDDTA) architecture based on CMOS inverters. Designed in a 130-nm CMOS process it operates in weak inversion when supplied with 0.25 V. In addition, the FDDTA requires no supplementary external calibration circuit, like tail current or bias voltage sources, since it relies on the distributed layout technique that intrinsically matches the CMOS inverters. For analytical purposes, we carried out a detailed investigation that describes all the concepts and the whole operation of the FDDTA architecture. Furthermore, a comparison between the modeling equations and measured data assures high performance.

Diverse field-effect characteristics and negative differential transconductance in a graphene/WS2/Au phototransistor with a Ge back gate.

We propose an infrared-sensitive negative differential transconductance (NDT) phototransistor based on a graphene/WS2/Au double junction with a SiO2/Ge gate. By changing the drain bias, diverse field-effect characteristics can be achieved. Typical p-type and n-type behavior is obtained under negative and positive drain bias, respectively. And NDT behavior is observed in the transfer curves under positive drain bias. It is believed to originate from competition between the top and bottom channel currents in stepped layers of WS2 at different gate voltages. Moreover, this phototransistor shows a gate-modulated rectification ratio of 0.03 to 88.3. In optoelectronic experiments, the phototransistor exhibits a responsivity of 2.76 A/W under visible light at 532 nm. By contrast, an interesting negative responsivity of -29.5 µA/W is obtained and the NDT vanishes under illumination by infrared light at 1550 nm. A complementary inverter based on two proposed devices of the same structure is constructed. The maximum voltage gain of the complementary inverter reaches 0.79 at a supply voltage of 1.5 V. These results demonstrate a new method of realizing next-generation two- and three-dimensional electronic and optoelectronic multifunctional devices.

Shadow Filters Using Multiple-Input Differential Difference Transconductance Amplifiers.

This paper presents new voltage-mode shadow filters employing a low-power multiple-input differential difference transconductance amplifier (MI-DDTA). This device provides multiple-input voltage-mode arithmetic operation capability, electronic tuning ability, high-input and low-output impedances. Therefore, the proposed shadow filters offer circuit simplicity, minimum number of active and passive elements, electronic control of the natural frequency and the quality factor, and high-input and low-output impedances. The proposed MI-DDTA can work with supply voltage of ±0.5 V and consumes 9.94 μW of power. The MI-DDTA and shadow filters have been designed and simulated with the SPICE program using 0.18 μm CMOS process parameters to validate the functionality and workability of the new circuits.

Hybrid Inverter-Based Fully Differential Operational Transconductance Amplifiers

Inverter-based Operational Transconductance Amplifiers (OTAs) are versatile and friendly scalable analog circuit blocks. Especially for the new CMOS technological nodes, several recent applications have been extensively using them, ranging from Analog Front End (AFE) to analog-to-digital converters (ADC). This work tracks down the current advances in inverter-based OTAs design, comparing their basic fully differential structures, such as Nauta (N), Barthelemy (B), Vieru (V) and Mafredini (M) ones, and, in addition, mixing them up to propose new fully differential single-ended and two-stage hybrid versions. The new herein-proposed fully differential hybrid OTAs are the composition of Barthelemy/Nauta (B/N), Barthelemy/Manfredini (B/M), Nauta/Vieru (N/V), and Manfredini/Vieru (M/V) OTAs. All OTAs were designed using the same Global Foundries 180 nm open-source PDK and their performances are compared for post-layout simulations.