Differential Transconductance Amplifier Research Articles

A novel Bulk-Driven current differential transconductance amplifier and its applications

A novel Bulk-Driven current differential transconductance amplifier and its applications

0.5-V 281-nW Versatile Mixed-Mode Filter Using Multiple-Input/Output Differential Difference Transconductance Amplifiers.

This paper presents a new low-voltage versatile mixed-mode filter which uses a multiple-input/output differential difference transconductance amplifier (MIMO-DDTA). The multiple-input of the DDTA is realized using a multiple-input bulk-driven MOS transistor (MI-BD-MOST) technique to maintain a single differential pair, thereby achieving simple structure with minimal power consumption. In a single topology, the proposed filter can provide five standard filtering functions (low-pass, high-pass, band-pass, band-stop, and all-pass) in four modes: voltage (VM), current (CM), transadmittance (TAM), and transimpedance (TIM). This provides the full capability of a mixed-mode filter (i.e., twenty filter functions). Moreover, the VM filter offers high-input and low-output impedances and the CM filter offers high-output impedance; therefore, no buffer circuit is needed. The natural frequency of all filtering functions can be electronically controlled by a setting current. The voltage supply is 0.5 V and for a 4 nA setting current, the power consumption of the filter was 281 nW. The filter is suitable for low-frequency biomedical and sensor applications that require extremely low supply voltages and nano-watt power consumption. For the VM low-pass filter, the dynamic range was 58.23 dB @ 1% total harmonic distortion. The proposed filter was designed and simulated in the Cadence Virtuoso System Design Platform using the 0.18 µm TSMC CMOS technology.

0.3-V Voltage-Mode Versatile First-Order Analog Filter Using Multiple-Input DDTAs.

This paper presents a versatile first-order analog filter using differential difference transconductance amplifiers (DDTAs). The DDTA employs the bulk-driven (BD) multiple-input MOS transistors technique (MI-MOST) operating in the subthreshold region. This results in low-voltage and low-power operational capability. Therefore, the DDTA, designed using 130 nm CMOS technology from UMC in the Cadence environment, operates with 0.3 V and consumes 357.4 nW. Unlike previous works, the proposed versatile first-order analog filter provides first-order transfer functions of low-pass, high-pass, and all-pass filters within a single topology. The non-inverting, inverting, and voltage gain of the transfer functions are available for all filters. Furthermore, the proposed structure provides high-input and low-output impedance, which is required for voltage-mode circuits. The pole frequency and voltage gain of the filters can be electronically controlled. The total harmonic distortion of the low-pass filter was calculated as -39.97 dB with an applied sine wave input signal of 50 mVpp@ 50 Hz. The proposed filter has been used to realize a quadrature oscillator to confirm the advantages of the new structure.

Current mode multi scroll chaotic oscillator based on CDTA

Compared to voltage mode circuits, current mode circuits have advantages such as large dynamic range, fast speed, wide frequency band, and good linearity. In recent years, the development of call flow modeling technology has been rapid and has become an important foundation for analog integrated circuits. In this paper, a current mode chaotic oscillation circuit based on current differential transconductance amplifier (CDTA) is proposed. This proposed circuit fully utilizes the advantages of current differential transconductance amplifier: a current input and output device with a large dynamic range, virtual ground at the input, extremely low input impedance, and high output impedance. The linear and non-linear parts of the proposed circuit operate in current mode, enabling a true current mode multi scroll chaotic circuit. Pspice simulation results show that the current mode chaotic circuit proposed can generate multi scroll chaotic attractors.

A Fully Differential Difference Transconductance Amplifier Topology Based on CMOS Inverters

This manuscript presents a fully differential difference transconductance amplifier (FDDTA) architecture based on CMOS inverters. Designed in a 130-nm CMOS process it operates in weak inversion when supplied with 0.25 V. In addition, the FDDTA requires no supplementary external calibration circuit, like tail current or bias voltage sources, since it relies on the distributed layout technique that intrinsically matches the CMOS inverters. For analytical purposes, we carried out a detailed investigation that describes all the concepts and the whole operation of the FDDTA architecture. Furthermore, a comparison between the modeling equations and measured data assures high performance.

Shadow Filters Using Multiple-Input Differential Difference Transconductance Amplifiers.

This paper presents new voltage-mode shadow filters employing a low-power multiple-input differential difference transconductance amplifier (MI-DDTA). This device provides multiple-input voltage-mode arithmetic operation capability, electronic tuning ability, high-input and low-output impedances. Therefore, the proposed shadow filters offer circuit simplicity, minimum number of active and passive elements, electronic control of the natural frequency and the quality factor, and high-input and low-output impedances. The proposed MI-DDTA can work with supply voltage of ±0.5 V and consumes 9.94 μW of power. The MI-DDTA and shadow filters have been designed and simulated with the SPICE program using 0.18 μm CMOS process parameters to validate the functionality and workability of the new circuits.

0.5 V Multiple-Input Multiple-Output Differential Difference Transconductance Amplifier and Its Applications to Shadow Filter and Oscillator

This paper presents new applications of low-voltage and low-power multiple-input multiple-output differential difference transconductance amplifier (DDTA). The multiple-input bulk-driven MOS transistor (MIBD MOST) technique provides multiple-input of the active device that simplifies the application’s topology and reduces its power consumption. The proposed DDTA has been used to realize multiple-input single-output shadow filter. Both voltage- and transimpedance-mode filtering functions can be obtained. The natural frequency and the quality factor of the shadow filter can be independently and electronically controlled using DDTA-based amplifiers. The proposed shadow filter has been modified to work as a shadow oscillator. The condition and frequency of oscillation can be controlled independently and electronically. The DDTA is capable to work with 0.5V supply voltage and consumes 218.2 nW. The applications have been designed and simulated in Cadence using 0.18μm TSMC CMOS technology.

0.5 V Universal Filter and Quadrature Oscillator Based on Multiple-Input DDTA

This paper presents a universal voltage-mode filter and quadrature oscillator based on low-voltage multiple-input differential difference transconductance amplifier (MI-DDTA). Unlike the previous published DDTAs, that utilize the bulk-driven (BD) multiple-input MOS transistor technique (MI-MOST) in the differential pair of the first stage only, the proposed DDTA, for the first time, utilize the BD MI-MOST in the second stage of the DDTA. This results in capability of providing more arithmetic operations without additional current branches or power dissipation. Hence, simplify the topology of the filter and oscillator applications, by decreasing the count of active blocks. The voltage-mode filter offers high-input and low-output impedances, and both non-inverting and inverting versions of five types of transfer functions, namely low-pass, high-pass, band-pass, band-stop, and all-pass characteristics. The oscillator offers three-phase of quadrature signals, and orthogonal control of the condition and frequency of oscillations. The circuit was designed in Cadence environment using 180 nm CMOS TSMC technology. The voltage supply is 0.5 V and the power consumption of the filter is 472 nW. The simulation results are in accordance with theory and confirm the performance of the proposed circuit.

0.4-V Tail-Less Quasi-Two-Stage OTA Using a Novel Self-Biasing Transconductance Cell

This work presents a tail-less fully differential bulk-driven transconductance amplifier without using a common-mode feedback (CMFB) circuit. The proposed amplifier employs two P-type and N-type current mirrors to form two self-biasing positive feedback loops resulting in a double transconductance. The bulk terminals of the P-type current mirrors are used as the input nodes to provide a high input dynamic range. The diode-connected topologies of the current mirrors adaptively bias other transistors to cover the lack of the CMFB circuit. To ensure stability, additional current sources are paralleled with the positive feedback structures. A high output voltage swing and a high DC gain are achieved by adding an adaptively biased common-source amplifier as the output stage leading to a class-AB operation. A large signal analysis, in weak inversion, is also done to mathematically describe both small- and large-signal characteristics. The proposed circuit was fabricated using TSMC <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18 \mu \text{m}$ </tex-math></inline-formula> CMOS technology occupying a silicon area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$113\,\,\mu \text{m}\,\,\times 70\,\,\mu \text{m}$ </tex-math></inline-formula> . Experimental results at a supply voltage of 0.4 V show a gain bandwidth of 7 kHz, a DC gain of 60 dB, and a slew rate of 79 V/ms with just 24 nW power dissipation while driving a capacitive load of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times 15$ </tex-math></inline-formula> pF.

Fully Differential Current-Mode Configuration for the Realization of First-Order Filters with Ease of Cascadability

It is well known that fully differential signal processing is more advantageous than single-ended signal processing in a noisy environment, and is widely used in audio, video and other signal processing applications. This paper introduces a new fully differential configuration that contains a first-order low-pass (LP) filter, high-pass (HP) filter, and all-pass (AP) filter, all present within the same circuit design. The proposed fully differential configuration is simple and employs only one multiple-output current differencing transconductance amplifier and one grounded capacitor. The circuit has a wide operating frequency range (up to 73 MHz). The additional features offered by the proposed circuit include use of the lowest number of active and passive components, suitability of the integrated circuit chip, support of cascadability, electronic tunability, no passive component-matching restrictions, availability of all first-order responses, i.e., LP, HP, and AP, and low-level operating supply voltages. Non-ideal and parasitic analyses are investigated for the proposed circuit, and PSPICE simulation results are presented to verify the proposed theory. Additionally, the proposed fully differential LP filter circuit is experimentally verified using off-the-shelf ICs. Moreover, the cascading feasibility is demonstrated by realizing a fully differential nth-order LP filter.

1.2 V Differential Difference Transconductance Amplifier and Its Application in Mixed-Mode Universal Filter.

This paper presents a new mixed-mode universal filter based on a differential difference transconductance amplifier (DDTA). Unlike the conventional transconductance amplifier (TA), this DDTA has both advantages of the TA and the differential difference amplifier (DDA). The proposed filter can offer four-mode operations of second-order transfer functions into a single topology, namely, voltage-mode (VM), current-mode (CM), transadmittance-mode (TAM), and transimpedance-mode (TIM) transfer functions. Each operation mode offers five standard filtering responses; therefore, at least twenty filtering transfer functions can be obtained. For the filtering transfer functions, the matching conditions for the input and passive component are absent. The natural frequency and the quality factor can be set orthogonally and electronically controlled. The performance of the proposed topology was evaluated by PSPICE simulator using the 0.18 µm CMOS technology from the Taiwan Semiconductor Manufacturing Company (TSMC). The voltage supply was 1.2 V and the power dissipation of the DDTA was 66 µW. The workability of the filter was confirmed through experimental test by DDTA-based LM13600 discrete-component integrated circuits.

0.3-Volt Rail-to-Rail DDTA and Its Application in a Universal Filter and Quadrature Oscillator.

This paper presents the extremely low-voltage supply of the CMOS structure of a differential difference transconductance amplifier (DDTA). With a 0.3-volt supply voltage, the circuit offers rail-to-rail operational capability. The circuit is designed for low-frequency biomedical and sensor applications, and it consumes 357.4 nW of power. Based on two DDTAs and two grounded capacitors, a voltage-mode universal filter and quadrature oscillator are presented as applications. The universal filter possesses high-input impedance and electronic tuning ability of the natural frequency in the range of tens up to hundreds of Hz. The total harmonic distortion (THD) for the band-pass filter was 0.5% for 100 mVpp @ 84.47 Hz input voltage. The slight modification of the filter yields a quadrature oscillator. The condition and the frequency of oscillation are orthogonally controllable. The frequency of oscillation can also be controlled electronically. The THD for a 67 Hz oscillation frequency was around 1.2%. The circuit is designed and simulated in a Cadence environment using 130 nm CMOS technology from United Microelectronics Corporation (UMC). The simulation results confirm the performance of the designed circuits.

0.5 V Differential Difference Transconductance Amplifier and Its Application in Voltage-Mode Universal Filter

This paper presents an innovative CMOS structure for Differential Difference Transconductance Amplifiers (DDTA). While the circuit operates under extremely low voltage supply 0.5 V, the circuit’s performance is improved thanks to using the multiple-input MOS transistor (MI-MOST), the bulk-driven, self-cascode and partial positive feedback (PPF) techniques. As a result, the DDTA structure is less complex, with high gain of 93 dB, wide input voltage range nearly rail-to-rail, and wide transconductance tunability. As an example of application, a second-order voltage-mode universal filter using three DDTAs and two 6 pF integrated capacitors is presented. The filter is designed such that no matching conditions are required for the input and passive components, and the input signals need not be inverted. The natural frequency and the quality factor can be set orthogonally while the natural frequency can be electronically controlled. The circuit was designed and simulated in Cadence environment using <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18 \mu \text{m}$ </tex-math></inline-formula> TSMC technology. The simulation results including intensive Monte-Carlo (MC) and process, temperature, voltage (PVT) analysis confirm the stability and the robustness of the design to process, mismatch variation and PVT corners.

Electronically Tunable Universal Filter and Quadrature Oscillator Using Low-Voltage Differential Difference Transconductance Amplifiers

This paper presents a new electronically tunable universal filter and quadrature oscillator for low frequency biomedical and biosensor applications employing low-voltage differential difference transconductance amplifier (DDTA). The DDTA CMOS structure uses 0.5 V of supply voltage and consumes 277 nW of power. Unlike the previous universal filters, the proposed filter provides many transfer functions of the standard five transfer functions such as low-pass, high-pass, band-pass, band-stop and all-pass with both unity and controlled voltage gains as well as both inverting and non-inverting transfer functions. The natural frequency and the voltage gain of the five standard transfer functions can be controlled electronically. For the band-pass filter, the third intermodulation distortion (IMD₃) was 0.37&#x0025; for 20 mV_pp input signal while the output integrated noise was 61.37 <inline-formula> <tex-math notation="LaTeX">$\mu \text{V}$ </tex-math></inline-formula>. The dynamic range (DR) was 53.27 dB for 1&#x0025; IMD₃. The quadrature oscillator has electronically and orthogonal control of the condition and frequency of oscillation. The proposed circuit and its applications were designed and verified via Cadence simulator tool using 0.13 <inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> UMC CMOS technology. Further, the circuit was evaluated by PSPICE simulation and experiment test using commercial OTA LM13700.

Voltage tunable current MODE KHN filter based on current differencing transconductance amplifier (CDTA)

The era of SoC design has great dependency on CMOS circuits owing to its low power and high reliability which could contribute in the effective circuit designing. Here, a unique approach for the designing of voltage tunable current differencing transconductance amplifier (CDTA) is reported for the realization of Kerwin–Huelsman–Newcomb (KHN) filter. The proposed design has been simulated by using Cadence Virtuoso simulation tool with 0.18 [Formula: see text]m technology parameters. This design is based on input voltage-based gain and frequency of operation tuning approach. In this reported design of filter, cutoff frequency can be tailored by input voltage instead of input current. This relaxes the need for the iterative circuit modifications to work in a particular frequency range. Thus, the reported CDTA design is expected to be robust and offers higher design flexibility as there is now no need of iterative designing and calibration in this approach. This also exhibits retained area requirement as per the current state of the art for the KHN filters. Further, the performance of designed CDTA-based KHN filter has also been verified with the existing KHN filters.

CMOS Realization of Fully Electronically Tunable Single Resistance Control Mixed Mode Biquad Filter Employing Single VDTA at ± 0.6V

This paper presents a single VDTA based Mixed Mode type Biquad filter. The proposed Transadmittance Mode (TAM) type Biquad filter configuration employed single voltage differencing transconductance amplifier (VDTA) as an active building block, three passive element namely one grounded resistor, one grounded capacitor and one floating capacitor. The proposed transadmittance Mode multifunction Biquad filter configuration is presenting transadmittance mode type four basic standard filter functions low pass, high pass, band pass, band reject or band stop or band eliminate filter responses. These four type filter responses are realizing simultaneously with the selection of single input voltage signal. The proposed Transadmittance Mode multifunction Biquad filter configuration has more advantageous features such as low active and passive sensitivities, low power supply voltage, low power consumption, low quality factor, very low power consumption, more electronic tunability, higher linearity and required small area of the chip. The performance of the proposed configuration has been verified through PSPICE simulation using 0.18μm CMOS Technology process parameters.

Floating Memristor and Inverse Memristor Emulators with Electronic Tuning

The work reports two different configurations to emulate the floating memristor and inverse memristor behavior. The presented circuits are based on a modified concept of active element VDTA (Voltage Differencing Transconductance Amplifier) termed as MVDTA. The reported floating memristor employs only a single MVDTA and single grounded capacitance. On the other end, the floating emulation circuit of inverse memristor emulator is based on two MVDTAs and single grounded capacitance. The behavior of the realized element for both the configurations can be tuned electronically through biasing voltage. Also, there is no employment of any commercial IC or external circuitry for multiplication of analogue voltages which is generally required to implement memristive elements. Along with the circuit implementations, mathematical properties of ideal memristor and inverse memristor considering both symmetric as well as nonsymmetric models are discussed. All the emulation circuits are verified by executing simulations using CMOS 0.18[Formula: see text]um process technique under PSPICE environment. The reported circuits are also realized using commercially available IC LM13700 and results are presented.

Design and experimentation of VDTA based oscillators using commercially available integrated circuits

With the focus of employing single Voltage Differencing Transconductance Amplifier (VDTA) in designing of electronically tunable oscillators, three configurations have been proposed in this manuscript. Each configuration enjoys an efficient integrated circuit implementation due to use of grounded capacitors. Unambiguous and independent control of its condition and frequency of oscillation is an additional feature which is available in all the configurations along with the quadrature outputs in voltage mode. The designed configurations have been tested both through simulation and experimental setup employing a newly proposed hardware arrangement of VDTA designed using off the shelf IC, i.e., OPA860. Moreover, the oscillators have also been experimentally justified with already available hardware realization of VDTA. Experimentation results generated using two different ICs, with two different hardware setups, have been tabulated so as to provide an illustrative study of the performances of oscillators.

Odd- and even-order electronically controlled wave active filter employing differential difference trans-conductance amplifier (DDTA)

ABSTRACT In recent years, several current mode wave active filters have been reported in literature. However, most schemes only have a few higher-order filters that employ a wave-equivalent inductor in a series branch as well as a wave-equivalent capacitor in the shunt branch. As a result, it is very difficult to design wave active filters with all the filter frequency responses using lower – to higher-order filters. Hence, in this research work, we propose to construct a uniform framework for the design of a wave active filter using a complementary metal oxide semiconductor (CMOS) differential difference transconductance amplifier (DDTA) for lower and higher-order filter configurations. A traditional wave-equivalent method is incorporated for the reflected and incident waves of series and shunt inductors and capacitors. The theoretical verification of the proposed wave active filter uses second-order, third-order, fourth-order, fifth-order, and sixth-order filter designs. Technical verification is conducted through Simulation Program with Integrated Circuit Emphasis (SPICE) simulations using the Cadence Virtuoso tool with 0.18 µm CMOS (Taiwan Semiconductor Manufacturing Company, TSMC) parameters for the DDTA. In addition, experimental validation of the proposed wave active filter is performed with the operational transconductance amplifier as CA3080 for the implementation of DDTA.

Design and implementation of CDTA: a review

In this paper a review on design perspective of current-mode current differential trans-conductance amplifier (CDTA) is presented for the state of the art analog signal processing/generating modules design as the main objective. The CDTA circuits are classified according to the active element used for the design with all related parameters taken into consideration. Likelihood implementations of different analog signal processing/generating modules are covered and a comparison of their main parameters trans-conductance, bandwidth, port impedances and power consumption is given. The feasibility of implementing with a lesser area is also considered from the VLSI design viewpoint. The review concludes with CDTA structures with the best possible parameters obtained and future possibilities.