Differential Through-silicon Vias Research Articles

Modeling of Carbon Nanotube-Based Differential Through-Silicon Vias in 3-D ICs

This article proposes a novel differential through-silicon via (D-TSV) structure, which is filled with vertically aligned carbon nanotube (VACNT) array. Two metal pads are deposited on the sides of the surface of the proposed D-TSV to form differential signal transmission paths. The equivalent circuit model is established for the proposed D-TSV, with the frequency-dependent impedance extracted using partial-element equivalent-circuit (PEEC) method. By virtue of the equivalent circuit model, the electrical performance of the proposed D-TSV is investigated, with some design guidance presented.

Modelling of crosstalk in differential through silicon vias for three‐dimensional integrated circuits

The crosstalk effects of differential through silicon vias (D-TSVs) are studied. The equivalent circuit model is developed, with the circuit elements extracted analytically. Using the three-dimensional (3D) full-wave field solver HFSS, the circuit model is validated up to 100 GHz. By virtue of the circuit model, the noise couplings in the D-TSVs are evaluated. It is found that the noise coupling can be cancelled in the D-TSVs for a particular case. Finally, the influence of floating silicon substrate on the crosstalk in the D-TSVs is investigated.

Signal Integrity Design and Analysis of Differential High-Speed Serial Links in Silicon Interposer With Through-Silicon Via

In this paper, we, for the first time, designed and analyzed differential high-speed serial links of the silicon interposer including differential through-silicon-via (TSV) channels for a high-bandwidth memory (HBM) graphic module. The meshed ground plane and various parameters were considered in designing the silicon interposer. In addition, superior designs were proposed to improve signal integrity (SI) for the differential channels in the redistribution layer, TSVs, and the meshed ground. SI of the silicon interposer was successfully analyzed, and the corresponding results were verified based on a full 3-D electromagnetic solver and circuit simulations. A number of RLGC parameters were extracted and calculated, then adopted to verify the simulation results. The simulation results for the differential characteristic impedance and insertion loss were compared with those of the equivalent circuit. A mixed-mode conversion matrix was utilized to analyze differential-mode transmission. Moreover, a model for differential TSV channels was proposed to precisely analyze the electrical characteristics. The eye-diagram simulation was conducted to evaluate SI of the proposed designs in terms of an eye-opening voltage and timing jitter. The eye-opening voltage of the proposed design was 0.594 V, which is 45.69% of a peak-to-peak voltage of the assumed peripheral component interconnect (PCI)-express 4.0 interfaces. It is expected that the analysis and design methodologies of differential high-speed serial links for a silicon interposer could be widely adopted in the semiconductor industry.

A Passive Equalizer Design for Shielded Differential Through-Silicon Vias in 3-D IC

This letter develops a simplified circuit model for the shielded differential through-silicon vias (SD-TSVs). The model is consisted of four frequency-independent elements and can accurately predict the insertion loss of the SD-TSVs up to 20 GHz. Based on the model, a parallel resistor–capacitor equalizer is proposed. The proposed passive equalizer achieves wide-band equalization and perfect compensation for high-speed differential signaling.

High-Frequency Electrical Modeling and Characterization of Differential TSVs for 3-D Integration Applications

This letter makes a fast and efficient analysis of the scalable differential through-silicon via (TSV) configuration in 3-D integrated circuits. The equivalent-circuit model of a differential TSV pair is described. The critical differential characteristics are analyzed and calculated in terms of a lumped-circuit model and the effective loop parameters of multi-TSVs. The calculated results are validated by the 3-D full-wave field solver high frequency simulator structure (HFSS) over a wide frequency range.

Wideband Modeling and Characterization of Differential Through-Silicon Vias for 3-D ICs

This paper presents the wideband modeling and analysis of differential through-silicon vias (D-TSVs) in 3-D ICs. An equivalent-circuit model of the ground–signal–signal–ground-type D-TSVs is given and validated against a commercial full-wave electromagnetic simulation tool. The common- and differential-mode impedances are extracted using the partial-element equivalent-circuit method, while the admittances are calculated analytically, with the MOS effects considered and treated appropriately. The circuit model can also be used for studying the differential annular TSVs (ATSVs). It is shown that the ATSVs are more suitable for transmitting differential signals in comparison with the cylindrical TSVs. Based on the equivalent-circuit model, the characteristic impedances and the forward transmission coefficients of the D-TSVs made of Cu and carbon nanotubes are characterized and compared under different settings of frequencies and temperatures.

Electrical Modeling and Analysis of a Mixed Carbon Nanotube Based Differential Through Silicon via in 3-D Integration

Based on the extracted equivalent parasitic parameters, the distributed transmission line model of a mixed carbon nanotube bundle (MCB) built signal-ground-signal-type differential through silicon via (TSV) is established and validated against the multiconductor transmission line model (MTL) results and predictive experiment results over a wide frequency range. Using the proposed model, the effect of various dimensional parameters and material properties on the signal loss and characteristic impedances of the differential TSV interconnect is investigated for odd- and even-mode signal propagation, respectively. It is observed that dielectric thickness is the most important factor affecting the transmission characteristics of TSV interconnects for the proposed TSV configuration. Moreover, various electrical performances of the proposed differential TSV, such as insertion loss, eye opening area, characteristic impedances, and 50% time delay are evaluated and compared to that of a signal-ground-type single ended TSV interconnect. The results presented in this paper will be helpful to fully understand the CNT-TSV electrical characterization and provide some signal integrity-aware guidelines for circuit designers in early planning stage.

Electrical Modeling and Characterization of Shield Differential Through-Silicon Vias

An equivalent-circuit model of shield differential through-silicon vias (SDTSVs) in 3-D integrated circuits (3-D ICs) is proposed in this paper. The proposed model is verified using the 3-D full-wave field solver High Frequency Simulator Structure, showing that it is highly accurate up to 100 GHz. Furthermore, a full-wave extraction method for the resistance–inductance–capacitance–conductance (RLCG) parameters of SDTSVs is also proposed in this paper, which can be applied to all of differential transmission lines. It is shown that the results of the RLCG parameters obtained from the full-wave extraction method agree well with that from the analytical calculation up to 100 GHz, further validating the accuracy of the proposed model. Finally, using the proposed model, a deep analysis of electrical characteristics of SDTSVs is carried out to provide helpful design guidelines for them in future 3-D ICs.

Compact model to efficiently characterize TSV-to-transistor noise coupling in 3D ICs

A methodology is proposed to characterize through silicon via (TSV) induced noise coupling in three-dimensional (3D) integrated circuits. Different substrate biasing schemes (such as a single substrate contact versus regularly placed substrate contacts) and TSV fabrication methods (such as via-first and via-last) are considered. A compact π model is proposed to efficiently estimate the coupling noise at a victim transistor. Each admittance within the compact model is approximated with a closed-form expression consisting of logarithmic functions. The methodology is validated using the 3D transmission line matrix (TLM) method, demonstrating, on average, 4.8% error. The compact model and the closed-form expressions are utilized to better understand TSV induced noise as a function of multiple parameters such as TSV type, placement of substrate contacts, signal slew rate and voltage swing. The effect of differential TSV signaling is also investigated. Design guidelines are developed based on these results.

Comparative modelling of differential through‐silicon vias up to 40 GHz

The three-dimensional integrated circuit has attracted considerable attention because of the evolving functions of today's integrated circuit products and a continuing demand for reduced power consumption and miniature chip size. Through-silicon vias (TSVs) provide a vertical interconnection between stacked dies; they are much shorter and have a denser connectivity than the hybrid horizontal and bondwire interconnects in conventional use. Differential interconnects are more commonly used in high-speed digital circuits rather than single-ended ones because of their higher immunity to common-mode noise. Accordingly, presented is a scalable physical model for differential TSVs. Mixed-mode S-parameters were generated using the established model and the electrical performance of a GSSG-type differential TSV was compared with that of a GSGSG-type differential TSV. Furthermore, four-port S-parameters were measured up to 40 GHz to validate the modelled results.