Dielectric Encapsulation Research Articles

Design and simulation of bifacial perovskite solar cell with high efficiency using cubic plasmonic nanoparticles

Bifacial perovskite solar cells (Bi-PSCs) are gaining attention for their ability to exceed the efficiency limits of traditional single-junction cells by absorbing light from both the front and rear surfaces. This study explores a novel approach to boost the efficiency and stability of Bi-PSCs by integrating clusters of cubic metallic nanoparticles (NPs) within the absorber layer. These plasmonic NPs, embedded in the middle of the absorber layer, significantly enhance light absorption, resulting in substantial improvements in power conversion efficiency for both front and rear irradiation. Our three-dimensional simulations demonstrate that incorporating Ag-based NPs can achieve efficiency enhancements of 29.89 % (from 18 % to 23.39 %) for front irradiation and 29.63 % (from 17.22 % to 22.33 %) for rear irradiation. Ag-based NPs exhibit the most notable efficiency improvement, reaching a short-circuit current of 41.30 mA/cm2 and an efficiency of 35.34 % at an albedo of 0.5. To address potential issues such as corrosion and degradation of the perovskite material, the metallic NPs are encapsulated with a thin dielectric nano-shell of SiO₂. This encapsulation strategy effectively prevents degradation, ensuring the long-term stability of the Bi-PSCs. The results indicate that the use of clusters of cubic metallic NPs, combined with dielectric encapsulation, offers a superior approach to optimizing the performance and stability of Bi-PSCs, providing a more efficient alternative to increasing the absorber layer’s thickness.

Strain Effect on Dielectricity of Elastic Thermoplastic Polyurethanes.

Dielectric elastomers, such as thermoplastic polyurethanes (TPUs), are widely used as the dielectric layer, encapsulation layer, and substrate of flexible and stretchable devices. To construct capacitors and actuators that work stably upon deformation, it has become urgent to investigate the evolution of dielectricity under stress and strain. However, the lack of effective methods for estimating the dielectric constant of elastomers under strain poses a big challenge. This study reports a device for the in situ measurement of the dielectric constant of TPU under strain. It is found that upon stretching TPU to a strain of 400%, its dielectric constant decreases from 8.02 ± 0.01 to 2.88 ± 0.25 (at 1 MHz). In addition, combined Fourier-transform infrared spectroscopy, the X-ray scattering technique, and atomic force microscopy were utilized to characterize the evolution of the microstructure under strain. The investigation under tensile strain reveals a decreased density and average size of polarized hard domains, along with a tendency of the molecular chains to align in parallel with the tensile stress. The evolution of the microstructures results in a reduction in the measured dielectric constant in TPU.

Intrinsically stretchable light-emitting drawing displays

Stretchable displays that combine light-emitting capabilities with mechanical compliance are essential building blocks of next-generation wearable electronics. However, their widespread applications are currently limited by complex device architecture, limited pixel density, and immature fabrication processes. In this study, we present the device design and material developments of intrinsically stretchable light-emitting drawing displays that can show arbitrary hand-drawing features. The alternating-current electroluminescent display uses a simplified architecture comprising coplanar interdigitated liquid metal electrodes, an electroluminescent layer, and a dielectric encapsulation layer. Ink patterns on the device are coupled with the interdigitated electrodes under alternating voltage stimulations, generating localized electric fields for bright emissions. Various inks are prepared for painting, stamping, and stencil printing. Arbitrary luminous features on the devices can be either long-lasting or transient in characteristics. These skin-like devices are made entirely of compliant materials that can withstand bending, twisting, and stretching manipulations. Due to the excellent mechanical deformability, the drawing displays can be conformally laminated on the skin as body-integrated optoelectronic communication devices for graphic information.

Investigation and Evaluation of High-Temperature Encapsulation Materials for Power Module Applications

With the advent of ultra-wide bandgap (UWBG) semiconductor materials, such as Gallium Oxide (Ga2O3) and Aluminum Nitride (AlN), higher temperature and higher voltage operation of power devices is becoming realizable. However, conventional polymeric and organic encapsulant materials are typically limited to operating temperatures of 200 °C and below. In this work, six materials were identified and evaluated as candidates for use as encapsulants for operation and high-voltage insulation at and above 250 °C. High-temperature silicone gel was used as a reference material and was compared to five novel encapsulants including an epoxy resin, a hydro-set cement, two low melting point glass compounds, and a ceramic potting compound. Gas pycnometry was utilized to evaluate the voiding concentration to avoid partial discharge. Each material was then processed onto a direct-bonded-aluminum (DBA) substrate test coupon to evaluate compatibility with a commonly used metal-ceramic substrate and processability for use in a power module. The insulation capability of each material was evaluated by testing the partial discharge inception voltage (PDIV) across a 1mm gap etched in the substrate. The dielectric stability was then tested by soaking the materials in air at 250 °C for various intervals and observing the degradation of their PDIVs and appearances. The results of each test were compared, and conclusions were drawn about each material’s feasibility for use as a dielectric encapsulation material for a power module operating at temperatures exceeding 200 °C.

Robust packaging of printed flexible electronics with functional SiOx coatings via cold atmospheric plasma assisted deposition

The ubiquity of printed flexible electronics (PFEs) spans diverse sectors, from healthcare to automotive, aerospace, agriculture, and consumer electronics, owing to their low cost, lightweight, flexibility, and conformability. However, addressing the critical challenge of ensuring robust packaging to enhance the durability and reliability of PFEs remains imperative. The limitation lies in the functionality of traditional polymer-based dielectric encapsulants, resulting in weak bonding between electrical components on the circuit and the encapsulant. As a consequence, when PFEs are exposed to harsh environmental conditions, water condensation occurs at the interface, leading to device failure. While hybrid multi-layer inorganic and organic encapsulation methods have demonstrated promise in providing robust packaging for electronic devices, the required deposition of inorganic coatings involves complex, time-consuming, and costly processes, rendering them unsuitable for scalable manufacturing of PFE devices. To address this challenge, a novel approach is investigated using cold atmospheric plasma (CAP) technology for the deposition of SiOx coatings as an intermediate layer between the printed circuit and the dielectric encapsulant coating. This effective intermediate layer promotes adhesion and enhances barrier properties of commonly used polymeric coatings in PFE devices. The CAP method enables selective deposition of high-quality and consistent SiOx thin films onto desired substrates under atmospheric conditions. Through a systematic study of CAP deposition conditions, the optimum thickness (∼820 nm) of the SiOx coating was determined, providing the required functionality to enhance barrier properties for corrosion protection of printed circuits while maintaining high mechanical flexibility. A remarkable 105-fold improvement in corrosion protection properties was observed through accelerated corrosion protection tests in saline water with the developed hybrid inorganic–organic coating process, compared to traditional encapsulation without the SiOx intermediate layer. As a proof-of-concept, the improved packaging of printed antennas, typically used in automobile rooftop shark fin applications, is showcased, highlighting the utility of the developed process in creating fully functional PFEs capable of reliable operation in harsh environmental conditions. This research represents a significant advancement towards scalable and cost-effective manufacturing of high-performance and reliable PFEs, introducing new possibilities for a broad range of applications.

Investigation and Evaluation of High-Temperature Encapsulation Materials for Power Module Applications

With the advent of ultra-wide bandgap semiconductor materials, such as gallium oxide (Ga2O3) and aluminum nitride (AlN), higher temperature and higher voltage operation of power devices are becoming realizable. However, conventional polymeric and organic encapsulant materials are typically limited to operating temperatures of 200 degrees C and below. In this work, six materials were identified and evaluated as candidates for use as encapsulants for operation and high-voltage insulation at and above 250 degrees C. High-temperature silicone gel was used as a reference material and was compared with five novel encapsulants including an epoxy resin, a hydro-set cement, two low-melting point glass compounds, and a ceramic potting compound. Gas pycnometry was utilized to evaluate the voiding concentration to avoid partial discharge. Each material was then processed onto a direct-bonded-aluminum substrate test coupon to evaluate compatibility with a commonly used metal-ceramic substrate and processability for use in a power module. The insulation capability of each material was evaluated by testing the partial discharge inception voltage (PDIV) across a 1-mm gap etched in the substrate. The dielectric stability was then tested by soaking the materials in air at 250 degrees C for various intervals and observing the degradation of their PDIVs and appearances. The results of each test were compared, and conclusions were drawn about each material’s feasibility for use as a dielectric encapsulation material for a power module operating at temperatures exceeding 200 degrees C.

Thickness-Dependent Cross-Plane Thermal Conductivity Measurements of Exfoliated Hexagonal Boron Nitride.

Submicrometer-thick layers of hexagonal boron nitride (hBN) exhibit high in-plane thermal conductivity and useful optical properties, and serve as dielectric encapsulation layers with low electrostatic inhomogeneity for graphene devices. Despite the promising applications of hBN as a heat spreader, the thickness dependence of its cross-plane thermal conductivity is not known, and the cross-plane phonon mean free paths (MFPs) have not been measured. We measure the cross-plane thermal conductivity of hBN flakes exfoliated from bulk crystals. We find that submicrometer thick flakes exhibit thermal conductivities up to 8.1 ± 0.5 W m-1 K-1 at 295 K, which exceeds previously reported bulk values by more than 60%. Surprisingly, the average phonon mean free path is found to be several hundred nanometers at room temperature, a factor of 5 larger than previous predictions. When planar twist interfaces are introduced into the crystal by mechanically stacking multiple thin flakes, the cross-plane thermal conductivity of the stack is found to be a factor of 7 below that of individual flakes with similar total thickness, thus providing strong evidence that phonon scattering at twist boundaries limits the maximum phonon MFPs. These results have important implications for hBN integration in nanoelectronics and improve our understanding of thermal transport in two-dimensional materials.

Design of Imide Oligomer-Mediated MOF Clusters for Solar Cell Encapsulation Systems by Interface Fusion Strategy.

Dielectric encapsulation materials are promising for solar cell areas, but the unsatisfactory light-management capability and relatively poor dielectric properties restrict their further applications in photovoltaic and microelectronic devices. Herein, an interface fusion strategy to engineer the interface of MOF (UiO-66-NH2 ) with anhydride terminated imide oligomer (6FDA-TFMB) is designed and a novel MOF cluster (UFT) with enhanced forward scattering and robust porosity is prepared. UFT is applied as an optical and dielectric modifier for bisphenol A epoxy resin (DGEBA), and UFT epoxy composites with high transmittance (>80%), tunable haze (45-58%) and excellent dielectric properties can be prepared at low UFT contents (0.5-1 wt%), which delivers an optimal design for dielectric encapsulation systems with efficient light management in solar cells. Additionally, UFT epoxy composites also show excellent UV blocking, and hydrophobic, thermal and mechanical properties. This work provides a template for the synthesis of covalent bond-mediated nanofillers and for the modulation of haze and dielectric properties of dielectric encapsulation materials for energy systems, semiconductors, microelectronics, and more.

AC conductivity of hBN thin film on Si(111): A high temperature study

Boron nitride (BN) is a layered two-dimensional insulator with excellent chemical, thermal, mechanical, and optical properties. We present a comprehensive characterization of hBN as a dielectric thin film using a high impedance measurement system (100 T Ω ) to reveal the AC conductivity and dielectric properties of reactively RF sputtered 200 nm thick films to 480 °C. The experimental results are analyzed with reference to various theoretical models proposed for electrical conduction in disordered or amorphous semiconductors. Electrical measurements indicate that the mechanism behind hBN AC conductivity is via correlated barrier hopping (CBH) and is assigned to localized states at the Fermi level, where N(EF) ∼ 1018 eV−1 cm−3. Our measurements also reveal a σdc component, with resistance reducing from ∼1010 Ω (50 °C) to 3 × 108 Ω (480 °C). Single RC parallel circuit fits to Cole–Cole plots are achieved signifying a sole conduction path with capacitance values of ∼8 × 10−11 F. These findings may be of interest to material and device scientists and could open new pathways for hBN both as a dielectric material encapsulant and for semiconductor device applications including high-temperature operation.

Large‐area, high‐temperature stainless steel foil substrate for manufacturing low‐cost and flexible CMOS polysilicon TFTs

AbstractA large‐area stainless steel foil substrate which is compatible with high‐temperature (>800°C) processing was developed to support a hybrid printed and conventional process technology to fabricate polysilicon thin‐film transistors (TFTs). The purpose was to build a platform that could lead to low‐cost, roll‐to‐roll manufacturing of polysilicon TFTs. To fabricate a self‐aligned top‐gate TFT structure, a screen‐printed dopant process, which requires high‐temperature activation, was developed to substitute capital‐intensive ion implantation. For the pilot line process, a 300‐mm2 and 100‐μm‐thick stainless steel substrate made of an alloy with a low thermal expansion coefficient (CTE) was chosen. Then, the foil finishing process was optimized to achieve flatness and minimize surface roughness. A barrier and dielectric encapsulation were developed to prevent trace metal diffusion from the substrate into the active layers. The polysilicon TFTs were then evaluated with static and dynamic bending tests.

Optical and dielectric properties of MoO3 nanosheets for van der Waals heterostructures

Two-dimensional (2D) insulators are a key element in the design and fabrication of van der Waals heterostructures. They are vital as transparent dielectric spacers whose thickness can influence the photonic, electronic, and optoelectronic properties of 2D devices. Simultaneously, they provide the protection of active layers in the heterostructure. For these critical roles, hexagonal boron nitride (hBN) is the dominant choice due to its large bandgap, atomic flatness, low defect density, and encapsulation properties. However, the broad catalogue of 2D insulators offers exciting opportunities to replace hBN in certain applications that require transparent thin layers with additional optical degrees of freedom. Here, we investigate the potential of single-crystalline molybdenum oxide (MoO3) as an alternative 2D insulator for the design of nanodevices that require precise adjustment of the light polarization at the nanometer scale. First, we measure wavelength-dependent refractive indices of MoO3 along its three main crystal axes and determine the in-plane and out-of-plane anisotropy of its optical properties. We find that the birefringence in MoO3 nanosheets compares favorably with other 2D materials that exhibit strong birefringence, such as black phosphorus, ReS2, or ReSe2, in particular in the visible spectral range, where MoO3 has the unique advantage of transparency. Finally, we demonstrate the suitability of MoO3 for dielectric encapsulation by reporting linewidth narrowing and reduced inhomogeneous broadening of 2D excitons and optically active quantum emitters, respectively, in a prototypical monolayer transition-metal dichalcogenide semiconductor. These results show the potential of MoO3 as a 2D dielectric layer for manipulation of the light polarization in vertical 2D heterostructures.

Ultrathin wideband slot and patch FSS elements with sharp band edge characteristics

ABSTRACT Two diverse applications of FSS as bandpass and bandstop filters with wideband and sharp band edge characteristics are investigated in this paper. The proposed design comprised of a tapered tripole element in aperture and patch type printed on either side of a dielectric material to act as bandpass and bandstop filters respectively. The structures are ultrathin in design; structures comprise two metallic layers, isolated by single thin substrates with a thickness of 0.027λ. In the case of bandpass, the structure shows a relative bandwidth (−1 dB) of 8.87% with insertion loss better than 0.2 dB at normal incidence. Whereas, in the case of bandstop, it shows 24.36% (−10 dB). Further, the parametric analysis is performed for obtaining optimal performance. Both structures in the proposed form have spectacular application in bandpass filtering (slot FSS) and electromagnetic shielding (patch FSS). Further, two design techniques are presented namely dielectric encapsulation and substrate integrated waveguide (SIW) based FSS structures to develop a periodic structure to cater the high power handling in microwave sources. Finally, a fabricated prototype along with experimental verification proves the validity of simulated results.

Material-Selective Doping of 2D TMDC through AlxOy Encapsulation.

For the integration of two-dimensional (2D) transition metal dichalcogenides (TMDC) with high-performance electronic systems, one of the greatest challenges is the realization of doping and comprehension of its mechanisms. Low-temperature atomic layer deposition of aluminum oxide is found to n-dope MoS2 and ReS2 but not WS2. Based on electrical, optical, and chemical analyses, we propose and validate a hypothesis to explain the doping mechanism. Doping is ascribed to donor states in the band gap of AlxOy, which donate electrons or not, based on the alignment of the electronic bands of the 2D TMDC. Through systematic experimental characterization, incorporation of impurities (e.g., carbon) is identified as the likely cause of such states. By modulating the carbon concentration in the capping oxide, doping can be controlled. Through systematic and comprehensive experimental analysis, this study correlates, for the first time, 2D TMDC doping to the carbon incorporation on dielectric encapsulation layers. We highlight the possibility to engineer dopant layers to control the material selectivity and doping concentration in 2D TMDC.

Characterization of Bending, Crease, Aging, and Immersion Effects on Flexible Screen-Printed Silver Traces

Printed flexible electronics have been a great interest in the electronics industry in recent years since this technology can be used to replace existing rigid printed circuit boards and open new application domains. Several used cases for flexible substrates involve mechanical bending and creasing as well as exposure to liquids. Hence, there is a need for the characterization of the reliability of the silver races on flexible substrates under such conditions. In response, ASTM standard tests were used to quantify the effects of repeated bending and creasing on the resistance change in commercially used silver inks screen printed onto the flexible substrates. Three distinct ink/substrate combinations were investigated in terms of bending and crease testing up to 10 000 cycles. Traces with and without dielectric encapsulant were exposed to the water immersion and the simulated sweat tests for up to 2500 h of exposure. The effects of mechanical stress and liquid exposure on the surface morphology and oxidation species were analyzed and corroborated with the electrical results.

Polymer Encapsulants for Threshold Voltage Control in Carbon Nanotube Transistors.

Although carbon nanotube transistors present outstanding performances based on key metrics, large-scale uniformity and repeatability required in printable electronics depend greatly on proper control of the electrostatic environment. Through a survey of polymer dielectric encapsulants compatible with printing processes, a simple correlation is found between the measured interfacial charge density and the onset of conduction in a transistor, providing a rational route to control the electrical characteristics of carbon nanotube transistors. Smooth and continuous balancing of the properties between unipolar p-type and n-type transport is achieved using a molar fraction series of poly(styrene-co-2-vinylpyridine) statistical copolymers combined with an electron-donating molecule. We further demonstrate the easy fabrication of a p-n diode which shows a modest rectification of 8:1.

Stable InSe transistors with high-field effect mobility for reliable nerve signal sensing

Among two-dimensional layered semiconductors, indium selenide (InSe) is one of the most promising materials with absolute advantages in field-effect transistors (FETs) because of its high electron mobility and stable material properties. Some work has been performed to improve the mobility of InSe FETs. However, in practical applications, electrical stability of FETs is another essential factor to guarantee the performance of the electronic system. Here, we show a highly stable InSe FET with a field-effect mobility of 1200 cm2/V·s in the practical working regime. The bottom-gate staggered InSe FET was fabricated with a polymethyl methacrylate (PMMA)/HfO2 dual-layer gate dielectric and PMMA back-channel encapsulation. The hysteresis was maintained at 0.4 V after 30 days of storage under normal ambient conditions, and the threshold voltage shift was retained at 0.6 V with a gate stress VGS of 10 V, which represents the best electrical stability reported to date. Its high mobility and electrical stability enable reliable detection of the weak nerve action potential at a low power consumption. High-performance InSe FETs expand their promising applications in flexible and in situ real-time intelligent nerve action potential recording.

CMOS-compatible Si metasurface at visible wavelengths prepared by low-temperature green laser annealing

A low-temperature laser crystallization is newly devised for producing polycrystalline silicon (poly-Si) thin films of low-loss, low surface roughness enough for nanoscale patterning, applicable to practical Si metasurface elements on complementary metal-oxide semiconductor (CMOS) electronic architectures in visible lights. The method is based on dielectric encapsulation of an amorphous Si film and subsequent laser-induced local crystallization. Such poly-Si thin film yields order-of-magnitude smaller surface roughness and grain size than those obtained with the conventional laser annealing processes. The mechanism of the formation of small and uniform crystalline grains during solidification is studied to ensure the smooth surfaces enough for nanoscale patterning. By obtaining root mean square of surface roughness <2.49 nm and extinction coefficient <4.8 × 10–2 at 550 nm, visible metasurface color-filter elements are experimentally demonstrated with the resonant transmission-peak efficiency approaching ∼85%. This low-loss poly-Si metasurface is favorably compatible with embedded CMOS electronic architectures in contrast to the conventional thermal annealing processes that often cause failure of electrical device functionalities due to delamination and material-property degradation problems. The proposed fabrication in this study provides a practical method for further development of various Si metasurfaces in the visible domain and their integration with CMOS electronic devices as well.

Effect of oxidation on intrinsic residual stress in amorphous silicon carbide films.

The change in residual stress in plasma enhanced chemical vapor deposition amorphous silicon carbide (a-SiC:H) films exposed to air and wet ambient environments is investigated. A close relationship between stress change and deposition condition is identified from mechanical and chemical characterization of a-SiC:H films. Evidence of amorphous silicon carbide films reacting with oxygen and water vapor in the ambient environment are presented. The effect of deposition parameters on oxidation and stress variation in a-SiC:H film is studied. It is found that the films deposited at low temperature or power are susceptible to oxidation and undergo a notable increase in compressive stress over time. Furthermore, the films deposited at sufficiently high temperature (≥325 C) and power density (≥0.2 W cm-2 ) do not exhibit pronounced oxidation or temporal stress variation. These results serve as the basis for developing amorphous silicon carbide based dielectric encapsulation for implantable medical devices. © 2018 Wiley Periodicals, Inc. J Biomed Mater Res Part B: Appl Biomater 107B: 1654-1661, 2019.

Improved Hysteresis and Reliability of MoS2Transistors With High-Quality CVD Growth and Al2O3Encapsulation

We report considerable improvement in the hysteresis and reliability of MoS2 field-effect transistors (FETs) achieved by chemical vapor deposition (CVD) of single-layer MoS2 and dielectric encapsulation. Our results show that a high-quality 15-nm thick Al2O3 layer allows for an efficient protection of the devices from adsorbent-type trapping sites. Combined use of the CVD-grown MoS2 as a channel and encapsulation simultaneously leads to at least an order of magnitude smaller hysteresis and up to two orders of magnitude lower long-term drifts of the transistor characteristics. Together with high on/off current ratios ( $\sim 10^{\textsf {9}}$ ) achieved in our devices, this presents a considerable advance in the technology of MoS2 FETs. As such, we conclude that both CVD growth of MoS2 and encapsulation present important technological steps toward reaching commercial quality standards of next-generation two-dimensional (2D) material technologies.

Neural electrode resilience against dielectric damage may be improved by use of highly doped silicon as a conductive material

BackgroundDielectric damage occurring in vivo to neural electrodes, leading to conductive material exposure and impedance reduction over time, limits the functional lifetime and clinical viability of neuroprosthetics. We used silicon micromachined Utah Electrode Arrays (UEAs) with iridium oxide (IrOx) tip metallization and parylene C dielectric encapsulation to understand the factors affecting device resilience and drive improvements. New methodIn vitro impedance measurements and finite element analyses were conducted to evaluate how exposed surface area of silicon and IrOx affect UEA properties. Through an aggressive in vitro reactive accelerated aging (RAA) protocol, in vivo parylene degradation was simulated on UEAs to explore agreement with our models. Electrochemical properties of silicon and other common electrode materials were compared to help inform material choice in future neural electrode designs. ResultsExposure of silicon on UEAs was found to primarily affect impedance at frequencies >1kHz, while characteristics at 1 kHz and below were largely unchanged. Post-RAA impedance reduction of UEAs was mitigated in cases where dielectric damage was more likely to expose silicon instead of IrOx. Silicon was found to have a per-area electrochemical impedance >10×higher than many common electrode materials regardless of doping level and resistivity, making it best suited for use as a low-shunting conductor. Comparison with existing methodsNon-semiconductor electrode materials commonly used in neural electrode design are more susceptible to shunting neural interface signals through dielectric defects, compared to highly doped silicon. ConclusionStrategic use of silicon and similar materials may increase neural electrode robustness against encapsulation failures.