Deterministic Dither Research Articles

Deterministic Dithering-Based 12-b 8-MS/s SAR ADC in 0.18-μm CMOS

This paper presents a 12-bit binary-weighted SAR ADC calibrated using self-subtractive deterministic dithering to determine the capacitor mismatch. A prototype 12-bit SAR ADC sampling at 8-MHz is realized in UMC 180-nm CMOS process and achieves an ENOB of 11.7-bits while consuming 600 μW of power from 1.8 V supply, thereby achieving a figure-of-merit of 22.5 fJ/conv-s and occupying only 0.13 mm2.

Weight Update Generation Circuit Utilizing Phase Noise of Integrated Complementary Metal–Oxide–Semiconductor Ring Oscillator for Memristor Crossbar Array Neural Network‐Based Stochastic Learning

Herein, a robust programmable stochastic weight generation method for a memristive neural network is proposed. There have been few prior algorithm suggestions for crossbar neural network‐based stochastic learning; however, there has not been much attention focussed on robust physical implementations. As a result, coming up with a robust method to provide the probability generator is an essential knob for its physical implementation. Here, implanting such stochastic behavior into the weight update signal itself is proposed, by multiplying it with the randomized probability sequence. To generate such probability sequence, bang‐bang dithering of a phase‐locked loop (PLL) with a binary phase detector (PD) is used. The programmable probability is enabled by introducing an offset for the PD outputs. Yet the dithering sequence has deterministic nature, phase noise of complementary metal–oxide–semiconductor (CMOS) ring oscillator to randomize the deterministic dithering is exploited. As a result, this lower power oscillator offers a better probability sequence, which enables an ultralow power circuit implementation.

Self-Dithering Technique for High-Resolution SAR ADC Design

In this brief, a high-resolution successive-approximation-register analog-to-digital-conversion architecture for biomedical data acquisition is proposed. A filtered least-significant-bit segment is employed as a dither to improve the resolution. Theoretical analysis and behavioral simulations show that the error of a most-significant-bit segment can be converted into shaped noise if the input signal is sufficiently small. The proposed self-dithering technique can be used, together with averaging, to improve the signal-to-noise ratio and the differential nonlinearity (DNL) performance. The performance improvement is similar to that of a conventional nonsubtractive scheme using a uniform deterministic dither but with simplified hardware and reduced computation complexity.

Correction of ADC Errors by Additive Iterative Method with Dithering

The iterative method could be used for automatic accuracy improvement of a measurement system. In its application for analogto-digital converter (ADC) a quantization error represents a limitation for the correction process. Therefore, combination of correction methods is common for ADC error correction. Combination of the additive iterative method (AIM) with nonsubtractive dithering (ND) has been proposed for slow measurement based on ADC where errors could change in time. The principle of combination of both techniques is described in the paper. AIM is based on precise inverse element (IE). In the designed system the IE output signal is created by pulse width modulation and low-pass filtering. A technique similar to deterministic dithering is employed to achieve precise processing of signal from IE. Analysis of influence of stochastic dither upon the results of correction is performed with the aim to find optimal parameters of ND. Finally, dependency of the root mean squared error and error dispersion on the measured value is drawn to show how AIM corrects the nonlinear deterministic error but slightly increases system noise.

Single-Bit Oversampled A/D Conversion With Exponential Accuracy in the Bit Rate

A scheme for simple oversampled analog-to-digital (A/D) conversion using single-bit quantization is presented. The scheme is based on recording positions of zero-crossings of the input signal added to a deterministic dither function. This information can be represented in a manner such that the bit rate increases only logarithmically with the oversampling factor r. The input band-limited signal can be reconstructed from this information locally with O(1/r) pointwise error, resulting in an exponentially decaying distortion-rate characteristic. In the course of studying the accuracy of the proposed A/D conversion scheme, some new results are established about reconstruction of band-limited signals from irregular samples using linear combination of functions with fast decay. Schemes for local interpolation of band-limited signals from quantized irregular samples are also proposed.

Dithering performance of oversampled ADC systems affected by hysteresis

This paper addresses the problem of hysteresis in ADC systems and the improvement that can be obtained in the performance of such systems with the use of dithering and oversampling. The paper starts with an analysis of ADC hysteresis errors considering their effect on the quantization error and effective number of bits of an ADC system. It concludes with a study of the improvements obtained using dithering in over sampled ADC systems with hysteresis errors. Special attention is paid to the effect of different time sequences of a deterministic dither signal. Experimental results that validate theoretical predictions are also presented.

Performance of stochastic and deterministic dithered quantizers

In this paper, the authors discuss the use of deterministic and stochastic dither sequences in analog-to-digital conversion including data postprocessing. Properties of both types of dither signals are highlighted, and a performance comparison is carried out by considering residual bias and mean square error. It is concluded that superior performance can be attained by deterministic dither in terms of system resolution and accuracy, at the expense of worse spectral characteristics. Experimental results are provided to support simulations and theoretical analysis.

Dither signals and quantization

The accuracy performance that an be achieved by post-processing the samples provided by a dithered quantizer is analysed in this paper for both stochastic and deterministic dithering. In the former case the quantization error average and variance are considered and the number of effective bits of the system output is evaluated for uniformly and Gaussian distributed dither signals. Then the accuracy achieved by using a deterministic dithering is analysed and a new approach for optimizing the system performance is proposed. All the reported results have been validated by means of computer simulations.