Desktop CPU Research Articles

4D Flexible Atom-Pairs: An efficient probabilistic conformational space comparison for ligand-based virtual screening.

BackgroundThe performance of 3D-based virtual screening similarity functions is affected by the applied conformations of compounds. Therefore, the results of 3D approaches are often less robust than 2D approaches. The application of 3D methods on multiple conformer data sets normally reduces this weakness, but entails a significant computational overhead. Therefore, we developed a special conformational space encoding by means of Gaussian mixture models and a similarity function that operates on these models. The application of a model-based encoding allows an efficient comparison of the conformational space of compounds.ResultsComparisons of our 4D flexible atom-pair approach with over 15 state-of-the-art 2D- and 3D-based virtual screening similarity functions on the 40 data sets of the Directory of Useful Decoys show a robust performance of our approach. Even 3D-based approaches that operate on multiple conformers yield inferior results. The 4D flexible atom-pair method achieves an averaged AUC value of 0.78 on the filtered Directory of Useful Decoys data sets. The best 2D- and 3D-based approaches of this study yield an AUC value of 0.74 and 0.72, respectively. As a result, the 4D flexible atom-pair approach achieves an average rank of 1.25 with respect to 15 other state-of-the-art similarity functions and four different evaluation metrics.ConclusionsOur 4D method yields a robust performance on 40 pharmaceutically relevant targets. The conformational space encoding enables an efficient comparison of the conformational space. Therefore, the weakness of the 3D-based approaches on single conformations is circumvented. With over 100,000 similarity calculations on a single desktop CPU, the utilization of the 4D flexible atom-pair in real-world applications is feasible.

Monte Carlo simulation of X-ray and gamma-ray photon transport on a graphics-processing unit

Graphics-processing units (GPUs) suitable for general-purpose numerical computation are now available with performances in excess of 1 Teraflops, faster by one to two orders of magnitude than conventional desktop CPUs. Monte Carlo particle transport algorithms are ideally suited to parallel processing architectures and so are good candidates for acceleration using a GPU. We have developed a general-purpose code that computes the transport of high energy (>1 keV) photons through arbitrary 3-dimensional geometry models, simulates their physical interactions and performs tallying and variance reduction. We describe a new algorithm, the particle-per-block technique, that provides a good match with the underlying GPU multiprocessor hardware design. Benchmarking against an existing CPU-based simulation running on a single-core of a commodity desktop CPU demonstrates that our code can accurately model X-ray transport, with an approximately 35-fold speed-up factor.

TH‐D‐L100J‐06: Streaming Architectures for Cone‐Beam CT Image Reconstruction and Deformable Registration

Purpose: To develop data‐parallel algorithms for tomographic reconstruction and deformable registration within a stream‐processing paradigm, and execute them on cheap stream processors such as graphics processing units (GPUs). Method and Materials: In the computer sciences, the stream‐processing paradigm is emerging as a cost‐effective way of solving large‐scale parallel computing problems. This is due to the recent introduction of high‐performance stream‐processing hardware such as the Cell processor and GPUs—both are commodity stream (or vector) processors, designed specifically to support large‐scale parallel computing on a single chip. This presentation describes how to use the stream‐processing model to significantly accelerate the complex problems of data reconstruction and fusion for radiotherapy. Highly data‐parallel models were developed for: (1) the Feldkamp, Davis, and Kress (FDK) reconstruction algorithm, and (2) Demon's algorithm for optical‐flow based deformable registration. These models were implemented within the Brook programming environment and executed on an nVIDIA 8800 GPU. Results: The performance of GPU‐based implementations of the FDK and Demon's algorithms was analyzed using data obtained from an IGRT testbed of a preserved swine lung. The results indicate a substantial speedup of up to 17 times for FDK, and up to 33 times for Demons, when compared with a 2.4 GHz Intel Duo‐Core processor. In addition, the GPU was found to be capable of high‐quality reconstructions, with differences within a few Hounsfield unit. Conclusions: Results indicate that data‐parallel image‐processing algorithms, when properly designed and executed on a GPU, achieve significant speedup when compared to high‐end desktop CPUs. The acceleration of key data‐processing stages will decrease the time needed to perform image‐guided patient positioning and analysis.

Resource efficiency of the GigaNetIC chip multiprocessor architecture

In this article, we present the prototypical implementation of the scalable GigaNetIC chip multiprocessor architecture. We use an FPGA-based rapid prototyping system to verify the functionality of our architecture in a network application scenario before fabricating the ASIC in a modern CMOS standard cell technology. The rapid prototyping environment gives us the opportunity to test our multiprocessor architecture with Ethernet-based data streams in a real network scenario. Our system concept is based on a massively parallel processor structure. Due to its regularity, our architecture can be easily scaled to accommodate a wide range of packet processing applications with various performance and throughput requirements at high reliability. Furthermore, the composition based on predefined building blocks guarantees fast design cycles and simplifies system verification. We present standard cell synthesis results as well as a performance analysis for a firewall application with various couplings of hardware accelerators. Finally, we compare implementations of our architecture with state-of-the-art desktop CPUs. We use simple, general-purpose applications as well as the introduced packet processing tasks to determine the performance capabilities and the resource efficiency of the GigaNetIC architecture. We show that, if supported by the application, parallelism offers more opportunities than increasing clock frequencies.

Application of Thread-Level Parallel Programming to Thermohydrodynamic Lubrication Computation

This study presents a performance evaluation of a portable parallel programming paradigm, the OpenMP, for thermohydrodynamic (THD) lubrication analysis. The THD model is described by two coupled partial differential equations, a simplified generalized Reynolds equation and a 3-D time-dependent energy equation. The numerical methods used for solving these equations are coded and compiled as a multithread application to minimize execution time in a dual-CPU workstation. It was found that the program coded in thread-level parallelism can effectively use the computing resources in the current setup. The attributes of conditional compilation and incremental parallelization of OpenMP make it a powerful tool for fine-grain applications in shared-memory platforms. A program coded in thread-level parallelism should understand the caching operation to fully exploit the capacity of coming dual- or multi-core desktop CPUs in either uniprocessor or multiprocessor systems. As illustrated in this study, some of the parallel programming techniques used in solving the Reynolds equation and the thermal energy equation can facilitate applications using similar lubrication models. Presented at the STLE Annual Meeting in Calgary, Alberta, Canada May 7–11, 2006 Review led by Gita Talmage

Empirical Studies on Inter-Organizational Collaborative Product Development

Collaborative product development (CPD) has become an imperative for companies to strengthen their niche values and remain competitive in the global market. However, most scholars may lack knowledge of deploying CPD in current industrial settings, and their research efforts may thus fail to fulfill practical needs. This paper presents a series of empirical case studies on distributed product development in Asia-Pacific Region. Engineering collaborations among brand-owner, manufacturer, and supplier in six product design chains (desktop PC, IC substrate, LCD monitor, bicycle, mold design, and CPU cooler) are under investigation. A systematic approach is developed that categorizes CPD into three modes based on the number of engineering BOM items and the difficulty of modularization in product design. It provides a preliminary but structured template for CPD deployment by characterizing the implications and software features of each mode. The cases also reveal values which CPD creates for the downstream supplier of a global value chain and new IT technologies enabling the collaboration process. This work is one of the early studies that analyze collaborative product development from the perspective of a manufacturer. The findings complement and corroborate theoretical studies in related research.

Enhanced distributed computing message passing strategies for FDTD

The finite difference time domain method (FDTD) solves Maxwell's equations by employing numerically and storage intensive computation to map the electric and magnetic fields within a finite volume as an explicit function of time. Distributed computation, using heterogeneous networks of computers, is a cost-effective way of applying FDTD; however interprocessor communication is the rate-limiting step. In particular, in most laboratories there is a surplus of unused, desktop CPU cycles during the evening and night. We have investigated ways of utilizing this resource by examining various communication harnesses for distributed computing and have for the first time in a distributed FDTD EM application, employed data packing mechanisms to alleviate the bottleneck caused by network latency and limited bandwidth availability. Copyright © 1999 John Wiley & Sons, Ltd.