We present a design space exploration for applications using runtime reconfigurable FPGAs. The studied example is a mechatronic control system which changes between different controller tasks at runtime. For each task we implement six alternative distributed arithmetic designs with area/computation time trade-offs. Values are estimated and later on compared to synthesis results. For exchanging controllers at runtime we propose three different mappings to the FPGA. Given the application characteristics and the reconfiguration speed of the target FPGA, our analysis derives the optimal selection of the alternative task implementations and the corresponding mapping.
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