Parallel Program Design Research Articles

Detecting gene breakpoints in noisy genome sequences using position-annotated colored de-Bruijn graphs

BackgroundIdentifying the locations of gene breakpoints between species of different taxonomic groups can provide useful insights into the underlying evolutionary processes. Given the exact locations of their genes, the breakpoints can be computed without much effort. However, often, existing gene annotations are erroneous, or only nucleotide sequences are available. Especially in mitochondrial genomes, high variations in gene orders are usually accompanied by a high degree of sequence inconsistencies. This makes accurately locating breakpoints in mitogenomic nucleotide sequences a challenging task.ResultsThis contribution presents a novel method for detecting gene breakpoints in the nucleotide sequences of complete mitochondrial genomes, taking into account possible high substitution rates. The method is implemented in the software package DeBBI. DeBBI allows to analyze transposition- and inversion-based breakpoints independently and uses a parallel program design, allowing to make use of modern multi-processor systems. Extensive tests on synthetic data sets, covering a broad range of sequence dissimilarities and different numbers of introduced breakpoints, demonstrate DeBBI ’s ability to produce accurate results. Case studies using species of various taxonomic groups further show DeBBI ’s applicability to real-life data. While (some) multiple sequence alignment tools can also be used for the task at hand, we demonstrate that especially gene breaks between short, poorly conserved tRNA genes can be detected more frequently with the proposed approach.ConclusionThe proposed method constructs a position-annotated de-Bruijn graph of the input sequences. Using a heuristic algorithm, this graph is searched for particular structures, called bulges, which may be associated with the breakpoint locations. Despite the large size of these structures, the algorithm only requires a small number of graph traversal steps.

PARAMETER-DRIVEN GENERATION OF EVALUATION PROGRAM FOR A NEUROEVOLUTION ALGORITHM ON A BINARY MULTIPLEXER EXAMPLE

Context. The problem of automated development of evaluation programs for the neuroevolution of augmenting topologies. Neuroevolution algorithms apply mechanisms of mutation, recombination, and selection to find neural networks with behavior that satisfies the conditions of a certain formally defined problem. An example of such a problem is finding a neural network that implements a certain digital logic.
 Objective. The goal of the work is the automated design and generation of an evaluation program for a sample neuroevolution problem (binary multiplexer).
 Method. The methods and tools of Glushkov’s algebra of algorithms and hyperscheme algebra are applied for the parameterdriven generation of a neuroevolution evaluation program for a binary multiplexer. Glushkov’s algebra is the basis of the algorithmic language intended for multilevel structural design and documentation of sequential and parallel algorithms and programs in a form close to a natural language. Hyperschemes are high-level parameterized specifications intended for solving a certain class of problems. Setting parameter values and subsequent interpretation of hyperschemes allows obtaining algorithms adapted to specific conditions of their use.
 Results. The facilities of hyperschemes were implemented in the developed integrated toolkit for the automated design and synthesis of programs. Based on algorithm schemes, the system generates programs in a target programming language. The advantage of the system is the possibility of describing algorithm schemes in a natural-linguistic form. An experiment was conducted consisting in the execution of the generated program for the problem of evaluating a binary multiplexer on a distributed cloud platform. The multiplexer example is included in SharpNEAT, an open-source framework that implements the genetic neuroevolution algorithm NEAT for the .NET platform. The parallel distributed implementation of the SharpNEAT was proposed in the previous work of the authors.
 Conclusions. The conducted experiments demonstrated the possibility of the developed distributed system to perform evaluations on 64 cloud clients-executors and obtain an increase in 60–100% of the maximum capabilities of a single-processor local implementation.

Review of Elements of Parallel Computing

As the title clearly states, this book is about parallel computing. Modern computers are no longer characterized by a single, fully sequential CPU. Instead, they have one or more multicore/manycore processors. The purpose of such parallel architectures is to enable the simultaneous execution of instructions, in order to achieve faster computations. In high performance computing, clusters of parallel processors are used to achieve PFLOPS performance, which is necessary for scientific and Big Data applications. Mastering parallel computing means having deep knowledge of parallel architectures, parallel programming models, parallel algorithms, parallel design patterns, and performance analysis and optimization techniques. The design of parallel programs requires a lot of creativity, because there is no universal recipe that allows one to achieve the best possible efficiency for any problem. The book presents the fundamental concepts of parallel computing from the point of view of the algorithmic and implementation patterns. The idea is that, while the hardware keeps changing, the same principles of parallel computing are reused. The book surveys some key algorithmic structures and programming models, together with an abstract representation of the underlying hardware. Parallel programming patterns are purposely not illustrated using the formal design patterns approach, to keep an informal and friendly presentation that is suited to novices.

Big Data Framework for storage Extraction and Identification of Data using Hadoop Distributed File system

Big data is all about the developing challenge that associations face in today’s world, As they manage enormous and quickly developing wellsprings of information or data, with the complex range of analysis and the problem includes computing infrastructure, accessing mixed data both structured and unstructured data from various sources such as networking, Recording and stored images. Hadoop is the open source software framework includes no of compartments that are specifically designed for solving large-scale distributed data storage. MapReduce is a parallel programming design for processing

Safety Mechanism Design and Verification of Safety Computer Parallel Program

Safety Mechanism Design and Verification of Safety Computer Parallel Program

SCAC: Weakly-coupled execution model for massively parallel systems

This work proposes an execution model for massively parallel systems aiming at ensuring the communications overlap by the computations. This model is named SCAC : Synchronous Communication Asynchronous Computation. This weakly-coupled model separates the execution of communication phases from those of computation in order to facilitate their overlapping, thus covering the data transfer time. To allow the simultaneous execution of these phases, we propose an approach based on three levels : two globally-centralized/locally-distributed hierarchical control levels and a parallel computation level. A generic and parametric implementation of the SCAC model was performed to fit different applications. This implementation allows the designer to choose the system components (from pre-designed ones) and to set its parameters in order to build the adequate SCAC configuration for the target application. An analytical estimation is proposed to predict the execution time of an application running in SCAC mode, in order to facilitate the parallel program design and the SCAC architecture configuration. The SCAC model was validated by simulation, synthesis and implementation on an FPGA platform, with different examples of parallel computing applications. The comparison of the results obtained by the SCAC model with other models has shown its effectiveness in terms of flexibility and speed-up.

Supporting structured parallel program design, development and tuning in FastFlow

The design and tuning of parallel programs is known to be a hard and error-prone process. Structured parallel programming helps overcoming part of the related problems by properly and carefully ensuring separation of concerns in between application and system programmers. In this work, we describe the design and the implementation of ff-RPL, a shell supporting structured parallel programming development in FastFlow. The shell provides ways to explore the space of functionally equivalent, alternative parallel implementations of the same application with different non functional properties. It also provides ways to tune and optimize existing parallel applications standalone or while targeting particular hardware architectures. The tool is entirely written in C++. It has been designed in such a way it can be easily extended to take into account new non functional features, refactoring and optimization rules, as well as different parallel patterns. Experimental results are shown validating the general ff-RPL design as well as its FastFlow code generation features.

Space-based parallel program design process with high-level communication channels

In this research, we reduce design complexity of parallel programs by performing the design task at the high level. We devised a formalism of the parallel program design process to support space-based parallel program design. In this formalism, program designs are captured in entity spaces. Entity spaces, including data spaces, tasks, etc. can be subdivided and freely distributed into logical node clusters that are assigned to processes. We designed high-level communication channels for communication among divided subtasks in a parallel program for space-based communication integration. Supported program models range in single program multiple data, multiple program multiple data, and their hybrid model. We designed single-space and cross-space high-level communication channels with various communication topologies. They are specified externally and decoupled from a parallel program. This makes the program logical and easily designed and reused. A practical example is used for illustrating the design process.

Ontological and Algebra-Algorithmic Tools for Automated Design of Parallel Programs for Cloud Platforms

An approach to the automated development of programs is proposed on the basis of ontological facilities and algebra-algorithmic tools for program design and synthesis. The approach is illustrated by examples of developing a parallel weather forecasting program and also a software application destined to run the developed program on a cloud computing platform.

Parallel Programming Design of BPSK Signal Demodulation Based on CUDA

Realizing digital signal demodulation on the general computer is an important research direction in the field of signal processing in recent years. In this paper, the algorithm of BPSK signal demodulation which has high real-time requirements is researched on the general computer. According to the characteristics of “CPU + GPU” heterogeneous computing, the parallel computation model of digital communication is put forward, and BPSK signal demodulation is realized on CUDA platform. Test results show that the computing time ratio of 1:1.7, when the bit error rate can be achieved 10?5.

Parallel Program Design and Development of Large-Scale Grid Topology Analysis

This paper proposes a parallel computing method of topological analysis based on the partition of grid model data, and based on the smart grid dispatch control system it design and develop the parallel topology analysis service using the OpenMP shared memory programming model and C/C++ programming language. According to the layering and zoning features of the smart grid dispatch control system, this method divides the grid mode by area and power station. Package the topology search function and do parallel processing for mode data according to different area and power station, which can realize the parallel network topology analysis. The test result on the actual grid shows that this method has good stability and real-time, and it can meet the system online simulation, analysis and control applications requires for the topology analysis.

Research on Multi-Core PC Parallel Computation Based on OpenMP

Along with quad-core PC coming into the market and invention of 80-core processor in the laboratory, Software development will go through a foundational innovation due to multicore technology. The technique of parallel programming on multi-core computers is explored in this thesis. First, the OpenMP standard which is an application programming interface (API) on parallel programming model of shared-memory is introduced and an overview of a set of compiler directives and a library of support functions are given. The OpenMP programs requires an OpenMP-compatible compiler and thread-safe libraries，therefore, both Intel C++ compiler 9.1 and Microsoft Visual Studio 2005 are perfect choices. Then, two-dimensional discrete fast Fourier transform (FFT) is studied by focusing on parallel program design，realization and optimization technology. Finally，the thesis predicts that high performance parallel computing software component library must be a perfect exploitation field in the further future.

Synthesizing Fault Tolerant Safety Critical Systems

To keep pace with today’s nanotechnology, safety critical embedded systems are becoming less tolerant to errors. Research into techniques to cope with errors in these systems has mostly focused on transformational approach, replication of hardware devices, parallel program design, component based design and/or information redundancy. It would be better to tackle the issue early in the design process that a safety critical system never fails to satisfy its strict dependability requirements. A novel method is outlined in this paper that proposes an efficient approach to synthesize safety critical systems. The proposed method outperforms dominant existing work by introducing the technique of run time detection and completion of proper execution of the system in the presence of faults.

GPU-based NFA implementation for memory efficient high speed regular expression matching

Regular expression pattern matching is the foundation and core engine of many network functions, such as network intrusion detection, worm detection, traffic analysis, web applications and so on. DFA-based solutions suffer exponentially exploding state space and cannot be remedied without sacrificing matching speed. Given this scalability problem of DFA-based methods, there has been increasing interest in NFA-based methods for memory efficient regular expression matching. To achieve high matching speed using NFA, it requires potentially massive parallel processing, and hence represents an ideal programming task on Graphic Processor Unit (GPU). Based on in-depth understanding of NFA properties as well as GPU architecture, we propose effective methods for fitting NFAs into GPU architecture through proper data structure and parallel programming design, so that GPU's parallel processing power can be better utilized to achieve high speed regular expression matching. Experiment results demonstrate that, compared with the existing GPU-based NFA implementation method [9], our proposed methods can boost matching speed by 29~46 times, consistently yielding above 10Gbps matching speed on NVIDIA GTX-460 GPU. Meanwhile, our design only needs a small amount of memory space, growing exponentially more slowly than DFA size. These results make our design an effective solution for memory efficient high speed regular expression matching, and clearly demonstrate the power and potential of GPU as a platform for memory efficient high speed regular expression matching.

SGL: towards a bridging model for heterogeneous hierarchical platforms

This paper introduces the Scatter-Gather parallel-programming and parallel execution model in the form of a simple imperative Scatter-Gather Language (SGL). Its design is based on past experience with bulk-synchronous parallel (BSP) programming and BSP language design. SGL’s novel features are motivated by the last decade’s move towards multi-level and heterogeneous parallel architectures involving multi-core processors, graphics accelerators and hierarchical routing networks in the largest multiprocessing systems. The design of SGL is coherent with L. Valiant’s multi-BSP while offering a programming interface that is even simpler than the primitives of bulk-synchronous parallel ML (BSML). SGL appears to cover a large subset of all BSP algorithms while avoiding complex message-passing programming. Like all BSP-inspired systems, it supports predictable, portable and scalable performance. Moreover, SGL’s explicit data distribution will allow automatic or programmable load-balancing.

Research and Preliminary Realization of Parallel Computing Technology of Yellow River Mathematical Model Based on MPI

Abstract Parallel program design of Yellow River 2D water-sand model was realized based on MPI(Message Passing Interface). Load balance of computing quantity was realized through regional division according to distributive torage of data. Between whole grids and part-region, the mapping relation was established. Also especial treatments were made through protocols at critical units, input & output units and shared nodes, which, on the one hand can decrease communication as much as possible, on the other hand, can avoid information-jam. The Parallel program can meet the demands of computing capacity and speed in Yellow River mathematical model.

Development of algorithmic algebra tools to design parallel programs using heuristics

The paper proposes a new approach and a system to develop parallel algorithms based on the joint use of the algebraic-algorithmic methodology of specification and development of programs and non-algorithmic (heuristic) techniques for code generation. The algebraic part of the methodology provides the formalized process of parallel program design through high-level algebraic-algorithmic specifications and automating transformations up to program code in a standard programming language. The heuristic part of the system is the dynamic adjustment of program code to a target platform and its optimization using self-learning code generation and heuristic technologies.

Transactional coherence and consistency: simplifying parallel hardware and software

Transactional coherence and consistency (TCC) simplifies parallel hardware and software design by eliminating the need for conventional cache coherence and consistency models and letting programmers parallelize a wide range of applications with a simple, lock-free transactional model. TCC eases both parallel programming and parallel architecture design by relying on programmer-defined transactions as the basic unit of parallel work, communication, memory coherence, and memory consistency

Superposition: composition vs refinement of non-deterministic, action-based systems

Abstract. The traditional notion of superposition has been used for supporting two distinct aspects of parallel program design: composition and refinement. This is because, when trace-based semantics of concurrency are considered, which is typical of most formal methods, these two relationships are modelled as inclusion between sets of behaviours. However, when forms of non-deterministic behaviour have to be considered, which is the case for component and service-based development, these two aspects do not coincide. In this paper, we show how the two roles of superposition can be separated and supported at the language and semantic levels. For this purpose, we use a categorical formalisation of program design in the language CommUnity that we are also using for addressing architectural concerns, another area in which the distinction between composition and refinement is particularly important.

Efficient solid state NMR powder simulations using SMP and MPP parallel computation

Methods for parallel simulation of solid state NMR powder spectra are presented for both shared and distributed memory parallel supercomputers. For shared memory architectures the performance of simulation programs implementing the OpenMP application programming interface is evaluated. It is demonstrated that the design of correct and efficient shared memory parallel programs is difficult as the performance depends on data locality and cache memory effects. The distributed memory parallel programming model is examined for simulation programs using the MPI message passing interface. The results reveal that both shared and distributed memory parallel computation are very efficient with an almost perfect application speedup and may be applied to the most advanced powder simulations.