Design Of Modular Multilevel Converter Research Articles

Modular Multilevel Converter With Parallel Branch Providing Integrated Partially Rated Energy Storage

In the line of research on inclusion of Energy Storage Systems (ESS) into HVDC stations, this paper presents the integration of partially rated ESS into Modular Multilevel Converter (MMC) substations using parallel branches to the arm inductors. The proposed ESS-MMC topology keeps the design of the original MMC unmodified, as it just adds partially rated ESS with electrical connections outside the valve hall. The system utilizes another frequency component in the arm circulating current to exchange power between the energy storage branches and the original MMC stacks. This third frequency component allows decoupling to some extent the power on the dc and ac sides of the substation. Analysis of the circuit performance led to the development of control algorithms to maximize the power flow capabilities from the ESS within the operational limits of the existing MMC design. This allows the addition of up to 37% power from the ESS considering similarly rated power semiconductors in a simulated 1 GW MMC substation. Analysis shows that extra device losses are kept under 1% for an addition of 10% of ESS power to the nominal substation power. Therefore, the proposal is suitable for adding services such as fast frequency response or black start capability to existing MMC designs.

Evaluating the Over-Modulation Risk of Modular Multilevel Converters by Using Dynamic Modulation Ratio

Since the over-modulation can lead to the unstable operation of converters, the over-modulation risk evaluation is important in the circuit parameter selection, operating region design, and so forth. However, the wildly used evaluation method of modular multilevel converters (MMCs) comes from two-level converters; and the article found that its obtained result is not always accurate for MMCs because four assumptions will be introduced when the conventional modulation ratio (CMR) is used as the indicator. To solve the problem, a new concept, namely dynamic modulation ratio (DMR), is proposed. Comparing with the CMR, the DMR can dynamically change according to the variation of operating conditions and can reflect the modulation characteristics more accurately. Quantitative comparisons are carried out between the CMR-based and the DMR-based evaluation methods in various operating conditions. The comparisons show that the CMR-based method is only accurate under a few situations for MMCs, and the obtained operating region of MMCs is not optimal when the CMR is used as the indicator in the parameter design of MMCs. In contrast, the DMR-based evaluation method is high-accurate under all situations. Finally, experiments are carried out in a down-scaled MMC prototype for further validating the method.

Multiobjective Optimization Based Framework for Early Stage Design of Modular Multilevel Converter for All-Electric Ship Application

The Medium Voltage DC (MVDC) architecture for All Electric Ships (AES) has the potential to provide superior features compared to traditional 60-HZ AC distribution systems in terms of power density, power quality, and system stability. The MVDC system introduces extensive use of power electronics equipment into the shipboard power system (SPS) design that brings complexity to the system design. These power electronics equipment connect the power sources and load centers to the MVDC bus and play a major role in handling system faults. This paper focuses on developing a framework to determine the volume and failure rate of a Modular Multilevel Converter (MMC) for early stage ship design. Two different methodologies (Taguchi method and a genetic algorithm) were used to determine the best design from a robust set of design options. Once the design parameters have been identified, the Taguchi method forms orthogonal array to explore and evaluate designs. At the end of the design cycle, it identifies the best parameters from a large set of design parameters to achieve lower volume and failure rate. These parameters are used as input to the optimization process. This helps to narrow out the number of inputs for optimization algorithm. The Nondominated Sorting Genetic Algorithm II (NSGA-II) has been integrated with converter design tool to minimize the volume and failure rate of MMC. The results show that the optimization algorithm coupled with Taguchi Method provides the lowest volume and failure rate for MMC. One of the goals of early-stage ship design is to develop preliminary design and evaluation of trade space to narrow it down. This paper is expected to aid early-stage ship design of power electronics converter design for MVDC systems in SPS.

A Novel Nearest Level Modulation Method with Increased Output Voltage Quality for Modular Multilevel Converter Topology

The modular multilevel converter (MMC) topology is gaining more interest because of its modular design, high efficiency, and scalable voltage levels in medium- and high-power industrial applications, where the nearest level modulation (NLM) method is frequently preferred. In this paper, a novel NLM method is proposed with increased output voltage quality for MMC topology. In conventional NLM (C-NLM), output voltage is obtained as N + 1 levels, where N is the number of submodules (SMs) per arm. The output voltage is increased to 2N + 1 levels by the proposed NLM method without using any additional SMs. The proposed NLM method is based on the offset term injection, which is optimally determined in terms of the best output performance of MMC. Also, trapezoidal reference signal is used instead of sinusoidal reference, which provides better output voltage quality and controls the modulation process. The proposed NLM method presents simple implementation as in the C-NLM, and it is implemented to the upper and lower arms of the MMC; then, arm voltages are successfully controlled. Furthermore, output voltage returns the value of zero in the C-NLM process for low-modulation-ratio applications in relatively small amount of SM usage of MMC design. However, the proposed NLM method gives promising results instead of zero voltage. In order to validate the superior performance of the proposed NLM method, a comparative study is presented with C-NLM and third-harmonic injected NLM method in terms of total harmonic distortion (THD) and magnitude of the output voltage and current. THD of output waveforms of MMC is significantly reduced, and DC voltage utilization is remarkably increased, thanks to the proposed NLM method. In addition, capacitor voltage balancing for the proposed NLM method is accomplished to keep the capacitor voltage of each SM of MMC constant. Simulation results are presented to verify the effectiveness of the proposed NLM method under various case studies. Finally, experimental validation is carried out using a field programmable gate array (FPGA)-based hardware implementation on the laboratory prototype to show the applicability of the proposed NLM method.

Influencing Factors of Harmonic Coupling in Modular Multilevel Converter

The feature of the modular multilevel converter (MMC) may worse the power quality, due to the additional harmonics caused by the harmonic coupling between the grid and the dc bus. It is difficult to analyze the influencing factors of harmonic coupling in MMC, since harmonic coupling processes are complicated. In this article, the mechanism of harmonic coupling of the MMC is analyzed first, considering that harmonics exist in the grid and dc side. The influencing factors of harmonic coupling are analyzed based on the harmonic coupling. The reference for the filter and MMC design, and the evaluation of the harmonic pollution can be provided by the analysis in this article. The correctness of the influencing factors has been proved by simulation and experimental tests.

Submodule fault-tolerant control based adaptive carrier-PDPWM for modular multilevel converters

The modular multilevel converter (MMC) is considered a very promising candidate for medium-voltage and/or high-power grids. One of the major concerns in half-bridge MMCs, especially with large number of levels, is the fault occurs at the converter submodule (SM). Hence, an appropriate control with an SM fault tolerance of the MMC is required to enhance its reliability. This paper addresses the issue and proposes a fault tolerant control-based adaptive carrier phase disposition pulse width modulation (AC-PDPWM) technique for MMCs with superior symmetrical and asymmetrical fault-tolerant capabilities. The proposed control-based AC-PDPWM acts to regulate the flow of energy between arms, rebalance the SM capacitors, and redistribute the pulses to the SM switches. In this study, a single-phase grid connected MMC having both symmetrical and asymmetrical fault conditions is investigated. Compared with other control methods, the proposed control can tolerate the SM fault conditions without requiring redundant SMs or additional computational burden, which decreases the cost and volume of the MMC design and simplifies its control. Simulation and experimental results are included to verify the fault-tolerant capability of the proposed control.

The analytical model of modular multilevel converter based on the harmonic balance theory

This paper proposes an analytical model for the modular multilevel converter (MMC) based on the theory of harmonic balance, which removes the iteration process for traditional models. The proposed model considers dynamic harmonic interactions between the modulation of converters and passive elements in the MMC. By transferring the equations into frequency-domain as complex Fourier series, a steady-state harmonic model is created with singular coefficients matrix. Then, through the elimination of all DC components in dynamic model, the singular coefficient matrix can be derived to nonsingular one, and the order of it can be reduced. Finally, the typical open-loop analytical model with DC neutral grounded MMC is derived aim, and the time-domain simulations is used to validate the effectiveness of proposed model. The proposed model can be used to accelerate the simulation and analyze the influence of parameters to guide the design of MMC.

A Universal Mathematical Model of Modular Multilevel Converter with Half-Bridge

Modular multilevel converters (MMCs) play an important role in the power electronics industry due to their many advantages, such as modularity and reliability. In the current research, the simulation method is used to study the system. However, with the increasing number of sub-modules (SMs), it is difficult to model and simulate the system. In order to overcome these difficulties, this paper presents a universal mathematical model (UMM) of MMC using half-bridge cells as SMs. The UMM is a full-scale model with switching state, capacitance, inductance, and resistance characteristics. This method can calculate any number of SMs, and it does not need to build a simulation model (SIM) of physical MMC—in particular, parametric design can be realized. Compared with the SIM, the accuracy of the proposed UMM is verified, and the computational efficiency of the UMM is 8.7 times higher than the simulation method. Finally, by utilizing the proposed UMM method, the influence of the parameters of MMCs is studied, including the arm induction, SM capacitance, SM number, and output current/voltage total harmonic distortion (THD) based on the UMM in the paper. The results offer an engineering insight to optimize the design of MMCs.

Reliability-Oriented Design of Modular Multilevel Converters for Medium-Voltage STATCOM

Modular multilevel converters (MMC) are complex systems, composed of many elements, and exposed to critical load demands in some cases. Thereby, a detailed design of its components is of preeminent importance to achieve a high system-level reliability. However, the high number of devices challenges the tradeoff between cost and reliability. This article, introduces a reliability-oriented design methodology, based on the cost to achieve a predefined unreliability level ( $U_x$ ). A flowchart presents the main steps of the process, including the mission profile definition, selection of power devices, thermal modeling, reliability modeling, and the reliability-oriented selection. To evaluate the proposed methodology, a case study considering 17 MVA/13.8 kV MMC-static synchronous compensator (STATCOM) with a real mission profile data is conducted. A $U_x - cost$ map is introduced to compare various design solutions, based on power devices of different voltage classes and current capabilities.

Reliability Analysis and Design of MMC Based on Mission Profile for the Components Degradation

In the field of high voltage level applications, modular multi-level converter (MMC) has the definite advantages of low power loss and modularity and there have been many studies on its reliability. Some researches focus on the degradation of physical characteristics in the lifetime prediction of key devices, but the degradation of physical characteristics has not been directly used in the research of MMC system level reliability. The traditional exponential distribution failure rate is constant while the Monte Carlo method assumes the random distribution of multiple devices. Neither of these two methods can describe the reliability of a single device with physical characteristics degradation. This article presents a system level MMC reliability analysis and design method based on MMC mission profile and insulated-gate bipolar transistor (IGBT) lifetime degradation. According to the IGBT current and power loss in MMC, the annual mission profile and junction temperature result are analyzed by rainflow counting algorithm. In terms of device degradation, the thermal network updating method is used to calculate the life of IGBT in different time, and the reliability analysis method based on exponential distribution is improved. To optimize the redundancy design of the system, the multi-objective function optimization is processed.

Development of a Hardware Simulator for Reliable Design of Modular Multilevel Converters Based on Junction-Temperature of IGBT Modules

This paper presents the development of a hardware simulator based on the junction-temperature of insulated-gate bipolar transistor (IGBT) modules in modular multilevel converters (MMCs). The MMC consists of various power-electronics components, and the IGBT is the main factor determining the lifetime of the MMC. The failure of IGBTs is mostly due to the junction-temperature swing; thus, the thermal profile of the IGBT should be established to predict the lifetime. The thermal behavior depends on the current flowing to the IGBT, and the load-current profile is related to the application. To establish the thermal profile of the IGBT, the proposed hardware simulator generates various shapes of output currents while the junction temperature is measured. Additionally, a controller design is presented for simulation of the arm current, which includes a direct current component as well as an alternative current component with a fundamental frequency. The validity and performance of the proposed hardware simulator and its control methods are analyzed according to various experimental results.

Design of MMC Hardware-in-the-Loop Platform and Controller Test Scheme

The hardware-in-the-loop (HIL) simulation is an effective method to verify the overall function of the flexible HVDC transmission control and protection device. With this method, debugging the control and protection device can make the system run safely and stably after being put into operation. Therefore, a hardware-in-the-loop simulation platform modular multilevel converter (MMC) based on RT-LAB is established in this paper. Data merging between a converter valve control system and the real-time simulator is realized by high-speed optical fiber communication protocol conversion chassis, and the high-speed communication interface is designed to meet the requirements of the communication rate. Aiming at the control performance of the physical device, the test scheme is designed, and the test methods of voltage balance control and circulating current suppression are proposed. The closed-loop test of control and protection device is carried out by the active power step and AC/DC fault test. The above test verifies the validity of the NIL simulation platform of the MMC and the rationality of the testing scheme, and can meet the performance testing requirements of the control and protection device.

Model-Based Latency Compensation for Network Controlled Modular Multilevel Converters

The use of an internal digital communication network enhances the scalability, implementation and maintenance of Modular Multilevel Converters (MMC). However, it also introduces delays that limit the sampling frequency and the controller dynamic performance. In this paper, we propose a model-based predictor to compensate for the loop delay and overcome these limitations. Two benefits of this approach are possible: either designers can increase the sampling rate and control performance or employ a slower communication protocol/technology. In this paper, we present the mathematical description of the model-based predictor, assess the parameter sensitivity, and show matching simulation and experimental results that validate it. As constraints introduced by the use of digital communications are overcome, the results achieved encourage engineers to adopt a network into the design of Modular Multilevel Converters.

High Power Density Design for a Modular Multilevel Converter With an H-Bridge Cell Based on a Volume Evaluation of Each Component

This paper presents a high power density design for a step-down rectifier incorporating a modular multilevel converter (MMC) in a power system connected to a 6.6 kV ac grid. In particular, the relationship among the number of cells, the output voltage of the MMC, and the overall volume is clarified. A proposed design flowchart focuses on minimizing volumes of cell capacitors, heat sinks, and arm inductors by using optimal number of cells. Moreover, the commercial electrolytic capacitors are used as the cell capacitor. Besides, the formulae used to determine the ripple currents in the electrolytic capacitor and the arm inductor are presented, along with that for the semiconductor loss. Each of these formulae were verified experimentally using a miniature model and theoretical values from all formulae agree with the measured values within minimal deviations that are discussed with regard to the design of a practical converter for a 6.6 kV system. Finally, the conditions necessary to achieve high power density in an MMC are provided, based on volume evaluations of the electrolytic capacitor, the arm inductor, and the heat sink. Using this optimization process, an MMC design achieved a volume reduction of approximately 90% compared to a conventional system.

Control design of Modular Multilevel Converters in normal and AC fault conditions for HVDC grids

This paper describes a control design strategy of Modular Multilevel Converters (MMC) for High Voltage Direct Current (HVDC) applications to operate during normal and AC fault conditions. First, a steady state analysis of the converter is performed to identify the uses of the current components within the control strategy. Based on the initial stationary study, a complete converter control structure is proposed, which enables full control of the MMC internal energy during normal and AC fault conditions. A detailed design procedure is included for the current and energy regulators, in order to be able to ensure a dynamic response under any grid condition. Finally, theoretical developments are validated through simulation results by means of a detailed model in normal operation and during an AC voltage sag.

Impact of Grid Asymmetries on the Operation and Capacitive Energy Storage Design of Modular Multilevel Converters

The grid-connected modular multilevel converter (MMC) is very likely to operate under asymmetric grid conditions. Such a converter features several unique characteristics, which make its analysis different from other types of power converters in similar cases. In this paper, the three well-established control techniques, i.e., balanced current and negative sequence current injection for active/reactive power oscillation elimination, are tailored for the MMC case taking into account grid current limitation under fault conditions. Since the focus is laid on the MMC design impact during grid asymmetries, the three methods are compared in terms of branch energy variation increase as well as maximum achievable active power transfer. Moreover, the effect of circulating current second-order harmonic injection for capacitive storage reduction as well as dc-link oscillation elimination is also studied. Finally, experimental results from a downscaled laboratory prototype verify the theoretical studies.

A Survey and experimental verification of Modular Multilevel Converters

This article is devoted to the Multi-level converters review and specifically the form and function of modular multilevel converter (MMC) with their modulation, design considerations, balancing issues, control schemes, and applications. This article intends to make a detailed analysis of MMC with their controller related issues in comprehensive manner. It is an approach for MMC design and modulation schemes in easy manner. Furthermore, a five level MMC have been designed with optimal controller and verified by its experimental results and explored. In addition to that, this approach draws strategic conclusions on MMC towards making the system more robust in operation, less complex in design and control. DOI: http://dx.doi.org/10.11591/ijpeds.v4i3.5914