Analog Filter Design Research Articles

Particle Swarm Optimization with Aging Leader and Challengers for Optimal Design of Analog Active Filters

Due to the manufacturing limitations, the task of optimal analog active filter design by hand is very difficult. Evolutionary computation may be a competent implement for automatic selection of optimal discrete component values such as resistors and capacitors for analog active filter design. This paper presents an efficient approach for optimal analog filter design considering different topologies and manufacturing series by selecting their component values. The evolutionary optimization technique used is particle swarm optimization (PSO) with Aging Leader and Challenger (ALC-PSO). ALC-PSO performs the dual-task of efficiently selecting the component values as well as minimizing the total design errors of low pass active filters. The component values of the filters are selected in such a way so that they become E12/E24/E96 series compatible. The simulation results prove that ALC-PSO efficiently minimizes the total design error with respect to previously used optimization techniques.

Optimal filter design using an improved artificial bee colony algorithm

The domain of analog filter design revolves around the selection of proper values of the circuit components from a possible set of values manufactured keeping in mind the associated cost overhead. Normal design procedures result in a set of values for the discrete components that do not match with the preferred set of values. This results in the selection of approximated values that cause error in the associated design process. An optimal solution to the design problem would include selection of the best possible set of components from the numerous possible combinations. The search procedure for such an optimal solution necessitates the usage of Evolutionary Computation (EC) as a potential tool for determining the best possible set of circuit components. Recently algorithms based on Swarm Intelligence (SI) have gained prominence due to the underlying focus on collective intelligent behavior. In this paper a novel hybrid variant of a swarm-based metaheuristics called Artificial Bee Colony (ABC) algorithm is proposed and shall be referred to as CRbABC_Dt (Collective Resource-based ABC with Decentralized tasking) and it incorporates the idea of decentralization of attraction from super-fit members along with neighborhood information and wider exploration of search space. Two separate filter design instances have been tested using CRbABC_Dt algorithm and the results obtained are compared with several competitive state-of-the-art optimizing algorithms. All the components considered in the design are selected from standard series and the resulting deviation from the idealized design procedure has been investigated. Additional empirical experimentation has also been included based on the benchmarking problems proposed for the CEC 2013 Special Session & Competition on Real-Parameter Single Objective Optimization.

Continuous-time analog filter in CMOS nanoscale era

Analog filters are key blocks in analog signal processing. They are widely employed in many systems, like wireless transceivers, detectors read-out, sensors interfaces, etc. The IC technology choice for such systems is mainly dictated by the requirements of high speed and low power consumption of digital circuits. This pushed an impressive movement towards scaled technology and this has important consequences on the analog circuits design. The impact of technology scaling down to nanometre scale on analog filters design is here investigated. For instance, supply voltage reduction in analog filters limits circuits design solutions and could result in higher power consumption. Moreover, at the same time, innovative systems push analog filters to get higher and higher operation frequencies, due to the increasing bandwidth/speed requirements. Recent solutions for efficient low-voltage and high frequency analog filters in nanometre technology are described.

Triple Frequency Impedance Matching by Frequency Transformation

ABSTRACTThe purpose of this article is to bring to the attention of students and teachers of circuit theory, as well as of practising design engineers, a recently reported technique for impedance matching at multiple frequencies. This will be done through a specific example, namely that of design of a lumped network for matching a given load resistance RL to a given source resistance RS at three given frequencies ω1, ω2, and ω3. The method is based on application of the frequency transformation technique, commonly used in analog filter design, to a basic single frequency matching network. By comparison with the existing approach of assuming a network configuration and solving a set of simultaneous equations, as reported in a recent paper, the new method is shown to have the advantages of design by synthesis, elegance, and simplicity. Further, by virtue of the synthesis approach, the method allows a number of alternative networks to be designed, so that the best one can be selected on the basis of a predetermined criterion.

The design and simulation of a titanium oxide memristor-based programmable analog filter in a simulation program with integrated circuit emphasis

In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale electron device with low power dissipation and nonvolatile memory. Such characteristics could be suitable for designing the desired filter. However, both the non-analytical relation between the memristance and the charges that pass through it, and the changeable V—I characteristics in physical tests make it difficult to accurately set the memristance to the target value. In this paper, the conductive mechanism of the memristor is analyzed, a method of continuously programming the memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simulations and physical realizations, are demonstrated. This method is then utilized in a first-order active filter as an example to show its applications in programmable filters. This work also provides a practical tool for utilizing memristors as resistance programmable devices.

GC-Studio – the environment for automated filter design

Abstract The paper presents the idea of software suite integrating the tools supporting the analog filter design. It uses the prototype circuits that are composed of gyrators and capacitors. The essential, behavioral parameters are characterised for the filtering structures. The basic assumptions formulated before the implementation are also mentioned. The structure of the software suite is discussed, its functional properties and the implementation issues are mentioned. The resulting software brings the automation of designing SISO filters as well as the filter pairs. In the proposed solution the VHDL-AMS language is assumed as the formal method of hardware description.

Incorporating FPAAs into Laboratory Exercises for Analogue Filter Design

Field Programmable Analogue Arrays (FPAAs) provide an excellent opportunity to introduce reconfigurable hardware for analogue signal processing during electrical engineering undergraduate laboratories. This hardware allows for higher complexity designs during laboratory sessions and can reduce the troubleshooting and frustrations in realizing circuits with discrete components to clearly focus on course learning objectives. This paper discusses the FPAA laboratories introduced for a 4th year undergraduate course on analogue filter design at the University of Calgary as well as the authors' experiences and student feedback.

The Design of Active Power Filter Based on Power Line Carrier Communication

The development of street lamp control system has set a higher demand of more energy-saving and more effective which urges us to research the data transmission method based on Power Line Carrier between lamps and control center.By analyzing the influences on power line channel and signals burdened which produced by high harmonics and pulse interference from power supplies,we designed the active power filter fitted our demands.Besides, object oriented design method has been taken,combined software calculation and emulation,having effectively avoided complex computations in analogue filter design.

Analog Filter Design Using Ring Oscillator Integrators

Integrators are key building blocks in many analog signal processing circuits and systems. The DC gain of conventional opamp-RC or Gm- C integrators is severely limited by the gain of operational transconductance amplifier (OTA) used to implement them. Process scaling reduces transistor output resistance, which further exacerbates this issue. We propose applying ring oscillator integrators (ROIs) in the design of high order analog filters. ROIs implemented with simple CMOS inverters achieve infinite DC gain at low supply voltages independent of transistor non-idealities and imperfections such as finite output impedance. Consequently, ROIs scale more effectively into newer processes. A prototype fourth order filter designed using the ROIs was fabricated in 90 nm CMOS and occupies an area of 0.29 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Operating with a 0.55 V supply, the filter consumes 2.9 mW power and achieves bandwidth of 7 MHz, SNR of 61.4 dB, SFDR of 67.6 dB and THD of 60.1 dB. The measured IM3 obtained by feeding two tones at 1 MHz and 2 MHz is 63.4 dB.

Suppression of cross-track vibrations using a self-sensing micro-actuator in hard disk drives

In this study we utilize the self-sensing capabilities of piezoelectric micro-actuators in hard disk drives (HDD) to actively suppress in-plane resonance modes of the suspension in an HDD. The self-sensing circuit is based on a tunable capacitance bridge that decouples the control signal from the sensing signal in the micro-actuator. A hybrid modeling technique based on a realization algorithm and least-squares optimization for continuous-time systems is used to model the single-input dual-output system. An analog controller was computed using standard $$H_{\infty}$$ -controller design tools and reduced in order using model reduction routines. Experimental implementation using analog filter design shows the effectiveness of the proposed method in reducing the main sway modes of the suspension.

Performance Evaluation of Evolutionary Algorithms for Optimal Filter Design

In analog filter design, component values are selected due to manufactured constant values where performing an exhaustive search on all possible combinations of preferred values for obtaining an optimized design is not feasible. The application of evolutionary algorithms (EA) in analog active filter circuit design and optimization is a promising area which is based on concepts of natural selection and survival of the fittest. In this paper, the performances of genetic algorithm, artificial bee colony optimization, and particle swarm optimization, which are nature-inspired EA techniques, are evaluated for active filter design. Each algorithm is applied to two different filter structures and performances of them are also evaluated when filter design is realized with components selected from different manufactured series.

The modified Pascal polynomial approximation and filter design method

SUMMARYPolynomial approximations are extensively used in analog and IIR digital filter design. In this paper, a comprehensive filter design and an optimization procedure are presented explicitly using a filter‐appropriate modified Pascal polynomial. The so‐designed all‐pole Pascal filters exhibit non‐equiripple passband and monotonic transition and stopband responses. The order of the new Pascal filters is calculated from the order inequality which, although it cannot be analytically solved, leads to a nomograph that has been created and is presented here. Inevitably, the mathematical complexity introduced by the nature of the Pascal polynomials makes the analytical expression of the poles of the transfer function unfeasible and for that reason poles are given by means of appropriate tables. The design method is demonstrated in several detailed examples and Pascal filters are compared with their all‐pole counterparts, Butterworth and Chebyshev, over which they reveal certain advantages and disadvantages. Copyright © 2010 John Wiley &amp; Sons, Ltd.

Gramian-Preserving Frequency Transformation and Its Application to Analog Filter Design

This paper presents a new state-space formulation of the frequency transformation of linear continuous-time systems. We call this formulation “Gramian-preserving frequency transformation,” which enables us to convert a given prototype state-space system into other systems that have the same controllability/observability Gramians as those of the prototype system. As a practical application of this result, we propose a new method for the design of analog filters of which basic building blocks are integrators. It is demonstrated that the analog filters designed by the Gramian-preserving frequency transformation have the same structural properties with respect to the Gramians as those of the prototype filter, and that the performance such as the dynamic range and the sensitivity of the designed filters is retained even if the filter specification is changed. In addition to presenting this result, we also address the physical meaning of the Gramian-preserving frequency transformation. It is shown that the Gramian-preserving frequency transformation is derived from the state-space model that is obtained by replacing each integrator of a prototype filter with a reactance function, where the structure of this reactance function is given as the scaled version of the Foster canonical form.

Optimized Analog Flat Filter Design

This paper proposes a systematic approach for the optimized design of analog filters, which includes all well-known classical analog filters as a special case. All specifications including the conventional ones and also filter flatness degrees are explicitly incorporated into design process. Several numerical examples are presented to demonstrate the efficiency and flexibility of the proposed method.

Analogue filter design using differential evolution

Although analogue circuits have been successfully used in a variety of real life applications, the design of such circuits is very challenging and a time-consuming task. Automating the design of analogue circuit using optimisation algorithms is urgently needed. Algorithms inspired from natural evolution called evolutionary algorithms (EAs) were successfully used to solve variety of engineering problem. EAs are capable of providing pioneer solutions because they are capable of handling multimodel function, deal with functional non-linearity and measurement noise. In this paper, we explore the advantages of using differential evolution (DE) algorithm to select the optimal elements of analogue electronic circuit and specially passive and active filters. The produced results show that DE can find the optimal values of the proposed circuit elements such as resistor, capacitor and inductor in an efficient way. The developed circuits were tested with significant results.

Automated synthesis of passive analog filters using graph representation

In this paper, a novel method based on graph encoding scheme and clone selection algorithm is proposed for synthesizing passive analog filters. Graph is the most natural and convenient data structure to represent analog electronic circuit. The proposed graph-based encoding scheme can represent any topologies of passive analog circuit and their component values. Combined with the efficient analog circuit encoding scheme, clone selection algorithm is employed as a search engine for automatic design of passive analog filters. The proposed method can synthesize both topology and sizing (component parameters) of circuit simultaneously. Three filter design tasks are experimented to evaluate the proposed method. The experimental results demonstrate that passive analog filters can be generated effectively with modest computation time. Taking more practical conditions into account, the proposed method can be applied into automatic design of passive analog filters for engineering application without the guidance of experienced engineers.

Trade-offs in the OTA-based analog filter design

Operational transconductance amplifiers (OTAs) are widely used in the design of electronically tunable circuits. However, electronic tunability ranges of the OTA based filters are restricted by the limited bandwidth of the transconductance gain of the OTA. Furthermore, stability conditions and the linearity of the OTA which depends on the control current restrict the tunability. In this paper, some trade-offs in the electronically tunable filters are investigated. In addition, the tunability ranges of some first and second order OTA-C and OTA-RC filters are comparatively examined. Moreover, an OTA-C all-pass filter circuit is presented. SPICE simulations are performed and stability analyses are given for both of the OTA-C and OTA-RC filters. Operation of the presented all-pass filter is verified experimentally.

Using bifurcations in the determination of lock-in ranges for third-order phase-locked loops

Transmission and switching in digital telecommunication networks require distribution of precise time signals among the nodes. Commercial systems usually adopt a master-slave (MS) clock distribution strategy building slave nodes with phase-locked loop (PLL) circuits. PLLs are responsible for synchronizing their local oscillations with signals from master nodes, providing reliable clocks in all nodes. The dynamics of a PLL is described by an ordinary nonlinear differential equation, with order one plus the order of its internal linear low-pass filter. Second-order loops are commonly used because their synchronous state is asymptotically stable and the lock-in range and design parameters are expressed by a linear equivalent system [Gardner FM. Phaselock techniques. New York: John Wiley & Sons; 1979]. In spite of being simple and robust, second-order PLLs frequently present double-frequency terms in PD output and it is very difficult to adapt a first-order filter in order to cut off these components [Piqueira JRC, Monteiro LHA. Considering second-harmonic terms in the operation of the phase detector for second order phase-locked loop. IEEE Trans Circuits Syst I 2003;50(6):805–9; Piqueira JRC, Monteiro LHA. All-pole phase-locked loops: calculating lock-in range by using Evan’s root-locus. Int J Control 2006;79(7):822–9]. Consequently, higher-order filters are used, resulting in nonlinear loops with order greater than 2. Such systems, due to high order and nonlinear terms, depending on parameters combinations, can present some undesirable behaviors, resulting from bifurcations, as error oscillation and chaos, decreasing synchronization ranges. In this work, we consider a second-order Sallen-Key loop filter [van Valkenburg ME. Analog filter design. New York: Holt, Rinehart & Winston; 1982] implying a third order PLL. The resulting lock-in range of the third-order PLL is determined by two bifurcation conditions: a saddle-node and a Hopf.

Optimal Use of Some Classical Approximations in Filter Design

The classical Butter worth, Chebyshev and Elliptic (Cauer) low-pass filter approximations can be used in the design of analog and IIR digital filters in such a way as to obtain passband, stopband and transition band optimized filters at no order cost. The exact analytical relationships for such an optimal deployment of these approximations are developed and presented in this paper and their use is demonstrated through design examples.

Analytical Synthesis of Low-Sensitivity High-Order Voltage-Mode DDCC and FDCCII-Grounded &lt;emphasis&gt;R&lt;/emphasis&gt; and&lt;emphasis&gt; C&lt;/emphasis&gt; All-Pass Filter Structures

The difficulty of realizing the operations of addition and subtraction of a voltage-mode signal renders two special active elements, namely, differential difference current conveyors (DDCCs) and fully differential current conveyors (FDCCIIs), both of which have the ability to perform the operations of addition and subtraction, to become very important for voltage-mode analog filter design. Note that, for the design of operational transconductance amplifier and capacitor (OTA-C) filters, the recently reported analytical synthesis methods (ASMs) have been shown to be very effective for achieving simultaneously the three criteria, namely, all capacitors being grounded, the use of the minimum number of active and passive components, and the use of single-ended input OTAs. However, none of the ASMs uses DDCCs and FDCCIIs in the design of voltage-mode filters. In this paper, a method of realizing DDCC and FDCCII-based all-pass filter structures with either equal capacitances or equal conductances through a new ASM is presented. Only n current conveyors (the least number of active components), n grounded capacitors, and grounded resistors (the minimum number of passive components) are used for realizing an nth-order voltage-mode all-pass filter structure. Moreover, the new all-pass filter structure synthesized by the new ASM achieves very low individual as well as near-null group sensitivities just as in the case of the passive LC ladder filters, has very low power consumption, a low component spread for equal denominator conductance design, and a high input impedance which is attractive from the point of view of cascadability. Finally, H-Spice simulations, using 0.35-mum process and plusmn1.65-V supply voltages, are included and validate theoretical predictions.