Design Methodology For Digital Circuits Research Articles

Scalable [formula omitted]-power law based MOSFET model for characterization of ultra deep submicron digital integrated circuit design

Analytical circuit design, optimization, characterization and development of design methodology for digital circuits using nanoscale CMOS devices require compact equations. Such equations need to include first order short channel phenomena relevant to the nanoscale technology nodes being used. The present paper demonstrates that α-power model can be updated to include velocity overshoot necessary to characterize devices at ultradeep submicron technology nodes. Further, the three α-power model parameters (velocity saturation index α, transconductance parameter K1 and threshold voltage Vth) expressing MOSFET drain current has been expressed in terms of predictive technology model (PTM) parameters. Representative basic CMOS cells belonging both to inverter and transmission gate categories have been analytically characterized using the updated α-power model up to ultradeep submicron technology node with BSIM verification. It has been shown that consideration of velocity overshoot is important for accurate prediction below 40nm.

Synthesis methodology for magnetic domain wall logic

The demonstration of NOT and OR logic gates using magnetic domain walls could suggest that digital circuit design methodology may apply directly to this new technology to build complex circuits. This paper shows that the use of an external rotating field which propagates domain walls of opposite magnetization in antiphase instants, reveals unforeseen delays which modify the operation of sequential logic circuits. To overcome this difficulty and to introduce a design methodology, a new device capable of re-synchronizing the signals is presented.

A Software Defined Radio Platform with Direct Conversion: SOPRANO

In this paper, a new software defined radio platform with direct conversion is introduced. The platform is named SOPRANO, which stands for Software Programmable and Hardware Reconfigurable Architecture for Network. Main features of SOPRANO include a high-level design methodology for digital circuits, direct conversion based on six-port technology, and novel digital signal processing algorithms for multi-band and multi-mode operation. The first prototype of the SOPRANO platform has been built and was able to receive M-ary PSK (Phase Shift Keying) and QAM (Quadrature Amplitude Modulation) signals, with two different carrier frequencies at 2.45 GHz and 5.25 GHz, by changing signal-processing software.