High-speed Design Research Articles

Dielectric Loss Tangent Extraction Using Modal Measurements and 2-D Cross-Sectional Analysis for Multilayer PCBs

Frequency-dependent electrical properties of dielectric materials are one of the most important factors for high-speed signal integrity design. To accurately characterize material's dielectric loss tangent (tanδ) after multilayer printed circuit board fabrication a novel method was proposed recently to extract tanδ using coupled striplines' measured S-parameters and cross-section geometry. By relating modal attenuation factors to the ratio between the differential and common mode per-unit-length resistances, the surface roughness contribution is eliminated and the contributions of dielectric and conductor loss are separated. Here, we specifically decided to avoid using any physical dielectric model in the extraction algorithm in order to eliminate a need for any a priori information about dielectric behavior. Further analysis and improvement of the tanδ extraction approach is presented in this article. To evaluate the accuracy of the extraction, the impact of errors due to de-embedding, vector network analyzer measurement, and two-dimensional solver's calculation are taken into account by a statistical error model. A confidence interval of extracted tanδ is provided. To describe the frequency dependence of tanδ, a two-term Djordjevic model is proposed to fit the extracted tanδ curve, which guarantees causality and gives better agreement with measured insertion loss compared to the traditional Djordjevic model.

All optical switching of a single photon stream by excitonic depletion

Single semiconductor quantum dots have been extensively used to demonstrate the deterministic emission of high purity single photons. The single photon emission performance of these nanostructures has become very well controlled, offering high levels of photon indistinguishability and brightness. Ultimately, quantum technologies will require the development of a set of devices to manipulate and control the state of the photons. Here we measure and simulate a novel all-optical route to switch the single photon stream emitted from the excitonic transition in a single semiconductor quantum dot. A dual non-resonant excitation pumping scheme is used to engineer a switching device operated with GHz speeds, high differential contrasts, ultra-low power consumption and high single photon purity. Our device scheme can be replicated in many different zero dimensional semiconductors, providing a novel route towards developing a platform-independent on-chip design for high speed and low power consumption quantum devices.

High-Speed FIR Filter Design using Decision Tree Algorithm with FPGA Debugging

In recent years, the filter is one of the key elements in signal processing applications to remove unwanted information. However, traditional FIR filters have been consumed more resources due to complex multiplier design. Mostly the complexity of the FIR filter is dominated by multiplier design. The conventional multipliers can be realized by Single Constant Multiplication (SCM) and Multiple Constant Multiplication (MCM) algorithms using shift and add/subtract operations. In this paper, a hybrid state decision tree algorithm is introduced to reduce hardware utilization (area) and increase speed in filter tap cells of FIR. The proposed scheme generates a decision tree to perform shift & addition and accumulation based on the combined SCM/MCM approach. The proposed FIR filter was implemented in Xilinx Field Programmable Gate Array (FPGA) platform by using Verilog language. The experimental results of the DTG-FIR filter were averagely reduced the 48.259% of LUTs, 51.567 % of flip flops and 44.497 % of slices at 183.122 MHz of operating frequency on the Virtex-5 than existing VP-FIR.

Design of High Speed and Low-Power NOR Based Dynamic CMOS PLA for Logic Function Realization

This paper presents the design of dynamic CMOS PLA for high speed and low power VLSI circuit applications. The design has been carried out based on NOR function. The PLA has been implemented to realize 3 input logic functions using MOS transistor having channel length of 150nm . The circuit is simulated with the help of T-SPICE tools. According to ITRS currently VLSI circuits are designed at power supply voltage (VDD) of ≤ 1 V. In this paper the PLA has been simulated at VDD of 1 V. However the overall power consumption and gate delay of the circuit has been reported for the VDD from 0.5-1.2 V. The power consumption and gate delay of the order of nW and PS respectively. Compared to recent literature in the relevant area our work presented in this paper is also meet the high speed and low power VLSI circuit applications.

Low-Voltage High-Speed Ring Oscillator With a-InGaZnO TFTs

This paper presents a high-speed ring oscillator (RO) with amorphous Indium-Gallium-Zinc-Oxide Thin-film transistors (a-IGZO TFTs). The proposed RO reduces the delay of a single stage inverter using intermediate signals generated within the RO, hence, improving the speed. To validate the proposed idea, two conventional ROs (with diode-load load inverter and bootstrapped pseudo-CMOS inverter) and the proposed RO were fabricated at a temperature ≤ 180°C. Measured results of the proposed RO have shown a frequency and power-delay-product (PDP) of 173.2 kHz and 0.7 nJ at a supply voltage of 6V. Further, it shows approximately 155% (44%) increase in frequency and 14% (24.5%) decrease in PDP compared to diode-load inverter (bootstrapped pseudo-CMOS inverter) based ROs. Therefore, the proposed RO finds applications in low-voltage and high speed designs for timing signal generation.

Generating Cipher Text using BLOWFISH Algorithm for Secured Data Communications

Cryptography plays a major role in the network security. In order to secure the data one must do encryption of the original message. In this paper, the design and analysis of high speed and high performance BLOWFISH algorithm is implemented in VHDL coding and compared with AES (Advanced Encryption Standard) algorithm. The BLOWFISH algorithm involves the process of giving the data and key as input to the encryption block. BLOWFISH encryption algorithm is designed and programmed in VHDL coding. Then it is implemented in Xilinx 10.1. This research is carried in the following steps: designing of encryption algorithm, writing VHDL code, simulating the code on “ModelSim altera 6.5e”, synthesizing and implementing the code using Xilinx’s ISE 10.1.This research aims in developing flexible and technology independent architectures in the areas of VPN software, file compression, public domain software such as smart cards, etc. Also presents the comparison of BLOWFISH and AES algorithms. Experimental results show that BLOWFISH algorithm runs faster than AES algorithm while both of them consume almost the same

An Unbalanced Clock Based Dynamic Comparator: A High-Speed Low-Offset Design Approach for ADC Applications

Currently, dynamic comparator approach necessitates in high-speed and power efficient analog-to-digital converter applications due to its high latching speed and ultra-low power consumption. In this paper, a~novel dynamic comparator is proposed to reduce latch delay and offset. The comparator benefits from add-on cross-coupled transistors in latch structure and unbalanced clocks to enhance comparison speed and to lessen input offset voltage occurred due to mismatch in cross-coupled circuits in latch stage. The derivations for delay and input offset voltage are presented for proposed dynamic comparator with meticulous Monte-Carlo simulations. The results are verified by simulations in CADENCE SPECTRE at 1V supply voltage and 90nm CMOS technology. A~comparative analysis between the proposed dynamic comparator and the previous reported comparators has been presented. It is observed that the delay is reduced up to 46% and 6% as compared to conventional and two phase dynamic comparator, respectively. Moreover, the proposed design consumes 53.36muW power only. The Monte-Carlo simulation shows that the standard deviation of input offset voltage is 10.8~mV which is 12% and 77% of conventional and two phase dynamic comparator, respectively.

Analytical Calculation of Maximum Mechanical Stress on the Rotor of Interior Permanent-Magnet Synchronous Machines

This article investigates analytical methods for calculating mechanical stress on the rotor of Interior Permanent-Magnet Synchronous Machines (IPMSMs). First, two existing analytical methods for calculating the stress on rotor iron bridges were investigated using a flat-type IPMSM model. The calculations of centroid radii required by these methods were simplified by taking advantage of the symmetry. Then, an accurate function of the stress concentration factor (SCF) was developed to calculate the maximum mechanical stress (MMS) on the iron bridge from its reference stress. The trends of SCF and MMS changing with geometrical parameters were obtained during the statistical analysis of SCF. Using the proposed analytical method, MMS on the bilateral iron bridges of both flat- and V-type IPMSMs can be calculated accurately. Finite element analysis (FEA) shows that the proposed method has improved accuracy and generality in calculations of the MMS. The reliability of the FEA model and the proposed analytical method were further investigated in a plastic deformation experiment. Based on the experimental results, the limits of the stress models, selection of the failure criteria, and safety factor were discussed for high-speed IPMSM design.

English

English

Novel efficient full adder and full subtractor designs in quantum cellular automata

In this study, two new full adder/full subtractor designs based on quantum-dot cellular automata technology have been proposed. By means of the presented equation for SUM and SUBTRACT operations, the new high-speed, low power, and cost efficient designs have been achieved. Even if the three-level design has a lower cell count, occupies less area, and operates at a higher speed, the one-layer design is far more feasible. Analysis of the temperature and energy consumption of the proposed design indicates that the proposed approaches are superior to those of previous works.

Monitoring Differential Subsidence along the Beijing-Tianjin Intercity Railway with Multiband SAR Data.

High-speed railways have strict standards of infrastructure deformation and post-construction settlement. The interferometric synthetic aperture radar (InSAR) has the ability to detect ground deformation with a high accuracy and wide coverage and is becoming a useful tool for monitoring railway health. In this study, we analyzed the Beijing–Tianjin Intercity Railway (BTIR) track using InSAR time-series analysis with different data sets. First, by using RADARSAT-2 images, we examined the areas along the BTIR with significant subsidence. Then, we characterized these areas by means of X-band TerraSAR-X data. We adopted the expectation (Ex) and entropy (En) method, combined with GIS spatial analysis, to analyze the ground settlement differences on both sides of the railway. The results show that the area with the most severe differential settlement occurs between 12 and 20 km along the railway and within 120 to 20 m on both sides of the Chaoyang–Tongzhou section (CTS). Thereafter, we analyzed the reasons for the large difference in this area by considering different factors, e.g., regional land subsidence, groundwater level changes, and the dynamic load. In addition, we studied the impact of regional subsidence on the safe operation of the BTIR. The results show that the maximum different settlement along the BTIR is within the safe range, according to the high-speed railway design standard between 2010 and 2015. This study aims to provide technical support for assessing the impact of subsidence on the safety of railway operations.

Eddy Current Calculation of a High-Speed Slotted Machine With Halbach Magnetization at No-Load Condition

The eddy current and the eddy current loss in permanent magnets (PMs) are important factors in high-speed machine design and performance prediction. The eddy current loss is related to the magnetic field, the shape of magnets, and rotating speed. In this article, the eddy current is analytically calculated with a 2-D method in a high-speed machine with the Halbach magnetization. This analytical method calculates the eddy current with two parts: one part is induced by the instantaneous radial flux density and the other part is induced by instantaneous tangential flux density. The instantaneous radial and tangential flux densities are varying in the PM when the rotor rotates. The flux density in the PM is calculated by the 2-D complex relative permeance method with the SC-Toolbox aid. When the slotted machine operated at no-load condition, the eddy current is analytically calculated in this article based on the instantaneous flux density, and the eddy current distribution in the magnet is compared with the finite-element method (FEM) solutions, the comparison shows that the 2-D analytical method is an effective method for the eddy current and eddy current loss calculation. In the slotted machine with the Halbach magnetization, the eddy current loss increases with the arc angle of the main segment magnet increases, the eddy current loss increases fast at high speeds and cannot be ignored, but Halbach magnetization can reduce it in the high-speed machine as long as the magnetization parameters are chosen properly.

High-speed colour-converting photodetector with all-inorganic CsPbBr3 perovskite nanocrystals for ultraviolet light communication

Optical wireless communication (OWC) using the ultra-broad spectrum of the visible-to-ultraviolet (UV) wavelength region remains a vital field of research for mitigating the saturated bandwidth of radio-frequency (RF) communication. However, the lack of an efficient UV photodetection methodology hinders the development of UV-based communication. The key technological impediment is related to the low UV-photon absorption in existing silicon photodetectors, which offer low-cost and mature platforms. To address this technology gap, we report a hybrid Si-based photodetection scheme by incorporating CsPbBr3 perovskite nanocrystals (NCs) with a high photoluminescence quantum yield (PLQY) and a fast photoluminescence (PL) decay time as a UV-to-visible colour-converting layer for high-speed solar-blind UV communication. The facile formation of drop-cast CsPbBr3 perovskite NCs leads to a high PLQY of up to ~73% and strong absorption in the UV region. With the addition of the NC layer, a nearly threefold improvement in the responsivity and an increase of ~25% in the external quantum efficiency (EQE) of the solar-blind region compared to a commercial silicon-based photodetector were observed. Moreover, time-resolved photoluminescence measurements demonstrated a decay time of 4.5 ns under a 372-nm UV excitation source, thus elucidating the potential of this layer as a fast colour-converting layer. A high data rate of up to 34 Mbps in solar-blind communication was achieved using the hybrid CsPbBr3–silicon photodetection scheme in conjunction with a 278-nm UVC light-emitting diode (LED). These findings demonstrate the feasibility of an integrated high-speed photoreceiver design of a composition-tuneable perovskite-based phosphor and a low-cost silicon-based photodetector for UV communication.

The New Non-Volatile Based On STT-MRAM Lies in The Design and Implementation of High-Speed Cache of Magnetic Random Memory Material

With the development of semiconductor technology, the buffer of processor integration is getting larger and larger. The high-speed design of storage capacity of traditional memory devices has an important connection with cache. How to design new non-volatile magnetic random memory has become an important step. To solve these problems, researchers at home and abroad have discussed a large number of new non-volatile memory technologies, which have excellent characteristics such as non-volatility, low power consumption and high memory density. The key optimization techniques for the disadvantages of high write power, limited write life and long write latency of the new non-volatile memory are analyzed. Finally, the possible research directions of new non-volatile memory devices in future cache optimization are discussed.

Implementation of Double Tail Dynamic Latched Architecture for High Speed ADC

In this proposed work, a low offset voltage (mV) and high speed voltage comparator circuit is designed and simulated. With the unceasing rise of various wireless portable communication systems, high speed transceiver circuits, and high speed memory circuit design, sensitized sensor technologies, and wireless sensor network design, the design of high speed, low offset voltage and low power operated comparators are indispensable blocks in the design of a very good analog to digital converter architecture. The proposed work does not entail the usage of any pre-amplification stages, which accounts for the direct reduction of current consumption and silicon area. The MOSFETs at the input differential pair stage of the CMOS comparator circuit are designed to operate in near sub-threshold region rather than in saturation region to account for the low power consumption. The proposed double tail dynamic latched comparator in this work is implemented in 90μm CMOS technology with the operating power supply voltage (VDD) of 1.2 V and sampling frequency of 600 MHz using Microwind EDA tool. The simulated results indicate that the total power consumption is calculated to be of the order of 126.3μw with the delay of 876ps. From the obtained results, the proposed double tail dynamic latched circuit has considerably lowered both the propagation delay time and power consumption, when compared to the previous works.

Experimental Study of Active T-Foil Control of Longitudinal Motions of a Trimaran Hull in Irregular Waves

High-speed ships often experience over larger ship motions in waves. Therefore, highspeed ships without motion control hardly have practical commercial values. Recent years saw wider adoptions of T-foils on high-speed ships, which greatly improve ship performances in waves. In this study, we designed a series of model tests to study the motion-reducing effects of T-foils in waves. Heaves, pitches, and bow accelerations are quantities to be measured in the experimental tests. The study shows that the reduction effects of T-foil-controlled longitudinal motions of a trimaran model are prominent. Comparing with naked model tests, it is found that active T-foil controls may reduce motions of trimaran ships in irregular waves by about 20–30%. In the most favorable case, the reduction is as high as 51%. This study shows that installation of T-foils may dramatically reduce the motions and, thus, provide an efficient control tool to mitigate ship motions in waves. The main aims of the present study were to provide an experimental setup for model testing of an active T-foil control system and determine the control equations. Although the control and actuation systems designed in this study are simple, they do produce the required effects. The model-tested control equations can be used for high-speed foil-type ship design directly if proper similarity ratios are used to project the model test results to real ships. 1. Introduction Increasing the length-to-beam ratio is one of the most effective ways to reduce wave-making resistance so that high speed can be achieved (Ackers et al. 1998). High-speed ships with very slender hulls are, however, not stable. Placing two small side hulls on the port and starboard with displacements less than 10% of the total ship displacements improves the ship's stability greatly. This simple consideration led to the fast development of trimaran hull forms in recent years (Coppola & Mandarino 2001; Degiuli et al. 2003; Oh et al. 2005). Encouraged by the successful sea trials of the 127-m-long littoral combat ship Independence at the speed of 50 knots, researchers move forward to search for new technology to improve the motion performances of trimaran hull forms in waves (Li et al. 2002; Hebblewhite et al. 2007; Jia et al. 2009). This is because high-speed ships are faced with the big challenge of severe oscillations in waves. Too large motion responses in waves would counterbalance the high-speed benefits. Therefore, motion control is crucial for high-speed trimaran ships.

The cooling efficiency of different dental high-speed handpiece coolant port designs

The study investigated the cooling efficiency of different numbers of water coolant ports on high-speed handpieces (HSH) under cooling conditions used in clinical practice.Twenty-four groove cuts with water on and nine cuts without water were made on extracted human premolars using three HSHs with different port configurations. Thermocouples were placed in the pulp chambers and temperature changes were recorded with 1-, 3- and 4-coolant port handpieces. Cooling rate was calculated for each coolant port design system. Temperature changes were statistically analysed with Kruskal-Willis Test.All three sample groups resulted in a net temperature decrease during the cutting period with water turned on. There was a pattern of increased cooling rate with increasing number of coolant ports (1-port: -4.27 (±0.94) °C, 3-port: -4.66 (±2.90) °C, 4-port: -5.03 (±1.08) °C). The difference was not statistically significant (p = 0.681). Calculations of cooling rate showed a higher cooling rate with an increase in the number of ports (1-port: 46.13 × 10−4 K−1, 3-port: 51.36 × 10−4 K−1, 4-port: 56.32 × 10−4 K−1). In the dry tooth preparation samples, all resulted in a net increase in temperature (1-port: 4.43 (±3.30) °C, 3-port: 5.13 (±3.27) °C, 4-port: 2.87 (±2.97) °C).All the three water coolant port configurations showed effective cooling of the tooth during cutting and decreased pulpal temperature with no statistical difference. There are HSH designs with varying numbers of coolant ports available in the market for clinicians. The results of the current study could potentially aid clinicians in making a decision while choosing between different dental handpieces.

THE RESEARCH OF THE VARIATION LAWS OF SETTLEMENT AND INTERNAL FORCE OF PILE GROUPS OF RAILWAY BRIDGE CAUSED BY PUMPING BRINE

Taking Yingzigou Bridge of Dezhou-Dajiawa railway as the engineering background, the three-dimensional fluid-solid coupling models of pile group caps were established on the basis of five-stage field monitoring data of the settlement and groundwater level drop by using FLAC3D software. On the basis of the field monitoring data checking, the variation of axial force and skin friction of piles at different positions under the condition of water level drop was simulated. The results show that with the underground water level dropped, the axial force of pile along the shaft increased first and then decreased. The cross section of maximum axial force moved down constantly. In the same ground water levels drop, the distance between the maximum axial force and neutral point of each pile and the top of the pile was corner pile > side pile> near borehole center pile > center pile. The size of the pile axial force and negative skin friction resistance was corner pile > side pile> near borehole center pile > center pile. The upper part of the pile was subjected to negative skin friction resistance. The skin friction resistance of each pile along the shaft increased first and then decreased. The lower part of the pile was subjected to positive skin friction resistance. The skin friction resistance of each pile along the shaft increased. The location of the maximum negative friction resistance was about 10m distance from the top of the pile. The maximum negative friction resistance of corner pile was -36.5kPa. The distance of neutral point of center pile from the top was 35.2m. The neutral point of each pile was in accordance with the position of the maximum axial force of the pile. A reliable basis was provided for high-speed railway survey and design and the prevention and control of land subsidence along the railway.

Techniques of impedance matching for minimal PCB channel loss at 40 GBPS signal transmission

PurposeThis paper aims to analyze the negative impact of surface mount (SMT) pad and imperfect via structure such as stub, pad, non-functional pad (NFP) and anti-pad on the signal integrity at 40 Gbps transmission on printed circuit board (PCB) due to impedance mismatch or discontinuity. The optimized modeling of via and SMT structures is performed to achieve minimal impedance mismatch and insertion loss less than 10 dB for six-inch full path transmission line between transmitter and receiver on PCB at Nyquist frequency 20 GHz.Design/methodology/approachThis work is split into two phases. The first phase involves optimization of via and SMT structures in three-dimensional electromagnetic (3DEM) simulation using Hyperlynx Via Wizard and Keysight EMPro software, respectively, followed by analysis of time domain reflectometry (TDR) and insertion loss (Sdd21). Whereas, in the second phase, full path hybrid mode simulation involving vias for signal layer transition, a 6-inch PCB channel and SMT pads is performed using Keysight ADS software to observe the TDR, Sdd21 and eye diagram at 40 Gbps transmission.FindingsImperfect via and SMT structures have a negative effect on signal reflection and attenuation. The optimized via and SMT minimizes the impedance mismatch by 81 per cent and insertion loss by 4.5 dB, ultimately enlarging the eye diagram opening to achieve minimal data loss at receiver with 40 Gbps transmission.Originality/valueThe results of original empirical research work on signal integrity analysis that optimizes the PCB channel design to achieve 40 Gbps signal transmission are presented in this study. It serves as a reference guide for high-speed PCB layout design.

Electromechanical Modeling and High Speed Design of a Tubular Ultrasonic Motor

Tubular ultrasonic motors are one of the simplest yet effective methods to realize rotational ultrasonic motors. In this paper, electromechanical modeling of a tubular ultrasonic motor is achieved using assumed-modes method, Euler-Bernoulli beam theory, and constitutive equations of piezoelectricity. Upon validating the analytical model using finite element method (FEM) and the experimental result, effect of the design variables on speed is investigated using sensitivity analysis. The result proves that the speed of the motor is almost independent of the tube length for a constant length ratio of the tube and piezo-plates. Excellent agreement between the experimental and analytical model is observed. In addition, a set of guidelines for high speed designing of the stator is proposed. The results of this paper greatly facilitate design of tubular ultrasonic motors with respect to achieving high speed motor.