Description Language Research Articles

Lexicographical Study on the Verbal Aspect of the Matigsalug Language

It cannot be denied that the Philippines is rich in language and culture. One of them is the Matigsalug language. This study focuses on the lexicography of the Matigsalug language focusing on the verb aspect. The main participants of this study are five selected Matigsalug who have skills and sufficient knowledge in speaking and writing the Filipino and Matigsalug languages. The instrument used in the research done is the translation of the list or table of words written in the Filipino language that are in the verb aspect. In this study, the researcher used a qualitative design and the ethnographic method of study that represents a broad research method and design to develop a dictionary. For a more extensive and meaningful interpretation and study of the data, the researcher used Descriptive Linguistics Analysis or descriptive language analysis. Based on the results of the study, it was proven that many verbs are used by the Matigsalug. There are additions to the perfective, imperfective and contemplative aspects, exchange of graphemes, use of hyphens, and writing and pronunciation methods in the Matigsalug lexicography. The implication of this study will help develop teachers’ understanding and guidance to Matigsalug students.

Diagnosing infeasible optimization problems using large language models

Decision-making problems can be represented as mathematical optimization models, finding wide applications in fields, such as economics, engineering, transportation, and health care. One of the primary barriers to deploying these models in practice is the challenge of helping practitioners understand and interpret such models, particularly when they are infeasible, meaning no decision satisfies all the constraints. Existing methods for diagnosing infeasible optimization models often rely on expert systems, necessitating significant background knowledge in optimization. In this paper, we introduce OptiChat, a first-of-its-kind natural language-based system equipped with a chatbot GUI for engaging in interactive conversations about infeasible optimization models. OptiChat can provide natural language descriptions of the optimization model itself, identify potential sources of infeasibility, and offer suggestions to make the model feasible. The implementation of OptiChat is built on GPT-4, which interfaces with an optimization solver to identify the minimal subset of constraints that render the entire optimization problem infeasible, known as the Irreducible Infeasible Subset (IIS). We utilize few-shot learning, expert chain-of-thought, key-retrieve, and sentiment prompts to enhance OptiChat’s reliability. Our experiments demonstrate that OptiChat assists both expert and non-expert users in improving their understanding of the optimization models, enabling them to quickly identify the sources of infeasibility.

Field-programmable gate array implementation of efficient deep neural network architecture

Deep neural network (DNN) comprises multiple stages of data processing sub-systems with one of the primary sub-systems is a fully connected neural network (FCNN) model. This fully connected neural network model has multiple layers of neurons that need to be implemented using arithmetic units with suitable number representation to optimize area, power, and speed. In this work, the network parameters are analyzed, and redundancy in weights is eliminated. A pipelined and parallel structure is designed for the fully connected network information. The proposed FCNN structure has 16 inputs, 3 hidden layers, and an output layer. Each hidden layer consists of 4 neurons and describes how the inputs are connected to hidden layer neurons to process the raw data. A hardware description language (HDL) model is developed for the proposed structure and the verified model is implemented on Xilinx field-programmable gate array (FPGA). The modified structure comprises registers, demultiplexers, weight registers, multipliers, adders, and read-only memory lookup table (ROM/LUT). The modified architecture implemented on FPGA is estimated to reduce area by 87.5% and improve timing by 3x compared with direct implementation methods.

PD-Explain: A Unified Python-Native Framework for Query Explanations Over DataFrames

Interfaces that rely on the Python programming language have become a popular tool for data analysis and exploration. In particular, the Pandas library allows users to query, manipulate, and visualize data in an easy and intuitive manner. However, users who perform such manipulations over the data in the exploratory process may struggle to justify their results, or understand which part (if any) of the obtained results is interesting and why. To handle such scenarios we developed PD-Explain, a Python library that adapts multiple prevalent query explanation approaches from the literature, and makes them accessible to Pandas users. PD-Explain is seamlessly integrated with Pandas and contains explanation functions that users can employ to choose the explanation approach they wish to use along with the necessary parameters in order to get the explanation in the suitable form. PD-Explain further allows users to automatically detect the interesting parts of a query result and get a visualization of the explanation accompanied by a Natural Language description. Our demonstration will include four different types of query result explanations and three real-world datasets with appropriate analysis tasks that will highlight the intuitive nature and usefulness of PD-Explain in data exploration tasks.

Design of digital frequency meter based on FPGA

Frequency measurement is one of the key technicals of the electronic measurement field, and the digital frequency meter is an indispensable measuring tool for measuring technology engineering personnel. Nowadays, digital frequency meters are indispensable components in daily appliances such as televisions, refrigerators, washing machines, and other smart home appliances. Therefore, the measurement range of digital frequency meters is becoming wider, and their design structures are becoming increasingly complex. Digital frequency meters play a crucial role in developing electronic products as a whole. Use the Very High-speed Hardware Description Language (VHDL) in Electronic Design Automation(EDA)technology to simulate and verify the digital frequency meter. Through simulation analysis, design the measurement circuit of the digital frequency meter and verify its accuracy. In the design process of a digital frequency meter, its function is to measure SIN signals, unit pulse signals, and the frequency range of various signals, achieved by collecting physical quantities within a unit of time.

Attribute binding enhancement improvement for diffusion model based zero-shot image segmentation

As diffusion model's potential ability to accomplish perception tasks being discovered, many researchers have tried to apply diffusion model in segmentation tasks and achieved good results. However, there are not many methods to optimize the diffusion model for segmentation tasks by improving the text side. Even if some research have pointed out that diffusion model sometimes 'misunderstand' prompt and bind attributes to wrong objects. With the development of artificial intelligence and the gradual entry of large models into people's daily lives, in addition to the performance of the model, the model's interactivity and ability to understand natural language are also more important. Based on existing zero-shot diffusion model based segmentation method, this work introduces a new method to enhance attribute binding in the embedding of prompt improve the performance of the model. Through this method, more descriptive text will get better segmentation results, which to some extent, improves the segmentation performance of the model for inputs that are more in line with natural language description habits.

Linguistic-Driven Partial Semantic Relevance Learning for Skeleton-Based Action Recognition.

Skeleton-based action recognition, renowned for its computational efficiency and indifference to lighting variations, has become a focal point in the realm of motion analysis. However, most current methods typically only extract global skeleton features, overlooking the potential semantic relationships among various partial limb motions. For instance, the subtle differences between actions such as "brush teeth" and "brush hair" are mainly distinguished by specific elements. Although combining limb movements provides a more holistic representation of an action, relying solely on skeleton points proves inadequate for capturing these nuances. Therefore, integrating detailed linguistic descriptions into the learning process of skeleton features is essential. This motivates us to explore integrating fine-grained language descriptions into the learning process of skeleton features to capture more discriminative skeleton behavior representations. To this end, we introduce a new Linguistic-Driven Partial Semantic Relevance Learning framework (LPSR) in this work. While using state-of-the-art large language models to generate linguistic descriptions of local limb motions and further constrain the learning of local motions, we also aggregate global skeleton point representations and textual representations (which generated from an LLM) to obtain a more generalized cross-modal behavioral representation. On this basis, we propose a cyclic attentional interaction module to model the implicit correlations between partial limb motions. Numerous ablation experiments demonstrate the effectiveness of the method proposed in this paper, and our method also obtains state-of-the-art results.

MoConVQ: Unified Physics-Based Motion Control via Scalable Discrete Representations

In this work, we present MoConVQ, a novel unified framework for physics-based motion control leveraging scalable discrete representations. Building upon vector quantized variational autoencoders (VQ-VAE) and model-based reinforcement learning, our approach effectively learns motion embeddings from a large, unstructured dataset spanning tens of hours of motion examples. The resultant motion representation not only captures diverse motion skills but also offers a robust and intuitive interface for various applications. We demonstrate the versatility of MoConVQ through several applications: universal tracking control from various motion sources, interactive character control with latent motion representations using supervised learning, physics-based motion generation from natural language descriptions using the GPT framework, and, most interestingly, seamless integration with large language models (LLMs) with in-context learning to tackle complex and abstract tasks.

Cross-Modal Retrieval-enhanced code Summarization based on joint learning for retrieval and generation

Context:Code summarization refers to a task that automatically generates a natural language description of a code snippet to facilitate code comprehension. Existing methods have achieved satisfactory results by incorporating information retrieval into generative deep-learning models for reusing summaries of existing code. However, most of these existing methods employed non-learnable generic retrieval methods for content-based retrieval, resulting in a lack of diversity in the retrieved results during training, thereby making the model over-reliant on retrieved results and reducing the generative model’s ability to generalize to unknown samples. Objective:To address this issue, this paper introduces CMR-Sum: a novel Cross-Modal Retrieval-enhanced code Summarization framework based on joint learning for generation and retrieval tasks, where both two tasks are allowed to be optimized simultaneously. Method:Specifically, we use a cross-modal retrieval module to dynamically alter retrieval results during training, which enhances the diversity of the retrieved results and maintains a relative balance between the two tasks. Furthermore, in the summary generation phase, we employ a cross-attention mechanism to generate code summaries based on the alignment between retrieved and generated summaries. We conducted experiments on three real-world datasets, comparing the performance of our method with baseline models. Additionally, we performed extensive qualitative analysis. Result:Results from qualitative and quantitative experiments indicate that our approach effectively enhances the performance of code summarization. Our method outperforms both the generation-based and the retrieval-enhanced baselines. Further ablation experiments demonstrate the effectiveness of each component of our method. Results from sensitivity analysis experiments suggest that our approach achieves good performance without requiring extensive hyper-parameter search. Conclusion:The direction of utilizing retrieval-enhanced generation tasks shows great potential. It is essential to increase the diversity of retrieval results during the training process, which is crucial for improving the generality and the performance of the model.

Optimization modeling and verification from problem specifications using a multi-agent multi-stage LLM framework

This paper explores the use of Large Language Models (LLMs) in modeling real-world optimization problems. We concretely define the task of translating natural language descriptions into optimization models (NL2OPT) and provide criteria for classifying optimization problems for the NL2OPT task. Our novel multi-agent modeling framework leverages relations identifier agents and a multi-agent verification mechanism, eliminating the need for solver execution. Additionally, we introduce a straightforward and practical evaluation framework, offering a more effective assessment method compared to traditional execution-based evaluations. We have created a unique dataset tailored for optimization modeling, featuring Problem Specifications as a structured representation of optimization problems. Through comprehensive experiments, our study compares our modeling framework with existing LLM reasoning strategies, highlighting their relative effectiveness in optimization modeling tasks. We also perform ablation studies to explore the effect of different components of our modeling framework. Experimental results demonstrate that our multi-agent framework outperforms many common LLM prompting strategies.

An Interview with APPLE Lecture Speaker Dr. Ross Perlin

On April 26th, 2024, the Studies in Applied Linguistics and TESOL (SALT) journal interviewed Dr. Ross Perlin, an invited speaker for the 2024 APPLE Lecture Series hosted by the Applied Linguistics and TESOL program at Teachers College, Columbia University. Dr. Ross Perlin is a linguist, writer, and translator focused on exploring and supporting linguistic diversity. His book Language City: The Fight to Preserve Endangered Mother Tongues in New York was just released by Grove in the US and the UK. Since 2013, he has been co-director of the Endangered Language Alliance in New York, managing research projects on mapmaking, documentation, policy, and public programming for urban linguistic diversity. He also teaches linguistics at Columbia. His writing has appeared in the New York Times, The Guardian, Harpers, and elsewhere. His first book, Intern Nation: How to Earn Nothing and Learn Little in a Brave New Economy, ignited national conversation about unpaid work. He has an MA in language documentation and description from the University of London (SOAS) and a PhD in linguistics from the University of Bern.

The application of Verilog in the development of casual games

Verilog is a hardware description language (HDL) that is widely used in digital circuit design and simulation. Its development is closely related to computer science and electrical engineering. Verilog gained popularity in the early 1980s as digital circuit designs became increasingly complex, requiring more efficient circuit design and verification tools. At the same time, rapid advances in computer hardware also stimulated the demand for digital circuit design languages. Furthermore, the popularity and adoption of Verilog highlight the growing necessity for digitisation, automation, and intelligence in modern society. As digital technology continues to advance across various industries, the need for effective and dependable digital circuit design languages is also increasing. This paper delves into the complex process of recreating the timeless arcade classic Pac-Man on the Spartan 3E FPGA platform using hardware description and digital circuit techniques and the Verilog programming language. Through a comprehensive review of existing literature and research, this study investigates the fusion of traditional game design principles with state-of-the-art hardware programming methods, demonstrating the seamless integration of software-driven game mechanics with hardware-based implementation. Through careful design and coding strategies, Pac-Man's basic functionality, such as maze traversal, ghost AI, and pellet consumption, is faithfully replicated using Verilog modules customized for the Spartan 3E FPGA board. By bridging the realms of game development and hardware engineering, this paper not only showcases the versatility of Field Programmable Gate Array (FPGA) technology in entertainment applications but also underscores the interdisciplinary nature of modern computing endeavours.

Semantic similarity loss for neural source code summarization

AbstractThis paper presents a procedure for and evaluation of using a semantic similarity metric as a loss function for neural source code summarization. Code summarization is the task of writing natural language descriptions of source code. Neural code summarization refers to automated techniques for generating these descriptions using neural networks. Almost all current approaches involve neural networks as either standalone models or as part of a pretrained large language models, for example, GPT, Codex, and LLaMA. Yet almost all also use a categorical cross‐entropy (CCE) loss function for network optimization. Two problems with CCE are that (1) it computes loss over each word prediction one‐at‐a‐time, rather than evaluating a whole sentence, and (2) it requires a perfect prediction, leaving no room for partial credit for synonyms. In this paper, we extend our previous work on semantic similarity metrics to show a procedure for using semantic similarity as a loss function to alleviate this problem, and we evaluate this procedure in several settings in both metrics‐driven and human studies. In essence, we propose to use a semantic similarity metric to calculate loss over the whole output sentence prediction per training batch, rather than just loss for each word. We also propose to combine our loss with CCE for each word, which streamlines the training process compared to baselines. We evaluate our approach over several baselines and report improvement in the vast majority of conditions.

Ontological description method for building service-oriented distributed learning systems

The subject of the research is the analysis and justification of the use of software engineering processes based on ontologies of data access and representation of access to knowledge bases and knowledge reuse in the language of algebra of finite predicates, which is a class of descriptive logics. This approach allows you to use the advantages of ontologies and logic programming in the refactoring of distributed distance learning systems. The purpose of the work is to create a formalism for describing the interaction of services and algorithms for building web service interfaces for the implementation of an effective SOA system using the paradigm of access to data based on ontologies. To achieve the goal, the following tasks were solved: an analysis of the main types of interaction structures of SOA services, an overview of implementations of systems working with a family of descriptive logic languages, namely, algebra of finite predicates, and a description of the structure of the ontology necessary for the operation of service-oriented systems, which has the markup of the Semantic Web standard using finite predicate algebra equations. The task is an urgent task of ensuring the organization of interaction of Internet resources in the development of distributed virtual learning systems, and such interaction is enabled by the service-oriented architecture of software development. The article examines modern technologies of the Semantic Web and their role in ensuring the creation of applied software systems of distributed learning resources built using distributed interactive services. The considered methods and materials include methods of algebra of finite predicates, theory of algorithms, object-oriented design, theory of unification. The results. The semantics of the SOA system is obtained, which makes it possible to describe SOA systems in the languages of descriptive logic. The effectiveness of the mathematical formalism of the algebra of finite predicates for the tasks of logical analysis of applied ontologies, the use of knowledge reuse methods, and the description of service-oriented systems is shown. The necessity of using algorithms for automatic construction of web interfaces is shown. The conclusions of the work highlight the advantages of the researched solution, namely, algorithms for the automated construction of web service interfaces for SOA architecture, which make it possible to automatically build web service interfaces. Algorithms differ in a more general model and speed of work and require an assessment of complexity.

Automated design of embedded digital signal processing systems on SOC platform

The object of the study is the procedures for automated design and analysis of digital signal processing algorithms on the SoC technology platform. The subject of the study is models, methods and procedures for designing and optimal selection of SoC components for the implementation of digital signal processing algorithms for audio spectrum. The aim of the study is to develop models and procedures for determining the possibilities of a compromise distribution of signal processing algorithm computations in the cycle of computer-aided design on the SoC technology platform in terms of performance and the feasibility of using hardware and software algorithms realization. The article solves the following tasks: consideration of the procedures for interacting the processor core with programmable logic as part of system-on-chip systems; development of procedures for computer-aided design and analysis of signal processing systems using programming languages and hardware description languages for the implementation of embedded systems. The following methods are being used: implementation of digital signal processing algorithms in the C programming language and high-level synthesis tools for realizing IP blocks, diagnostic experiment by generating test signal patterns, and analysis of the processing results at the system output. The results achieved. Based on the analysis of the procedures for the interaction of the processor core and programmable logic on the selected SoC platform, a model of the audio spectrum signal processing system is designed. The practical implementation was performed based on the Vivado/Vitis/Vitis HLS CAD tool stack. The proposed model was verified using a programmable test signal generator and analyzing the obtained characteristics of digital filters at the system output. Conclusions. The article analyzes the principles of designing embedded information processing systems implemented in system-on-chip. The principles of building and analyzing digital signal processing systems based on system-on-chip containing programmable logic and processor parts are considered. The developed methods have been tested on the algorithms of CIC and FIR filters on the technological platform of SoC FPGA of the ZYNQ-7000 family of Xilinx company.

Intelligent design and optimization system for shear wall structures based on large language models and generative artificial intelligence

Intelligent design technology for shear wall structures has great potential for enhancing design efficiency and addressing the challenges of tedious and repetitive design tasks. Recently, there has been a surge in the development of this technology. However, existing deep learning-based design methods for shear wall structures suffer from poor quality and usability issues. To address these challenges, this study proposes an intelligent design and optimization system for shear wall structures based on large language models (LLMs) and generative artificial intelligence (AI). The system employs an LLM as the core controller, which interacts with engineers to interpret their language descriptions and translate them into executable computer code. Subsequently, the system utilizes the corresponding structural generation and optimization methods to accomplish intelligent design tasks automatically. Furthermore, the system incorporates such critical factors as the empirical rules, mechanical performance, and material consumption into the structural optimization process. A unique three-level, two-stage optimization method is constructed based on topology, pattern, and size to enhance the overall design quality. Being able to complete the entire workflow of architectural drawing processing, structural scheme generation, and analysis model establishment, the proposed system enables automated and efficient design of shear wall structures. Through the analysis and validation of multiple cases, it was demonstrated that this system can significantly speed up the design by approximately 30 times compared to that of traditional methods whilst ensuring the safety and cost-effectiveness of the design schemes. Consequently, this study provides valuable insights for the advancement of automated structural design undertakings.

Design and performance analysis of asynchronous network on chip for streaming data transmission on FPGA

The majority of the system on chip (SoC) uses the network on chip (NoC) as routing ports for data transfer from node-to-node with minimal power consumption and low latency and high throughput. This paper concentrates on the ability to model the asynchronous NoCs on the asynchronous circuits on field programmable gate arrays (FPGAs). A 3×3 NoC and its universal asynchronous receiver transmitter (UART) protocol is designed and its simulation of the Verilog hardware description language (VHDL) code is done and tested on the Artix-7 FPGA kit, the testing processes in done using the Chipscope tool. In order to meet target requirements in terms of power consumption and latency, the label switching (LS) technique is used as routing. The proposed LS-NoC with level-encoded dual-rail (LEDR) encoding technique provides throughput by registering the packet between the different routers and it helps to improve throughput and speed. The effectiveness of the data transfer is measured and analyzed through a synthesis summary in terms of lookup table’s (LUT’s), slice registers, flip flops’s (FF’s), latency, and packet delivery ratio (PDR) for the traffic pattern generator. The proposed NoC is designed for 8×8 and each port size is 21 bits including ID’s of source and destination routers. The results can be justified by following results: improvement of LUTs is about 12%, flip-flops are 7%, improvement of throughput is 23% and delay is reduced by 26%.

FPGA in hardware description language based digital clock alarm system with 24-hr format

Currently, digital clock adapts microprocessor or microcontroller system. Performance of speed and reconfigurability issue become a main concern in digital clocks. New additional feature may be introduced in digital clocks in the future. Field programmable gate array (FPGA) offer better performance of speed and reconfiguration features. Based on these advantages, it is essential to study or explore the digital clock with FPGA design. The objective in this study is to create a hardware description language (HDL)- based digital clock with alarm system and implement it onto the Altera DE2- 115 board. Using Verilog HDL language in Quartus Prime 20.1 Lite Edition software, all submodule components is developed and being test benched using ModelSim-Altera Starter Edition 13.1 to ensure the correct functionality. Then all inputs and outputs will be assigned through pin assignment in the software. For verification purpose, it will be downloaded to the Altera DE2-115 board. In conclusion, the file has been successfully implemented to the board and the digital clock with alarm is fully functional as expected. This was proved by the alarm signal, time adjustment and display of the three-display mode which is clock, alarm, and input where each mode carries their own functions as expected.

Deep Learning Algorithm Analysis of Potato Disease Classification for System on Chip Implementation

Recently, every aspect of human existence has been affected by modern technologies including agriculture. The broad range of crops has witnessed setbacks in different capacities due to climate change among other factors, hence leading to diseases and infections; thereby leading to negatively impacted nutrition. This work uses a deep learning algorithm to investigate the classification of potato diseases as a case study which can be leveraged on by other agricultural products for reference. Potatoes play a vital role in global agriculture, constituting a significant portion of fresh produce consumption. In southern Africa, potatoes hold particular importance, comprising 39% of total fresh produce consumption. However, the industry faces challenges from diseases such as early blight and late blight, resulting in substantial yield losses. Early detection is crucial, prompting the exploration of Convolutional Neural Networks (CNNs) for their disease classification capabilities. CNNs have shown excellent results in plant disease classification based on image data set. This study proposes the potential of aligning existing software-based Central Processing Units (CPUs) and Graphic Processing Units (GPUs) with FPGA-based potato disease classification using CNNs. To this end, five CNN models were trained on the Plant Village dataset for analysis. The models were compared using various performance metrics such as sensitivity, F1-Score, precision and recall. Based on the analysis the most suitable CNN model for FPGA implementation was selected. The chosen model was optimized for size using quantization technique. Subsequently the model was converted to Hardware Description Language (HDL) using Vitis High level synthesis (HLS) tool performance in terms of resources required to implement the model in System on Chip (SoC) was analysed.

Self‐directed use of machine translation among language learners: Does it lead to disruptive L2 avoidance?

AbstractRapid improvements in the capabilities of machine translation (MT) raise questions about possible increases in overreliance on MT among lower‐proficiency or novice level language learners. This study investigated how such learners described their use of online MT for independent reading and writing tasks, and whether this included descriptions of second language (L2) avoidance behavior. We also explored learners' reasons for using MT and the perceived effects on their language learning. Findings from in‐depth interviews with eight second‐year tertiary language learners suggest that using MT could exceed desirable use among such learners in relation to the language learning objectives, resulting in language avoidance. Although MT helped them in completing language tasks, its effects were perceived to be detrimental toward their abilities to express themselves in the L2. As such, the use of MT may lead to purely superficial language learning in formal language programs. These findings suggest language educators need to consider instructional scaffolding in language programs for such learners and guidelines to assist their autonomous use of the tool.