Depletion-mode Junction Field-effect Transistors Research Articles

Evaluation of SiC JFET Performance During Repetitive Pulsed Switching Into an Unclamped Inductive Load

Silicon carbide (SiC) depletion mode junction field-effect transistors (JFETs) are well suited for pulsed power applications as an opening switch due to their normally ON (N-ON) nature. To assess the robustness and breakdown energy tolerance of JFETs under pulsed conditions, they must be evaluated for breakdown energy capability before failure. This is very important for circuit breaker applications due to the large voltage spikes induced during the opening of the circuit breaker while it still conducts substantial load current. These voltage spikes can drive the JFET into the breakdown voltage regime and may result in device failure if the energy dissipation is above the tolerance limit. To determine the maximum avalanche energy of the device under repetitive pulsed conditions, a N-ON SiC JFET with a nominal rating of 1200 V/13 A was driven into punchthrough breakdown using an unclamped inductive switching (UIS) circuit. The testing comprised of 4000 repetitive pulses at 25°C case temperature at a fixed gate voltage of -20 V. The drain current was increased after every 1000 pulses to increase the energy dissipated. The JFET was able to withstand 1000 pulses at a maximum energy dissipation value of 1160 mJ before failure. The JFET triode breakdown characteristics were analyzed after every 1000 pulses. The peak UIS energy of 1160 mJ corresponded to an energy density of 16.6 J/cm 2 based on their active area.

550 $^{\circ}\hbox{C}$ Integrated Logic Circuits using 6H-SiC JFETs

This letter reports the design, fabrication, and electrical characteristics of inverter, NAND, and NOR logic circuits using 6H-silicon carbide (SiC) depletion-mode junction field-effect transistors. All circuits function with high performance at temperatures from 25 °C to 550 °C. The core inverter has an outstanding dc characteristic transfer function with a steep slope, including a gain of >; -20 up to 500 °C, and a logic threshold that is well centered in the logic swing. NOR and NAND gates were likewise tested in this temperature range, and dynamic characteristics are presented. This SiC technology provides a platform for applications demanding reliable digital circuits at temperatures higher than 300 °C, well beyond the capability of silicon technology.

SiC Solid-State Disconnect for High Power System Applications

This paper reports the design and experimental demonstration of a novel bi-directional solid-state disconnect (SSD) based on Silicon Carbide (SiC) depletion-mode junction field effect transistors (JFETs) for protecting critical sensitive components in high power systems. The SSD is able to provide a fast disconnect action upon receiving a preset trip current flowing through it and has a very low insertion loss, which makes it suitable for high power applications. For the application in 150kW six-phase power inverter systems, an insertion loss of less than 0.91% and a current fall time of less than 20μs for trip currents of about 800A have been demonstrated experimentally. To the best of our knowledge, there are no other solid-state disconnects available of comparable parameters.

A Comparison of 1200 V Normally-OFF & Normally-on Vertical Trench SiC Power JFET Devices

Equivalent sized (4.5 mm2 die area), 1200 V, 4H-SiC, vertical trench Junction Field Effect Transistors (JFETs) were characterized in terms of DC and switching performance. The 100 mΩ Enhancement-Mode (EM) JFET was found to have natural advantages in safe operation being normally-off, whereas the Depletion-Mode (DM) JFET was found to have advantages with ~ twice as high saturation current, less on-resistance (85 mΩ) and no gate current required in the on-state. The JFETs were found to both have radically less (five to ten times) switching energies than corresponding 1200 V Si transistors, with the DM JFET and EM JFET having EON and EOFF of only 115 µJ and 173 µJ, respectively when tested at half-rated voltage (600 V) and 12 A.

6H-SiC JFETs for 450 $^{\circ}\hbox{C}$ Differential Sensing Applications

N-channel 6H-SiC depletion-mode junction field-effect transistors (JFETs) have been fabricated, and characterized for use in high-temperature differential sensing. Electrical characteristics of the JFETs have been measured and are in good agreement with predictions of an abrupt-junction long-channel JFET model. The electrical characteristics were measured across a 2-in wafer for temperatures from 25degC to 450degC, and the extracted pinchoff voltage has a mean of 11.3 V and a standard deviation of about 1.0 V at room temperature, whereas pinchoff current has a mean of 0.41 mA with standard deviation of about 0.1 mA. The change in pinchoff voltage is minimal across the measured temperature range, whereas pinchoff current at 450degC is about half its value at room temperature, consistent with the expected change in the nmu <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> product. The characterization of differential pairs and hybrid amplifiers constructed using these differential pairs is also reported. A three-stage amplifier with passive loads has a differential voltage gain of 50 dB, and a unity-gain frequency of 200 kHz at 450degC, limited by test parasitics. A two-stage amplifier with active loads has reduced sensitivity to off-chip parasitics and exhibits a differential voltage gain of 69 dB with a unity-gain frequency of 1.3 MHz at 450degC.

Modeling the temperature response of 4H silicon carbide junction field-effect transistors

The electrical characteristics of 4H-SiC depletion-mode junction field-effect transistors (JFETs) have been measured over an extended temperature range from 218 to 673 K. A basic model has been applied to predict I–V characteristics for SiC JFETs over this extended temperature range using the standard abrupt-junction long-channel JFET equations. The model employs a two-level donor ionization structure using ionization energies of 0.050 and 0.080 eV and assumes a two-step inverse power law dependence of mobility on temperature based on recently published Hall measurement data. The modeled I–V characteristics are in good agreement with the experimental data over the temperature range from 273 to 673 K. The deviations between the experimental data and the response model at the temperature extremes are attributed to increased substrate resistivity at 218 K and increased device leakage currents at 673 K.

Silicon carbide FETs for high temperature nuclear environments

SiC transistors can operate at very high temperatures and survive very high radiation doses. These characteristics make SiC potentially the ideal technology for nuclear power applications. In this paper we report, for the first time, on the active in-core irradiation of 6H-SiC depletion-mode junction field-effect transistors (IFETs) at 25/spl deg/ and 300/spl deg/C in a nuclear reactor operated at 200 kW. No significant degradation in the device characteristics was observed until the total neutron fluence exceeded 10/sup 15/ n/cm/sup 2/ for irradiation at 25/spl deg/C, and no significant changes were observed even at 5/spl times/10/sup 15/ n/cm/sup 2/ at 300/spl deg/C. The results of this experiment may also indicate exciting evidence for the anneal of neutron displacement damage for devices irradiated at 300/spl deg/C.

A hybrid 6H-SiC temperature sensor operational from 25°C to 500°C

6H-SiC buried-gate n-channel depletion-mode junction field-effect transistors (JFETs) were characterized from 25/spl deg/C to 350/spl deg/C in terms of transconductance (g/sub m/), pinchoff voltage (V/sub P/), output resistance (r/sub o/), input resistance (R/sub in/), drain-to-source current at zero gate-to-source voltage (I/sub DSS/), gate-to-source reverse biased leakage current (I/sub GSS/), off-state drain-to-source current (I/sub DSS(off)/), and noise power spectral density (S/sub V/). The 6H-SiC JFET's were used in a hybrid temperature monitoring circuit (tested from -196/spl deg/C to 500/spl deg/C) fabricated at Auburn University for use in numerous industrial applications. Simulation program with integrated circuit emphasis (SPICE) simulations of the temperature monitoring circuit's output voltage corresponded well with measured data as a function of temperature. Linear regression (LR) analysis of measured data revealed a notably sensitive (/spl sim/2.3 mV//spl deg/), and an eminently linear (correlation coefficient =-0.0996...over 25/spl deg/C to 500/spl deg/C range) relationship between the measured output voltage and temperature. Below -50/spl deg/C, the output became nonlinear, presumably from carrier freeze-out effects. To the best of our knowledge, this represents the first successful implementation of SiC active devices into a temperature sensor which demonstrated stable operation up to 500/spl deg/C.

Self-aligned In0.53Ga0.47As/semi-insulating/n+InP junction field-effect transistors

Depletion-mode junction field-effect transistors (JFET's) with InGaAs p-n junctions grown on compensated Fe:InP or highly resistive In 0.52 Al 0.48 As isolation layers grown on n+-InP substrates have been fabricated using a combination of molecular-beam epitaxy and metalorganic chemical vapor deposition growth techniques. Using a self-aligned gate technology with a 1-µm gate length, devices with high transconductance (80 mS/mm), low leakage current (<100 nA), and a gate-to-source capacitance of 0.4 pF have been fabricated. This is apparently the first report where InP-based alloy FET's have been fabricated on an isolated n+-substrate. This structure has application to monolithically integrated photoreceivers.