Depletion Layer Capacitance Research Articles

Theoretical study of the depletion-layer capacitance in abrupt p–n semiconductor junctions

For evaluation of capacitance-voltage measurements on an abrupt pn semiconductor junction with reverse-biased depletion layer an approximation equation for the quantity Ue is presented, where Ue is the value at the intercept of the extrapolated plot C−2 to the applied voltage axis. The approximation formula is compared with an exact calculation. The maximum error in the approximate relationship for Ue is less than 3% in a wide range of impurity density and applied reverse voltage, therefore the discrepancy in the space-charge layer capacitance Cs is less than 1.5%. Cs is given by the relationship, which follows from Shockley's theory, if (U + UD) is replaced by (U + Ue).

Investigation of the influence of several diode parameters on the light-delay time in large-area SH-junction LED's

The influence of several diode parameters on the light-delay time of large-area Si/Zn doped GaAs-GaAlAs SH-junction LED's has been investigated experimentally. Beside the dominant influence of the depletion-layer capacitance, the extrapolated saturation current, the series resistance, and the non-linearity of the transfer function between diode current and light output have to be considered to explain the observed spread of delay times at low and medium pulse currents. An analytical expression for the delay time in terms of four or five diode parameters which are easily measurable at low frequencies is given. A satisfactory agreement between calculated and measured results for low and medium pulse currents is achieved only if the nonlinearity between light emission and current is included in the analysis. This effect has not been discussed in previous publications.

Excess capacitance in metal-GaAs contacts as an effect of nonlinear dielectric susceptibility

We have found experimentally, as other authors, that the capacitance of Schottky barriers on ionic semiconductors, such as GaAs and CdS, is composed of the normal depletion-layer capacitance and of an “excess capacitance” C 0 which is independent of the bias voltage. Moreover other experimenters have found that C 0 increases with the impurity concentration. We show here that such experimental results cannot be ascribed to the deep levels, but they may be explained by assuming, in solving Poisson's equation, dependence of the “effective” dielectric susceptibility on the electric field.

Determination of arbitrary doping profile in p–n junctions

Measurements of the depletion-layer capacitance as a function of both voltage and temperature enable the determination of an arbitrary profile for any ratio of Nd/Na. The proposed method is valuable for the determination of temperature dependences of relative permittivity and built-in voltage.

Enhanced capacitor for one-transistor memory cell

Ion implantation has been used to increase the depletion-layer capacitance beneath the inversion layer of an MOS capacitor in order to enhance the charge storage per unit area. Boron and arsenic implants were used to increase the depletion-layer capacitance, approximately halving the area required for a given charge storage.

Depletion-layer capacitance of any type of transition between two materials

A general expression for the depletion-layer capacitance which holds for any type of transition between any two materials is derived by solving, in a proper way, the Poisson equation in the case in which both electric permittivity and the total electric charge density are functions of the spatial co-ordinate. Such a unified expression, as an example, is applied to determine the depletion-layer capacitance of the metal-insulator-metal, metal-insulator-semiconductor, metal-semiconductor and semiconductor-semiconductor transitions.

Frequency Multiplication By A P-I-N Diode When Driven Into Avalanche Breakdown

An investigation of frequency multiplication using a step-recovery diode (SRD) driven into avalanche is presented. This mode of operation, which is called the breakdown mode, consists of a reverse-biased p-n junction, SRD, or IMPATT diode driven into reverse by an ac signal source. As the diode voltage passes from reverse bias to reverse and avalanche, the state of the diode switches quickfy from a depletion-layer capacitance to an avalanche inductance; hence the production of strong harmonics. A theoretical analysis and experimental investigation of a coaxial/waveguide 2-6-GHz frequency multiplier using HP5082-0320 step-recovery diodes, [R/sub s/ = 0.75 Omega, C/sub d/(-6/sub v/) = 1.0 pF] shows that the breakdown-mode frequency multiplier has a higher conversion efficiency than the conventional multipuer. A measured conversion efficiency of 73 percent was achieved while the same circuit configuration produced 52 percent for the same diode used as a charge-storage multiplier under optimum forward-drive and tuning conditions. Also the theory developed in this paper indicates a maximum possible conversion efficiency of 80 percent for the breakdown-mode multiplier, which corresponds closely with the measured results, and a maximum theoretical efficiency for a forward driven diode of 64 percent. The performance of an FM microwave system was monitored using the multiplier as a LO in which a baseband SNR of 59 dB was recorded.

Electrochemical capacitance characterization of n-type gallium arsenide

The depletion layer capacitance of n-type gallium arsenide was measured as a function of its anodic potential in an electrochemical cell. It was shown that these measurements can lead to accurate values of carrier concentration, and are compatible with stripping by electrochemical dissolution, provided that surface area is preserved. The experimental conditions required to maintain the electrolyte-semiconductor contact area constant, are described. Also, it is shown that excursions into regions outside those specified lead to significant enhancement of capacity (via real area increase). Under these conditions the carrier concentration can no longer be obtained but much can be learnt about the internal structure of the material.

Damage Effects in Silicon Surface Barrier Detectors with 0.5–2 MeV Protons

Silicon surface barrier detectors have been irradiated with 0.5–2 MeV protons to observe the radiation damage effects appearing in electrical properties. The depletion layer capacitance against bias voltage has shown a plateau which is dependent on proton fluence and energy. This behavior is consistently explained by the proposed model in which the induced defects act as acceptors and compensate donor ions in the proton range. The effective number of defects is estimated to be about 0.2 per 1 MeV proton.

Design considerations for resonant travelling wave IMPATT oscillators†

It is shown theoretically that distributed IMPATT structures can be used as resonant lengths of active transmission line if particular care is taken to choose the substrate thickness and resistivity correctly in order to minimize losses. In contrast to discrete IMPATT structures, a relatively high substrate resistivity is required for the travelling wave structures. Such self-resonant oscillating structures can have an input admittance of the same order as the total depletion layer negative conductance, since the shunting effect of the depletion layer capacitance has automatically been tuned out. Thus, for a given value of circuit impedance the distributed structure can be much larger in area, and output power than the corresponding discrete IMPATT. It is shown theoretically possible to produce a 450 W pulsed device with an input impedance of −1Ω, although a 100 W device with an input impedance of −4Ω might be a more practicable objective.

Transition-capacitance calculations for double-diffused p- n junctions

A study of the depletion-layer characteristics of double-diffused p- n junctions, formed by successive diffusion of opposite type impurities into a semiconductor, is presented. The general form of the impurity profile is taken to be N( r) = N S A e − ar( ar+2 k) where N S , A, a and k are constants and r is the distance. This general form reduces to Gaussian, erfc and two-step diffusion profiles as particular cases. Results are shown graphically for typical values of these constants. It is shown that the double-diffused junctions can be well approximated by equivalent double-exponential profiles in the impurity range of practical interest and C- V relations are obtained analytically. The results obtained are convenient for ready engineering calculations. The accuracy and the range of validity of the approximation are discussed. A simple and accurate analytical method is outlined for the calculation of reverse-biased sidewall capacitance of double-diffused structures, with special reference to the emitter junction of a planar transistor. It is shown that by approximating the impurity profiles by Gaussian distributions, the metallurgical junction formed is given by an ellipse and this leads to a simple evaluation of the sidewall capacitance. An expression obtained for the impurity gradient along the sidewall enables the computation of forward-biased depletion-layer capacitance when the mobile carriers in the depletion region are to be considered.

Response times of light-emitting diodes

Response times of light emission from a GaAs <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.6</inf> P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.4</inf> electroluminescent diode have been measured for stepwise applications of voltage. Turn-on times decrease either with an increase of the steady-state level of current or with superposition of a dc bias voltage. The main features of the experiment are in reasonable agreement with those of the calculated curves based on an equivalent circuit with a depletion-layer capacitance and a voltage-dependent diode conductance.

Mixing process at the emitter-base junction of a high-frequency transistor†

Frequency-conversion due to mixing notion at the emitter-base diode of a high-frequency micro-alloy diffused-base transistor is considered from theoretical and experimental standpoints A comparison is made of the relative contribution to the mixing process of the non-linear diffusion conductance and the non-linear depletion-layer capacitance. It is shown that the effect of parametric conversion resulting from pumping of the emitter capacitance is extremely inefficient and much below the observed values. Conversion gain due to the emitter conductance is dominant and is shown to be in reasonable agreement with the measured gain over a range of frequencies.

Design and performance of series-mode frequency multipliers using the step-recovery diode†

Abstract Computer aided analysis of series-mode frequency multipliers using the step-recovery diode, is developed to obtain the optimum performance (output power and efficiency) of these circuits. Design procedure for × 2, × 3 and × 5 multipliers is described for a required optimum efficiency operation and the corresponding circuit parameters are presented. The computer oriented investigation is expanded to examine the effects of including the depletion layer capacitance and the finite minority carrier lifetimo in the ideal nonlinear capacitance model of the diode. A comparison of this mode with shunt-mode operation is- given and the close agreement between different experimentally obtained results and the theoretical performance is shown.

Effect of depletion-layer capacitance on lifetime measurements of p+-n-n+ diodes

It is shown that the low-level minority-carrier lifetime in p+-n-n+ diodes obtained by measuring the stored charge can be in error owing to the charging of the depletion-layer capacitance. A simple method is described for eliminating the error due to this charge.

Note on the Discharge of Electrophotographic Material by Light

The discharge behavior of different electrophotographic materials was studied by measuring (dV/dt) − V curves. If it can be shown in a separate experiment that the discharge current is a primary saturated photocurrent (i.e., it is independent of surface potential at high potentials) a simple interpretation of these curves is possible in the saturation region. The shape of the curves is very sensitive to the details of the discharge process. It was shown that the shape of both the (dV/dt) − V and the V(t) curves can be strongly influenced by geometric effects (a change of depletion layer capacitance during discharge without trapping) or by trapping of charge carriers. From these considerations we can conclude that the interpretation of discharge curves V(t) or (dV/dt) (t) requires some care and is only meaningful if the type of discharge current and the voltage dependence of the capacitance are known.

Determination of Donor Gradients Within Surface Barriers Formed on Dense Cd‐Doped Barium Titanates

Surface barriers were formed on dense Gd‐doped barium titanates by a reduction‐reoxidation process. The distribution of donors within the partially reoxidized barriers was determined from capacitance measurements using blocking contacts and from resistance measurements using ohmic contacts. The incremental barrier capacitance behaved as a depletion‐layer capacitance when measured as a function of bias voltage. A donor gradient αc was determined from the capacitance‐voltage behavior of the depletion layers by using a linear‐graded model to describe the donor distribution through the depletion layers. A donor gradient ar was indirectly determined from resistance profiles of the surface barriers formed on the reduced titanates by a second reoxidation. The donor gradients ac and ar were in good agreement, with both gradients decreasing for the higher reoxidation temperatures and/or the longer times used in forming the barriers. This behavior is explained by assuming that the reoxidation process is diffusion‐controlled and by qualitatively relating the gradients to assumed oxygen profiles within the barriers.

Transfer functions of imaging mosaics utilizing the charge storage phenomena of transistor structures

Silicon phototransistors operating in the integration mode have been used in light detection and imaging systems. A solid-state imaging system employing a monolithic mosaic of 12 800 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n-p-n</tex> phototransistors has been developed. An analysis of the integration mode of operation of a silicon phototransistor is presented. The analysis employs a simplified equivalent circuit of a phototransistor. Three different cases are analyzed; each case differs in that the length of the readout cycle is changed. The solution to all three cases gives an output voltage directly proportional to the ratio of light plus leakage generated charge to the base-collector junction depletion layer capacitance. Analysis of phototransistor operation in a mosaic where interactions with the other phototransistors in the array are accounted for is presented. Discussion concerning the parasitic capacitances due to readout switches is given for the particular mosaic design employed.

Interpretation for homojunctions of the difference between the theoretical and the experimental built-in potential determined from capacitance measurements, using interface states

The built-in voltage of a junction can be calculated theoretically and determined experimentally from capacitance measurements. The difference that is always found between these two values cannot be completely interpreted by taking into account the contribution to the capacitance of the free carriers. The remaining difference can be explained by assuming the existence of interface states in the vicinity of the junction. Formulas for the depletion-layer capacitance of abrupt and linearly graded junctions with interface states are derived. Experimental data are interpreted in relation to this model.

Thin-film lateral bipolar transistor in silicon-on-sapphire structure

Heteroepitaxial films of silicon-on-sapphire were used to fabricate lateral bipolar n-p-n transistors. The devices have a common-base direct-current amplification factor of 0.9 and a maximum frequency of oscillation of 2.4 GHz. As a result of the vertical p-n-junction arrangement, small junction areas are possible, e.g. 1×10−6cm2, which yield depletion-layer capacitances of 0.02–0.05 pF.