GaAs monolithic IC design and fabrication techniques suitable for baseband pulse amplification have been developed. The developed GaAs monolithic amplifier has a two-stage construction using two source-grounded FET's. To reduce input VSWR without serious noise-figure degradation, an inter-gate-drain negative feedback circuit was adopted. An interstage circuit is a dc-coupled circuit consisting of an appropriate impedance transmission line. Gate voltage for the second-stage FET is self-biased. The amplifier has 13.5-dB gain over the 3-dB bandwidth from below 500 kHz to 2.8 GHz. Less than 6-dB (7-dB) noise figure was obtained from 700 MHz to 2.2 GHz (150 MHz to 3 GHz). Input VSWR is less than 1.5 (2.5) from 600 kHz to 1.1 GHz (500 kHz to 2.1 GHz). Output VSWR is less than 1.6 from 500 kHz to 4.5 GHz. By introducing a low-pass matching network, high-cutoff frequency for the amplifier could be extended to 4.7 GHz without degrading low-frequency characteristics.