Layout designs have a large number of design variables and various physical constraints. Conventional design exploration approaches are time-consuming and may require human intervention. A unique feature about physical layout designs is the availability of domain knowledge, which can be utilised to speed up the design process. In this paper, we propose a generative deep learning-based design space exploration (DSE) methodology that is capable of learning design constraints in the layout design without explicit supervision. Moreover, it can incorporate domain knowledge in the generated layouts, thereby speeding up the design process. This is realised by constructing a layout generation variational autoencoder (LGVAE) model, which uses a latent space as an interface to generate the layouts. By training the LGVAE model, significantly lower-dimensional representations can be learned compared to the original dimensionality of the design space. Therefore, the number of design variables is greatly reduced. We showcase the performance of the proposed DSE approach by solving the heat source layout design problem encountered in thermal management of chips. Experiments demonstrate that the LGVAE model is capable of generating compressed latent representations that capture the characteristics of the input samples, which makes the DSE cost-effective.