Decoding Of Codes Research Articles

High-Throughput Polar Code Decoders with Information Bottleneck Quantization.

In digital baseband processing, the forward error correction (FEC) unit belongs to the most demanding components in terms of computational complexity and power consumption. Hence, efficient implementation of FEC decoders is crucial for next-generation mobile broadband standards and an ongoing research topic. Quantization has a significant impact on the decoder area, power consumption and throughput. Thus, lower bit widths are preferred for efficient implementations but degrade the error correction capability. To address this issue, a non-uniform quantization based on the Information Bottleneck (IB) method is proposed that enables a low bit width while maintaining the essential information. Many investigations on the use of the IB method for Low-density parity-check code) LDPC decoders exist and have shown its advantages from an implementation perspective. However, for polar code decoder implementations, there exists only one publication that is not based on the state-of-the-art Fast Simplified Successive-Cancellation (Fast-SSC) decoding algorithm, and only synthesis implementation results without energy estimation are shown. In contrast, our paper presents several optimized Fast-SSC polar code decoder implementations using IB-based quantization with placement and routing results using advanced 12 nm FinFET technology. Gains of up to 16% in area and 13% in energy efficiency are achieved with IB-based quantization at a Frame Error Rate (FER) of 10-7 and a polar code of N=1024,R=0.5 compared to state-of-the-art decoders.

Hardware Efficient Integrated In-loop Filter for HEVC Encoder

The deblocking filter (DF) and the sample adaptive offset (SAO) filter, which aids in enhancing the subjective quality of the image, make up the in-loop filter of the high-efficiency video coding (HEVC) encoder and decoder. The in-loop filter significantly increases the computational load on the HEVC encoder. It is challenging to design an in-loop filter on hardware that can handle intensive computations while using the least amount of on-chip memory, taking external memory traffic and dependencies simultaneously delivering high throughput to support Ultra HD video applications. The proposed design employs the following strategies to address these issues. This work proposes an address generation technique for pipelined horizontal and vertical filtering in DF, that avoids a transpose buffer which otherwise is required. This enables easy pipelining and parallelization thus improving throughput while reducing the on-chip memory utilization. A simplified SAO filter with parallel-pipelined processing is included in the design. These features enable the design to support ultra-HD 7680 × 4320 @ 40 fps video applications. The proposed hardware architecture has a total gate count of 7.73 K LUTs and 2.8 K slice registers, and it is implemented on a 28 nm field programmable gate array (FPGA) platform.

Design and analysis of stochastic 5G new radio LDPC decoder using adaptive sparse quantization kernel least mean square algorithm for optical satellite communications

AbstractA Stochastic Low‐Density Parity‐Check (LDPC) decoder is a type of 5G New Radio standard LDPC decoder that uses stochastic techniques to perform decoding. Stochastic LDPC decoding with 5G NR standard typically uses an iterative process, where messages exchanged among variable nodes (VN), check nodes multiple times. Stochastic LDPC decoders are often used in scenarios where the received signal is subject to varying levels of noise. They will provide improved error correction performance compared to traditional LDPC decoders, especially when dealing with channels with varying signal‐to‐noise ratios in 5G networks. Using the adaptive sparse quantization kernel least mean square algorithm (SLDPC‐ASQ‐KLMSA), this paper proposes an area‐efficient architecture design for a stochastic LDPC decoder. The LDPC code (2048, 1723) is taken from the LOGBASE‐T standard and used in this study. We examine the ASQ‐KLMSA connection effects. Starting with the VN. It makes checking node functioning easier and reduces inter‐connect complexity by capping extrinsic message length at 2 bits. Because of the simplified check node operation in ASQ‐KLMSA, the decoder nodes must exchange messages with a greater degree of accuracy. The 3–3 input grouping sub‐node of the degree‐6 VN was changed with an adder‐based 5–1 input grouping sub‐node for the (2048, 1723) code in order to get more accurate results when the check‐to‐variable messages aren't strong enough. A suggested decoder architecture was determined using a stochastic LDPC decoder developed for TSMC 65 nm process (2048, 1723). Bite error rate, throughput, mean square error, latency, power, and area usage are some of the metrics used to evaluate the effectiveness of the SLDPC‐ASQ‐KLMSA algorithm that has been suggested and implemented in Python. Thus, the proposed approach has attained 34.44%, and 38.39% low mean square error while compared with the existing methods such as higher‐performance stochastic LDPC decoder architecture designed through correlation analysis (HP‐SLDPC‐CA), Higher Throughput and Hardware Efficient Hybrid LDPC Decoder Utilizing Bit‐Serial Stochastic Updating(HLDPC‐BSSU), Flexible FPGA‐Based Stochastic Decoder for 5G LDPC codes (FPGA‐SD‐5G‐LDPC), respectively.

Efficient decoding up to a constant fraction of the code length for asymptotically good quantum codes

We introduce and analyse an efficient decoder for quantum Tanner codes that can correct adversarial errors of linear weight. Previous decoders for quantum low-density parity-check codes could only handle adversarial errors of weight \(O(\sqrt{n\log n})\) . We also work on the link between quantum Tanner codes and the Lifted Product codes of Panteleev and Kalachev, and show that our decoder can be adapted to the latter. The decoding algorithm alternates between sequential and parallel procedures and converges in linear time.

Check-Agnosia based Post-Processor for Message-Passing Decoding of Quantum LDPC Codes

The inherent degeneracy of quantum low-density parity-check codes poses a challenge to their decoding, as it significantly degrades the error-correction performance of classical message-passing decoders. To improve their performance, a post-processing algorithm is usually employed. To narrow the gap between algorithmic solutions and hardware limitations, we introduce a new post-processing algorithm with a hardware-friendly orientation, providing error correction performance competitive to the state-of-the-art techniques. The proposed post-processing, referred to as check-agnosia, is inspired by stabilizer-inactivation, while considerably reducing the required hardware resources, and providing enough flexibility to allow different message-passing schedules and hardware architectures. We carry out a detailed analysis for a set of Pareto architectures with different tradeoffs between latency and power consumption, derived from the results of implemented designs on an FPGA board. We show that latency values close to one microsecond can be obtained on the FPGA board, and provide evidence that much lower latency values can be obtained for ASIC implementations. In the process, we also demonstrate the practical implications of the recently introduced t-covering layers and random-order layered scheduling.

A Deterministic Algorithm for Computing the Weight Distribution of Polar Code

In this work, we present a deterministic algorithm for computing the entire weight distribution of polar codes. As the first step, we derive an efficient recursive procedure to compute the weight distribution that arises in successive cancellation decoding of polar codes along any decoding path. This solves the open problem recently posed by Polyanskaya, Davletshin, and Polyanskii. Using this recursive procedure, at code length <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> , we can compute the weight distribution of any <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">polar cosets</i> in time <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">O</i> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). We show that any polar code can be represented as a disjoint union of such polar cosets; moreover, this representation extends to polar codes with dynamically frozen bits. However, the number of polar cosets in such representation scales exponentially with a parameter introduced herein, which we call the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mixing factor</i> . To upper bound the complexity of our algorithm for polar codes being decreasing monomial codes, we study the range of their mixing factors. We prove that among all decreasing monomial codes with rates at most 1/2, self-dual Reed-Muller codes have the largest mixing factors. To further reduce the complexity of our algorithm, we make use of the fact that, as decreasing monomial codes, polar codes have a large automorphism group. That automorphism group includes the block lower-triangular affine group (BLTA), which in turn contains the lower-triangular affine group (LTA). We prove that a subgroup of LTA acts transitively on certain subsets of decreasing monomial codes, thereby drastically reducing the number of polar cosets that we need to evaluate. This complexity reduction makes it possible to compute the weight distribution of polar codes at length <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> = 128.

TURBO CODE RE-ANALYSIS USING DIFFERENT ALGORITHMS

Turbo codes are a novel type of forward error correcting codes that have proved to give a perfor- mance close to the channel capacity as proposed by C. Shannon. The parallel concatenation of two identical recursive convolutional encoders that are spaced apart by an interleaver results in a turbo code encoder. The two cascaded decoding blocks used by the turbo code decoder pass along a priori knowledge generated by each block in turn. The decoding approach has the advantage of working iteratively, allowing for an increase in total performance. This study does a performance analysis of turbo codes. The performance study includes two decoding methods: the soft output Viterbi algo- rithm (SOVA), which uses the log-likelihood ratio to produce soft outputs, and the log maximum a posteriori probability (Log-MAP) algorithm. Both punctured and unpunctured codes are studied to determine the impact of utilizing various decoding algorithms. The performance of the two various decoding techniques is then contrasted in terms of bit error rate. MATLAB tools are utilized to per- form simulations.

Optimized wireless communication for 6G signal processing using memory‐augmented deep unfolding network

SummaryIn this manuscript, optimized wireless communication for 6G signals processing using memory‐augmented deep unfolding network (WC‐6G‐SP‐MADUN) is proposed. The aim of this work is to give a memory‐augmented deep unfolding network approach with a focus on belief propagation decoding of error correction codes and multiple‐input multiple‐output (MIMO) wireless systems. In contrast, compares and tabulates the performance of memory‐augmented deep unfolding methodologies with classic principled procedures, which could potentially enable 6G. Here, the wireless communication for 6G signal processing methods was used for a variety of receiver functions, including self‐interference cancelation, signal estimation and detection using memory‐augmented deep unfolding Network (MADUN), and advanced error correction by clouded leopard optimization algorithm (CLOA). Furthermore, outline the general framework of memory‐augmented deep unfolding method for any kind of signal processing application and talk about cutting edge research paths that will make it possible to build communication networks in the future. The proposed approach is implemented in MATLAB; the performance is analyzed with performance metrics such as reliability, complexity, SNR gain, convergence rate, hardware efficiency, and quantization bit width. The proposed approach attains higher SNR gain 17.96%, 24.75%, and 30.09%; lower complexity 17.92%, 23.41%, and 30.13%; and higher convergence 18.01%, 25.41%, and 31.39% when analyzed with existing techniques such as redefined wireless communication for 6G: signal processing meets deep learning and deep unfolding (RWC‐6G‐SP‐DU), lower complication deep unfolded neural network receiver for MIMO under probability data association detector (LC‐DUNN‐MIMO‐PDAD), and deep learning in physical layer communications: evolution with prospects on 5G and 6G networks (DL‐PLC‐6G), respectively.

Fast decoding of lifted interleaved linearized Reed–Solomon codes for multishot network coding

Martínez-Peñas and Kschischang (IEEE Trans. Inf. Theory 65(8):4785–4803, 2019) proposed lifted linearized Reed–Solomon codes as suitable codes for error control in multishot network coding. We show how to construct and decode lifted interleaved linearized Reed–Solomon (LILRS) codes. Compared to the construction by Martínez-Peñas–Kschischang, interleaving allows to increase the decoding region significantly and decreases the overhead due to the lifting (i.e., increases the code rate), at the cost of an increased packet size. We propose two decoding schemes for LILRS that are both capable of correcting insertions and deletions beyond half the minimum distance of the code by either allowing a list or a small decoding failure probability. We propose a probabilistic unique Loidreau–Overbeck-like decoder for LILRS codes and an efficient interpolation-based decoding scheme that can be either used as a list decoder (with exponential worst-case list size) or as a probabilistic unique decoder. We derive upper bounds on the decoding failure probability of the probabilistic-unique decoders which show that the decoding failure probability is very small for most channel realizations up to the maximal decoding radius. The tightness of the bounds is verified by Monte Carlo simulations.

Hybrid Multi Kernel Polar Code Construction and Optimized Decoding Algorithm for 5G Mobile Communications

5G mobile communications faces difficulty in channel coding to satisfy user requirements. This paper evaluates flexibility, reliability and complexity for different channel coding schemes(Turbo codes, Low Density Parity check codes, mother polar codes, Multi Kernel-polar codes) on regular channel AWGN with BPSK modulation of code rate R=1/2. The proposed hybrid Multi Kernel-polar codes will have greater flexibility and reliability for short and large code words. The optimized decoding of Multi Kernel polar codes reduces the number of computations by using repeated LLR’s of sub-kernel matrices.

Reducing Complexity of SC-Based Flip Decoding of Polar Codes by Early-Stopping

Reducing Complexity of SC-Based Flip Decoding of Polar Codes by Early-Stopping

Derivative Descendants of Cyclic Codes and Derivative Decoding

Derivative Descendants of Cyclic Codes and Derivative Decoding

An inspired chaos-based estimation-theory optimization for low-density parity-check (LDPC) code decoding

Optimization techniques have emerged as powerful tools for solving complex engineering problems in real-time applications, surpassing traditional heuristic methods. This paper introduces a novel chaos optimization algorithm that integrates the bisection search method to enhance the convergence ability, solution accuracy, and search speed of conventional optimization problems. The proposed algorithm is applied to the design and analysis of a reduced complexity decoding scheme using Low-Density Parity-Check (LDPC) codes. By leveraging the Linear Minimum Mean Square Error (LMMSE) estimation criterion, the proposed method approximates the estimated parameters acquired during the message computation process. This combined approach effectively mitigates error propagation and premature convergence issues. The presented research offers a low-complexity decoding algorithm for LDPC codes, leveraging an optimized chaos bisection search method. The adoption of the LMMSE criterion overcomes data dependency and error propagation concerns during the estimation process. The modified chaos optimization technique, integrated with the bisection search, efficiently determines optimal values from perturbed observations, leading to improved convergence rates and data processing precision by reducing the observation dimension (search space). Simulation results validate the proposed approach, showcasing its ability to mitigate error propagation and premature convergence while maintaining coding gain accuracy. Experimental validation on an FPGA RF-SoC device (model XCZU27DR) demonstrates that the proposed method achieves a maximum throughput of 8.7 Gbps at a clock frequency of 386.72 MHz, with reduced hardware complexity. The experimental verification on an FPGA RF-SoC device highlights the algorithm's minimal hardware complexity, superior decoding throughput, and Bit Error Rate (BER) performance.

Iraqi EFL university students' word recognition strategies and vocabulary proficiency: A correlational study

Word recognition is a cognitive activity widely acknowledged as a hallmark of fluent L2 readers. Understanding a text can only be accomplished with the ability to decode printed words efficiently. Another factor affecting students' comprehension is vocabulary. Therefore, this research aims to investigate whether there is any significant relationship between word recognition strategies and vocabulary knowledge among Iraqi university students. This study made use of four instruments to collect the data. A comprehensive framework for evaluating students' vocabulary proficiency consists of two tests: one measures the reception and production of vocabulary information and the other assesses orthographic coding and phonological decoding procedures. The results show that the respondents use both strategies to an average degree with over-reliance on the orthographic one in recognizing English words by employing a descriptive correlational research design with 400 respondents. Furthermore, a positive relationship was observed between word recognition strategies and vocabulary proficiency.

Fast Successive-Cancellation Decoding of Polar Codes With Sequence Nodes

Fast Successive-Cancellation Decoding of Polar Codes With Sequence Nodes

Fast List Decoding of PAC Codes With New Nodes

Fast List Decoding of PAC Codes With New Nodes

Improved segmented belief propagation list decoding for polar codes with bit-flipping

Improved segmented belief propagation list decoding for polar codes with bit-flipping

Decoding of cyclic codes over quaternion integers by modified Berlekamp–Massey algorithm

Decoding of cyclic codes over quaternion integers by modified Berlekamp–Massey algorithm

Ecurrent neural network decoding of rotated surface codes based on distributed strategy

Abstract Quantum error correction is a crucial technology for realizing quantum computers. These computers achieve fault-tolerant quantum computing by detecting and correcting errors using decoding algorithms. Quantum error correction using neural network-based machine learning methods is a promising approach that is adapted to physical systems without the need to build noise models. In this paper, we use a distributed decoding strategy, which effectively alleviates the problem of exponential growth of the training set required for neural networks as the code distance of quantum error-correcting codes increases. Our decoding algorithm is based on renormalization group decoding and recurrent neural network decoder. The recurrent neural network is trained through the Resnet architecture to improve its decoding accuracy. Then we tested the decoding performance of our distributed strategy decoder, recurrent neural network decoder and the classic minimum weight perfect matching(MWPM) decoder for rotated surface codes with different code distances under the circuit noise model, the thresholds of this three decoders are about 0.0052, 0.0051, and 0.0049 respectively. Our results demonstrate that the distributed strategy decoder outperforms the other two decoders, achieving approximately a 5% improvement in decoding efficiency compared to the MWPM decoder and approximately a 2% improvement compared to the recurrent neural network decoder.

New Golay decoding method using auto-encoder and OSD

In this study, we explore the potential of leveraging machine learning techniques, specifically auto-encoders (AE), for the decoding of linear block codes. Our findings suggest that this approach can outperform the conventional ordered statistics decoding (OSD) method, especially in a Rayleigh fading channel environment. We have rigorously trained the AE under both additive white Gaussian noise and Rayleigh fading channel conditions to ensure robustness in its performance. The output of the AE is combined with the received vector in a suitable manner to perform OSD. Through our experiments, we demonstrate that this proposed decoding approach yields better results than the conventional OSD method in Rayleigh fading channel when we used (23,12) Golay code.