Decision Feedback Equalizer Coefficients Research Articles

A Family of MMSE-Based Decision Feedback Equalizers and Their Properties for FBMC/OQAM Systems

Filter bank multi-carrier based on offset quadrature amplitude modulation (FBMC/OQAM) suffers from inter-symbol interference and inter-subchannel interference in multi-path fading channels. By exploiting the special structures of the FBMC/OQAM signal and the resulting correlation matrix and assuming perfect estimation of channel and noise power, we study the properties of the decision feedback equalizer (DFE) designed by the minimum mean square error criterion. The study leads to efficient and mathematically equivalent computation of DFE coefficients. Consequently, the DFE requires a smaller complexity in computing the equalizer coefficients than the linear equalizer, while achieving a significant performance gain in highly frequency-selective channels. Building upon the proposed efficient computation of DFE, we develop DFE-based detectors—namely, two-stage DFE and multi-band DFE—so that a better detection performance can be obtained more efficiently. Complexity analysis and simulation results demonstrate the efficacy of the proposed computation method and the DFE-based detectors.

A 6‐Gbps/lane receiver for a clock‐forwarded link in 65‐nm CMOS process

SummaryFor a 6‐Gbps/lane clock‐forwarded link, a wireline receiver has been developed. The phases of the sampling clocks are aligned to the center of the input data eye by a clock and data recovery (CDR) circuit. In the CDR circuit, the sampling clock phases are rotated by a phase rotating phase locked loop (PLL). A three‐tap decision feedback equalizer (DFE) compensates for the loss of cable together with a continuous‐time linear equalizer (CTLE) to ensure sufficient eye opening for the CDR circuit to find the optimum sampling phase. The DFE coefficients are adaptively calculated based on the data and edge samples. Implemented in a 65‐nm CMOS process, the three‐lane 6‐Gbps/lane receiver for a clock‐forwarded link occupies 0.63 mm2 including pads and consumes 288 mA from a 1.2‐V supply. Copyright © 2015 John Wiley & Sons, Ltd.

A 10-Gb/s Adaptive Parallel Receiver With Joint XTC and DFE Using Power Detection

A 10-Gb/s adaptive parallel receiver with joint crosstalk canceller (XTC) and decision-feedback equalizer (DFE) is presented. A differentiator-based XTC and a one-tap DFE are adapted to cancel far-end crosstalk (FEXT) and inter-symbol interference (ISI), respectively. When the lengths of the coupled microstrip lines change, an FEXT detector measures and compares the powers of FEXT and XTC to digitally update the XTC coefficient. Then, an ISI detector measures and compares the powers of the received data and recovered data to digitally update the DFE coefficient. This adaptive parallel receiver was fabricated in a 40-nm CMOS technology. The maximum power consumption is 17.55 mW from a 1.3-V supply, and the core area occupies 0.0352 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . For a 10-Gb/s PRBS of 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> -1 passing through 15-in FR4 printed-circuit-board traces with 8-mil spacing, the measured rms and peak-to-peak jitter of recovered data are 5.56 and 30.2 ps, respectively. The measured bit error rate is less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> . The measured total calibration time is 2.424 μs.

Decision Feedback Equalizer Architectures With Multiple Continuous-Time Infinite Impulse Response Filters

Decision feedback equalizer (DFE) architectures with varying numbers of discrete-time taps and continuous-time infinite impulse response (IIR) filters are compared for use in typical wireline channels. In each case, the DFE coefficients are optimized to minimize a cost function that equally weights both jitter and vertical eye opening. Even when some reflections are present (e.g., backplane channels) continuous-time IIR taps can be effective if their filter coefficients are properly optimized. Using a DFE architecture with only two IIR filters provides adequate results for both a 26-dB loss coax cable and a 16 FR-4 backplane channel at 10 Gb/s while keeping the DFE complexity low. Furthermore, the implementation and experimental results of a DFE with multiple (three) IIR filters is reported. Fabricated in a 0.13 μm CMOS process, the DFE consumes 17.3 mW from a 1.2 V supply. A bit error rate (BER) of 10-12 was achieved at a data rate of 3.7 Gb/s.

Fast Computation of Constrained Decision Feedback Equalizers

Constrained formulations of decision feedback equalizer (DFE) schemes arise whenever its intrinsic error propagation phenomenon must be reduced. This is the case when linear or a quadratic norm limits are enforced in the formulation of the usual minimum mean-square-error (mmse) DFE problem, so that superior performance can be achieved when compared to its unconstrained version. This paper solves the problem of designing fast algorithms for computing the DFE filters under the so-called magnitude and energy limiting norm criteria. The former is obtained by developing new updates in addition to the ones efficiently computed via a fast Kalman based method recently introduced. In a constrained energy formulation, however, it turns out that the desired shift structure of the channel convolution matrix that allows for a fast Kalman algorithm no longer exists. Still, we shall show how to properly correct for this discrepancy in structure in order to provide a fast recursion for computing the DFE coefficients in the constrained energy scenario. We verify the accuracy of the new algorithms under finite precision via computer simulations

Turbo DFE algorithm with imperfect decision feedback

In this letter, we propose a new turbo decision feedback equalizer (DFE) algorithm that takes into account decision feedback error propagation. We derive the exact mathematical expression for the probability density function (pdf) of soft decision feedback symbols, assuming that soft outputs from channel decoder are independent identically distributed Gaussian random variables with known mean and variance. We find a new set of "imperfect" turbo minimum mean-square error DFE coefficients based on the derived pdf. The proposed turbo detector outperforms other turbo equalization algorithms of similar computational complexity in terms of bit-error rate. The achieved improvement is up to 3.8 dB for severe frequency-selective channels.

An Efficient VLSI Architecture for Computing Decision Feedback Equalizer Coefficients from the Channel State Information

A novel algorithm and architecture for computing the optimal decision feedback equalizer (DFE) coefficients from a channel state information (CSI) estimate is present. The proposed algorithm maps well onto a linear chain of n highly pipelineable CORDIC based processing elements. It is thus well suited for VLSI implementation. Due to the very regular data flow, the number of processing elements may be reduced without sacrificing computational latency by recycling the data through a chain of less than n processing elements. The proposed architecture computes the optimal DFE coefficients of a twelve tap symbol spaced DFE suitable for HIPERLAN I in 2.7 μs and requires only 0.7 mm2 area on a 0.35 μm CMOS process, assuming a clock frequency of 100 MHz.

Fast adaptive equalization/diversity combining for time-varying dispersive channels

We examine adaptive equalization and diversity combining methods for fast Rayleigh-fading frequency selective channels. We assume a block adaptive receiver in which the receiver coefficients are obtained from feedforward channel estimation. For the feedforward channel estimation, we propose a novel reduced dimension channel estimation procedure, where the number of unknown parameters are reduced using a priori information of the transmit shaping filter's impulse response. Fewer unknown parameters require a shorter training sequence. We obtain least-squares, maximum-likelihood, and maximum a posteriori (MAP) estimators for the reduced dimension channel estimation problem. For symbol detection, we propose the use of a matched filtered diversity combining decision feedback equalizer (DFE) instead of a straightforward diversity combining DFE. The matched filter form has lower computational complexity and provides a well-conditioned matrix inversion. To cope with fast time-varying channels, we introduce a new DFE coefficient computation algorithm which is obtained by incorporating the channel variation during the decision delay into the minimum mean square error (MMSE) criterion. We refer to this as the non-Toeplitz DFE (NT-DFE). We also show the feasibility of a suboptimal receiver which has a lower complexity than a recursive least squares adaptation, with performance close to the optimal NT-DFE.

Performance of digital DECT radio links based on semianalytical methods

We report a very efficient semianalytical approach for the performance evaluation of differential detection schemes for GMSK signals of the DECT standard. Precisely, for a given channel, the performance is determined by means of an analytical procedure which includes the saddlepoint approximation. We consider both static channels (with impulse response generated by the simulation program SIRCIM) and two-ray Rayleigh and log-normal fading channels. As a departure from previous works, our receiver includes an all-digital part after the analog differential detection scheme. The digital part includes: (1) a block for the estimation of both the optimum sampling phase and the nonlinear channel coefficients (by making use of the DECT training sequence), (2) a one-tap decision feedback (DF) equalizer, and (3) a block for the evaluation of the approximate optimum bias level (/spl gamma//sub e/) in the threshold detector. Both the DF equalizer coefficient and /spl gamma//sub e/ are based on the nonlinear channel coefficients estimate. For channels with a normalized delay spread up to 0.2, the use of the optimum threshold together with the DF equalizer permits a gain of about 2 dB at BER=10/sup -6/ with respect to a receiver without equalization and a zero-level decision threshold. In addition, we discover that, in indoor environments, the 2-bit GMSK detector performs roughly the same as the 1-bit detector. The threshold optimization is also effective in the presence of channels affected by fading. To support this statement, we report the performance of the 1-bit differential detection scheme combined with antenna selection diversity in the presence of a two-ray log-normal and Rayleigh fading channel.