Debugging Techniques Research Articles

Enhanced Debugging with Traces

Creating an emulator to run old programs is a difficult task. You need a thorough understanding of the target hardware and the correct functioning of the original programs that the emulator is to execute. In addition to being functionally correct, the emulator must hit a performance target of running the programs at their original realtime speed. Reaching these goals inevitably requires a considerable amount of debugging. The bugs are often subtle errors in the emulator itself but could also be a misunderstanding of the target hardware or an actual known bug in the original program. (It is also possible the binary data for the original program has become subtly corrupted or is not the version expected.) Solving these problems requires some unusual debugging techniques.

Space-Based FPGA Radio Receiver Design, Debug, and Development of a Radiation-Tolerant Computing System

Los Alamos has recently completed the latest in a series of Reconfigurable Software Radios, which incorporates several key innovations in both hardware design and algorithms. Due to our focus on satellite applications, each design must extract the best size, weight, and power performance possible from the ensemble of Commodity Off-the-Shelf (COTS) parts available at the time of design. A large component of our work lies in determining if a given part will survive in space and how it will fail under various space radiation conditions. Using two Xilinx Virtex 4 FPGAs, we have achieved 1 TeraOps/second signal processing on a 1920 Megabit/second datastream. This processing capability enables very advanced algorithms such as our wideband RF compression scheme to operate at the source, allowing bandwidth-constrained applications to deliver previously unattainable performance. This paper will discuss the design of the payload, making electronics survivable in the radiation of space, and techniques for debug.

State of the Practice in Algorithmic Debugging

Algorithmic debugging is a semi-automatic debugging technique which is based on the answers of an oracle (usually the programmer) to a series of questions generated automatically by the algorithmic debugger. The technique typically traverses a record of the execution—the so-called execution tree—which only captures the declarative aspects of the execution and hides operational details. In this work we review and compare the most important algorithmic debuggers of different programming paradigms. In the study we analyze the features incorporated by current algorithmic debuggers, and we identify some features not supported yet by any debugger. We then compare all the debuggers giving rise to a map of the state of the practice in algorithmic debugging.

Anomaly-based bug prediction, isolation, and validation

Software defects, commonly known as bugs, present a serious challenge for system reliability and dependability. Once a program failure is observed, the debugging activities to locate the defects are typically nontrivial and time consuming. In this paper, we propose a novel automated approach to pin-point the root-causes of software failures. Our proposed approach consists of three steps. The first step is bug prediction, which leverages the existing work on anomaly-based bug detection as exceptional behavior during program execution has been shown to frequently point to the root cause of a software failure. The second step is bug isolation, which eliminates false-positive bug predictions by checking whether the dynamic forward slices of bug predictions lead to the observed program failure. The last step is bug validation, in which the isolated anomalies are validated by dynamically nullifying their effects and observing if the program still fails. The whole bug prediction, isolation and validation process is fully automated and can be implemented with efficient architectural support. Our experiments with 6 programs and 7 bugs, including a real bug in the gcc 2.95.2 compiler, show that our approach is highly effective at isolating only the relevant anomalies. Compared to state-of-art debugging techniques, our proposed approach pinpoints the defect locations more accurately and presents the user with a much smaller code set to analyze.

Anomaly-based bug prediction, isolation, and validation

Software defects, commonly known as bugs, present a serious challenge for system reliability and dependability. Once a program failure is observed, the debugging activities to locate the defects are typically nontrivial and time consuming. In this paper, we propose a novel automated approach to pin-point the root-causes of software failures. Our proposed approach consists of three steps. The first step is bug prediction, which leverages the existing work on anomaly-based bug detection as exceptional behavior during program execution has been shown to frequently point to the root cause of a software failure. The second step is bug isolation, which eliminates false-positive bug predictions by checking whether the dynamic forward slices of bug predictions lead to the observed program failure. The last step is bug validation, in which the isolated anomalies are validated by dynamically nullifying their effects and observing if the program still fails. The whole bug prediction, isolation and validation process is fully automated and can be implemented with efficient architectural support. Our experiments with 6 programs and 7 bugs, including a real bug in the gcc 2.95.2 compiler, show that our approach is highly effective at isolating only the relevant anomalies. Compared to state-of-art debugging techniques, our proposed approach pinpoints the defect locations more accurately and presents the user with a much smaller code set to analyze.

Failure analyses for debug and ramp-up of modern IC’s

Quick and successful failure analysis is a key component for in-time realization and ramp-up of new products. The structure of analysis flow from verification of failure to fault identification and corrective actions is presented with the focus on modem techniques in fault localization. For the area of design debug techniques for internal probing and circuit modification by mask less redesign are described, yield learning is demonstrated on the example of SRAM fails and scan shift loss. Finally an assessment of the future of failure analysis in this field is given.

Transparent debugging of dynamically instrumented programs

Dynamic instrumentation systems, used for program analysis, bug isolation, software security and simulations, are becoming increasingly popular. There exists a need to debug dynamically instrumented programs while keeping the presence of dynamic instrumentation system hidden from debug users. Existing debuggers use debug information in program binaries that have been generated by a compiler at static compile time, to provide their debug support. Since dynamic instrumentation systems generate program code at run-time, existing debuggers are not able to provide the same kind of debug support. The most comprehensive existing debug techniques that satisfy this need, used by Tdb, require modification of existing debuggers. This paper provides an OS level approach that silently intercepts the communication between a debugger and the OS and uses a set of debug specifications to provide Tdb's transparent debugging. As a result, any existing debugger can be used to debug dynamically instrumented programs. The proposed techniques have been implemented on x86/Linux platform for the dynamic instrumentation system Pin.

Relational queries over program traces

Instrumenting programs with code to monitor runtime behavior is a common technique for profiling and debugging. In practice, instrumentation is either inserted manually by programmers, or automatically by specialized tools that monitor particular properties. We propose Program Trace Query Language (PTQL), a language based on relational queries over program traces, in which programmers can write expressive, declarative queries about program behavior. We also describe our compiler, Partiqle . Given a PTQL query and a Java program, Partiqle instruments the program to execute the query on-line. We apply several PTQL queries to a set of benchmark programs, including the Apache Tomcat Web server. Our queries reveal significant performance bugs in the jack SpecJVM98 benchmark, in Tomcat, and in the IBM Java class library, as well as some correct though uncomfortably subtle code in the Xerces XML parser. We present performance measurements demonstrating that our prototype system has usable performance.

Chianti

This paper reports on the design and implementation of Chianti, a change impact analysis tool for Java that is implemented in the context of the Eclipse environment. Chianti analyzes two versions of an application and decomposes their difference into a set of atomic changes. Change impact is then reported in terms of affected (regression or unit) tests whose execution behavior may have been modified by the applied changes. For each affected test, Chianti also determines a set of affecting changes that were responsible for the test's modified behavior. This latter step of isolating the changes that induce the failure of one specific test from those changes that only affect other tests can be used as a debugging technique in situations where a test fails unexpectedly after a long editing session. We evaluated Chianti on a year (2002) of CVS data from M. Ernst's Daikon system, and found that, on average, 52% of Daikon's unit tests are affected. Furthermore, each affected unit test, on average, is affected by only 3.95% of the atomic changes. These findings suggest that our change impact analysis is a promising technique for assisting developers with program understanding and debugging.

자바 언어를 위한 알고리즈믹 디버깅 기술의 설계

본 논문은 자바 프로그램에서 논리적인 오류를 발견하기 위해 알고리즈믹 디버깅 기술의 이용을 제안한다. 알고리즈믹 디버깅 기술은 원시프로그램으로부터 실행 트리를 생성하고, 실행 트리로부터 프로그램 내에 포함된 논리적인 오류를 하향식 방법으로 발견하는 반자동화 디버깅기술이다. 따라서 알고리즈믹 디버깅 기술은 다양한 프로그래밍 언어에 알맞은 실행 트리를 생성하는 것이 중요하다. 주 논문에서는 자바 프로그램으로부터 실행 트리를 생성하는 방법을 제안하고 예제론 통해서 자바 프로그램을 위한 알고리즈믹 디버깅 기술을 확인한다. 이 접근은 전통적인 순차적 디버깅 기술보다 사용자와 디버깅 시스템 사이에서 상호작용의 수를 줄일 수 있다. This paper proposes to use an algorithmic debugging technique for locating logical errors in Java programs. The algorithmic debugging is a semi-automated debugging technique that builds an execution tree from a source program and locates logical errors, if any, included in the program from the execution tree with top-down method. So, it is very important to build a suitable execution tree from the various programming languages. In this paper we propose the method for building an execution tree iron Java programs and walk through an example. This approach could reduce the number of interactions between a user and a debugging system than the traditional step-wise debugging technique.

Debugging shared memory parallel programs using record/replay

This paper presents a debugging aid for parallel program developers. The tool presented enables programmers to use cyclic debugging techniques for debugging non-deterministic parallel programs running on multiprocessor systems with shared memory. The solution proposed consists of a combination of record/replay with automatic on-the-fly data race detection. This combination enables us to limit the record phase to the more efficient recording of the synchronization operations, and checking for data races (using intrusive methods) during a replayed execution. As the record phase is highly efficient, there is no need to switch it off, hereby eliminating the possibility of Heisenbugs because tracing can be left on all the time.

Emerging on-ship debugging techniques for real-time embedded systems

The increased clock frequencies and higher integration levels of today's high-performance embedded microcontrollers have led to the widespread incorporation of on-chip debugging logic into new microcontroller chip designs. The newly defined standard for embedded system debugging, the IEEE-ISTO Nexus 5001 Forum Standard for a Global Embedded Debug Interface, is introduced and is related to the test and debugging requirements of development engineers.

Novel optical probing and micromachining techniques for silicon debug of flip chip packaged microprocessors

Methods and techniques for micromachining and probing C4 packaged microprocessors from the silicon backside are described. The micromachining technique is based on using a combination of Laser Chemical Etching and Focused Ion Beam milling to open precision probe holes and perform circuit editing from the backside. A method to optically probe flip chip packaged CMOS microprocessors is also described. The optical probing technique utilizes an infrared laser to probe diffusions directly through the silicon backside without the need to mill probe holes.

The Evaluation Dependence Tree as a Basis for Lazy FunctionalDebugging

Lazy functional languages are declarative and allow the programmer to write programs where operational issues such as the evaluation order are left implicit. This should be reflected in the design of debuggers for such languages to avoid burdening the programmer with operational details, e.g. concerning the actual evaluation order. Conventional debugging techniques tend to focus too much on operational aspects to be suitable in this context. A record of the execution that only captures the declarative aspects of the execution, leaving out operational details, would be a viable basis for debugging lazy functional programs. Various declarative debugging tools could then be developed on top of such records. In this paper we propose a structure which we call the Evaluation Dependence Tree (EDT) for this purpose, and we describe two different construction methods. Performance problems are discussed along with possible solutions.

Applying a dynamic testability technique to debugging certain classes of software faults

Testability, the tendency for software to reveal its faults during testing, is an important issue for verification and quality assurance. But testability can also be used to good advantage as a debugging technique. Although this concept is more general, we will illustrate it with a specific example: propagation analysis.

An approach to the dynamic verification of knowledge-based systems

This paper describes a method of formal dynamic verification of knowledge-based systems. Almost all verification methods that have been proposed can validate the structural and logical integrity of knowledge-based systems, but they are not semantic. In other words, they are all static and syntactic. In addition, this paper adopts a dynamic approach in which verification is carried out in the reasoning process. This methid enables the detection of incorrect rules in the knowledge base using a simple debugging technique, which traces the execution of inference. Following the debugging algorithm, the user is asked several questions. To reduce the number of questions, knowledge is added to the system. In this way, some of the checks for correctness can be done by the system. Specifications are the judgement criteria of correctness, which are made up of some constraints. Application of the method to a power system operation is given. Benefits of this approach include: the ability to evaluate system's conclusions in situations where the experts may judge reasoning process, and the ability to predict the performance of the knowledge-based system in untested cases or to identify other cases that should be tested.

The design of DARTS: a dynamic debugger for multiprocessor real-time applications

The authors propose a dynamic debugging technique, which presents the possibility of trapping errors specific to real-time applications. The DARTS (Debug Add on for Real-Time System) monitors, which use the dynamic assertion method, can be used as activity monitors. In that case the DARTS gives the user crucial information on the temporal logic of the system (direct control flow). DARTS monitors can also perform watch functions on variables and control the invariant relations which may exist between application and system level objects (indirect data flow). >

Slice, chunk and dataflow anomaly as DATALOG rules

A chunk intuitively corresponds to the range of impact of a program change, and is defined as the union of those program slices impacted by the change. Given a chunk with respect to a program change, a maintenance programmer can consider the impact of the change without examining the entire program. Our definition of a chunk, along with the related debugging techniques slicing and detection of dataflow anomaly, is formulated as rules in DATALOG, a function-free logic-based data base query language. This formulation facilitates integration of these debugging aids into a uniform maintenance environment based on a knowledge-base system, and the concise and exact datalog rules also provide clear semantics to these debugging techniques.

Two-dimensional pinpointing: debugging with formal specifications

Debugging techniques and tools that draw on both the high-level concepts (defined as functions) used in formal specifications and the abstraction and information-hiding constructs used in modern languages are described. The technique is based on two components. One is a novel specification language with support tools. Ada programs are specified with a language that the authors created called Anna. Their tool set is used to check the Ada program's runtime behavior for consistency with the Anna specifications. The other technique uses the tool set to find missing specifications by comparing the specification with program prototypes and to test and debug Ada programs after an accepted specification has been developed. The approach, called two-dimensional pinpointing, locates inconsistencies in software that is structured in levels.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

On the use of diagnostic dependence-analysis tools in parallel programming: Experiences using PTOOL

Although considerable technology has been developed for debugging and developing sequential programs, producing verifiably correct parallel code is a much harder task. In view of the large number of possible scheduling sequences, exhaustive testing is not a feasible method for determining whether a given parallel program is correct; nor have there been sufficient theoretical developments to allow the automatic verification of parallel programs. PTOOL, a tool being developed at Rice University in collaboration with users at Los Alamos National Laboratory, provides an alternative mechanism for producing correct parallel code. PTOOL is a semi-automatic tool for detecting implicit parallelism in sequential Fortran code. It uses vectorizing compiler techniques to identify dependences preventing the parallelization of sequential regions. According to the model supported by PTOOL, a programmer should first implement and test his program using traditional sequential debugging techniques. Then, using PTOOL, he can select loop bodies that can be safely executed in parallel. At Los Alamos, we have been interested in examining the role of dependence-analysis tools in the parallel programming process. Therefore, we have used PTOOL as a static debugging tool to analyze parallel Fortran programs. Our experiences using PTOOL lead us to conclude that dependence-analysis tools are useful to today's parallel programmers. Dependence-analysis is particularly useful in the development of asynchronous parallel code. With a tool like PTOOL, a programmer can guarantee that processor scheduling cannot affect the results of his parallel program. If a programmer wishes to implement a partially parallelized region through the use of synchronization primitives, however, he will find that dependence analysis is less useful. While a dependence-analysis tool can greatly simplify the task of writing synchronization code, the ultimate responsibility of correctness is left to the programmer.