DCT Algorithm Research Articles

Embedding and Extracting Digital Watermark Based on DCT Algorithm

The principle of digital watermark is the method of adding digital watermark in the frequency domain. The digital watermark hides the watermark in digital media, such as image, voice, video, etc., so as to realize the functions of copyright protection, and identity recognition. DCT for Discrete Cosine Transform is used to transform the image pixel value and the frequency domain coefficient matrix to realize the embedding and extracting of the blind watermark in the paper. After success, the image is attacked by white noise and Gaussian low-pass filtering. The result shows that the watermark signal embedded based on the DCT algorithm is relatively robust, and can effectively resist some attack methods that use signal distortion to destroy the watermark, and has good robustness and imperceptibility.

Data Compression and Vectorization of Matrix Multiplication on HXDSP

In order to solve the problem of low efficiency of hardware resources and low data processing ability of vector processors, this paper uses data compression and vectorization method to realize matrix multiplication based on the HXDSP platform with the DCT algorithm in HEVC. It can make full use of the hardware resources of DSP to achieve the optimal optimization. The experimental results show that this method can achieve 32GMACS which is the peak-point multiply-accumulate capability of HXDSP. It can achieve to 2Gpixel/s for the data processing capability, which meets the performance requirements of HEVC coding standard and provides a reference for hardware implementation of HEVC.

OpenMP-Based Approach for High Level C Loops Synthesis

The complexity of embedded systems design is continuously augmented, due to the increasing quantity of components and distinct functionalities incorporated into a single system. To deal with this situation, abstraction level of projects is incessantly raised. In addition, techniques to accelerate the code production process have appeared. In this context, the automatic code generation is an interesting technique for the embedded systems project. This work presents an automatic VHDL code generation method based on the OpenMP parallel programming specification. In order to synthesize C code for loops into hardware, the authors applied the directives of OpenMP, which specifies portable implementations of shared memory parallel programs. A case study focused on the use of embedded systems for the DCT algorithm is presented in this paper to demonstrate the feasibility of the proposed approach.

Lossy Compression of Biometric Images Implemented Using Floating Point DSP Processor

In this paper, several numbers of biometric images are compressed in order to reduce the number of bits needed in representing an image with conservation of image quality. Biometric images compression is important to solve the problem of efficiently transmitting data and storing large number of biometric images in low capacity of memory device. Biometric images are compressed using two techniques which are DCT and Quantization. The compression algorithm is implemented on general purpose computer and DSP processor in order to compare between both of them in terms processing time and evaluate the performance of this technique by measuring the difference between the original image and reconstructed image using PSNR, SSIM and MSE. Experimental results show DCT algorithm produces a high quality for reconstructed images with acceptable compression rate in terms of quality level is more than 50%. Furthermore, implementing the proposed algorithm using DSP board achieves better performance in terms of processing time compared with PC based.

An Optimized Approach for Fake Currency Detection Using Discrete Wavelet Transform

With the increase of modest technology, copy-move forgery detection has grown in a rapid rate that new era of forged images came true which has the same resemblance as the old ones i.e. difficult to find out with naked human perception. Fake currency detection is one in the effect that currency note is tampered in a way such it has the similar resemblance as the original one. So in order to find out the duplicate or forged portion of the image we go for different splicing algorithms using different techniques. Image forgery results to various security issues. Hence an efficient algorithm is required to detect the forgery in images. By using DCT algorithm blocks of the image are represented by DCT coefficients. Presence of blocking articrafts in DCT makes the method to be a drawback. Hence we propose DWT for segmentation of image. Lexicographical sorting is utilized to find out the cloned image blocks. Finally normalization is applied to find the distance in between similar vectors. In DWT provides better resolution and segmentation compared with DCT. In this paper, due to DWT, Image Forgery detection is done on lowlevel image representation. By using DWT better accuracy in finding out the forgery is achieved in a less time which gradually reduces complexity.

VLSI Implementation and Area EfficientCordic based Integer DCT Architectures forHEVC

In signal progressing domain, recent days there is bottleneck parameter performance like area, latency. To provide area efficient integer Discrete Cosine Transform (DCT) designs for High Efficiency Video Coding (HEVC). So that invoked CORDIC architecture to produce on fly trigonometric output instead of traditional method. In integer DCT have its own style of operation and to calculate twiddle factor of DCT CORDIC architecture actively introduced and make sustainable result in area. The computational complexity has been reduced considerably half as compare to traditional operations. The Experimental result shows that the proposed Dct algorithm has not only reduces the computational complexity. Significantly, it also keeps the better transformation quality of the efficient integer DCT. Therefore, the proposed CORDIC based integer DCT can be used in area efficient and high speed HEVC systems especially in battery-based systems. The design has been verified using Modelsim 6.4se and obtain RTL schematic using Xilinx 13.1 Ise.

IMPLEMENTATION OF HIGH SPEED-LOW POWER TRUNCATION ERROR TOLERANT ADDER

Now a Days in modern VLSI technology different kinds of errors are invitable. A new type of adder i.e. error tolerant adder(ETA) is proposed to tolerate those errors and to attain low power consumption and high speed performance in DSP systems. In conventional adder circuit, delay is mainly certified to the carry propagation chain along the critical path, from the LSB to MSB. If the carry propagation can be eliminated by the technique proposed in this paper, a great improvement in speed performance and power consumption is achieved. By operating shifting and addition in parallel, the error tolerant adder tree compensates for the truncation errors. To prove the feasibility of the ETA, normal addition operation present in the DFT or DCT algorithm is replaced by the proposed addition arithmetic and the experimental results are shown. In this paper we propose error tolerant Adder (ETA). In the view of DSP applications the ETA is able to case the strict restriction on accuracy, speed performance and power consumption when compared to the conventional Adders, the proposed one provides 76% improvement in power-delay product such a ETA plays a key role in digital signal processing system that can tolerate certain amount of errors.

Improved Channel Estimation Algorithms based on a Proposed Signal Model for PUCCH Format 3 in LTE-A

SORTD (Space Orthogonal-Resource Transmit Diversity) has already become a better way of transmit diversity for PUCCH format 3 in LTE-A [1]. SORTD technology lies in the characteristic that each antenna port transmits signal by using different cyclic shift [2] to make orthogonal each other. Using the SORTD’s feature of incoherence in different antennas, this paper proposes a special form of signal model. Based on this proposed model, we propose a low complexity channel estimator based on LS and cubic spline interpolation, and then we put a LS and DCT algorithm to improve the interpolation performance. Finally, for more accurate estimator we drive the third approach based on MMSE and DCT. A series of theoretical researches and simulation results show that all of them are suitable for the proposed signal model even in the environment of high-speed movement; especially the algorithms with DCT have a better performance.

A Fast Algorithm Based on Discrete Cosine Transform(DCT)

Traditional fast algorithms for DCT are aimed at sequences with 2N length and it is math-intensive for sequences which contain odd numbers of elements. This paper analyzes the redundant calculation of cosine transform of non-2N-point sequences and put forward a fast algorithm for one-dimensional DCT with odd length. Also, according to the separability of two-dimensional DCT, we can generalize the fast algorithm for one-dimensional DCT to two-dimensional DCT to implement and complete the fast algorithm. The simulation suggests that this algorithm improves the speed of calculation.

HD Video Online Recognition Based on DCT Spread Spectrum Watermarking Algorithm

In order to guarantee the programs play correctly and protect the digital video copyright, this paper gets a method on high-definition video (HD video) online recognition with strong robustness through analyzing the TV monitoring system requirements and video characters, based on the DCT algorithm. This method will embed the watermark after obtaining the embedding positions by analyzing video frames. It can improve the robustness to compression, noise and filtering by using Arnold scramble and spread spectrum technology. It is a real-time measure to extract watermark and recognize it in HD videos. This method shows of good performance to online recognition in HD video’s watermark extracting and recognizing in theoretical analysis and simulation experiment.

Very Low Resolution Face Image Super-Resolution Based on DCT

This paper introduces the Very Low Resolution (VLR) problem in the fleld of face image super-resolution reconstruction. With the extensive application of the surveillance cameras, the very low resolution problem happens in many face recognition applications, which has brought great inconvenience to users. In order to research this problem, this paper proposes the improved DCT algorithm, and our flnal experimental results have compared with the common DCT algorithm, Cubic B-Spline interpolation algorithm and Baker et al’s method. Experimental results show that the improved DCT algorithm can get better performance in the very low resolution face image super-resolution reconstruction problem.

Review on Fractal Image Compression based on Fast DCT Algorithm

Fractal image compressions is a lossy compression technique for digital images. It is based on the assumptions that the image redundancies can be efficiently exploited by means of block self-affine transformations .Unlike other compression techniques it considers the interrelations between local (range blocks) and global (domain blocks) data. Use of contractive transform on the space of images encompasses a wide variety of coding scheme. However, the high computational complexity of fractal image encoding greatly restricts its application. This review gives a study of different speed ups using DCT to reduce the searching time . Index terms Iterated function system, Discrete cosine transform, Self similarity, contractive mapping,

干涉测量波面重构DCT算法研究

干涉测量波面重构DCT算法研究

Filter Augmented JPEG Algorithms: A Critical Performance Study for Improving Bandwidth

recent years, use of Digital Image Communication has increased exponentially in the day to day activities. Joint Photographic Experts Group (JPEG) is the most widely used still image compression standard for bandwidth conservation. In this paper, it is proposed and critically studied a new set of JPEG Compression algorithms by combining Mean filtering, Median filtering, and Outlier detection algorithms and conventional JPEG DCT algorithm in a staged manner. This outlier based JPEG algorithm is giving exceptionally compression compared to conventional JPEG algorithm. Experiments are carried out with many standard still images. Algorithms developed in this paper, identified to be giving almost same Peak Signal-to-Noise Ratio (PSNR) as that of standard JPEG algorithm.

Design and performance analysis of a zonal DCT-based image encoder for Wireless Camera Sensor Networks

Systems mapped on CMOS architectures are often expected to achieve high processing bandwidth and low energy consumption. However, a specific care should be paid to adequate the algorithm structure to the circuit architecture when designing multimedia wireless embedded networking systems.This paper addresses the problem of low power consumption and real time constraints for image communication in wireless camera sensor networks (WCSN). It presents a low-complexity hardware implementation of JPEG-like encoder for image compression and paquetization. The designed circuit is planned to be embedded in the camera sensor node to relieve the main processor of the data processing tasks. This encoder combines the best lifting DCT algorithm of the literature with a zonal coding approach. The former reduces the number of operations required per DCT coefficient while the latter reduces the number of coefficients to be computed, quantized and encoded. We study the tradeoff between the size of the zonal mask (a square zone of size k) and the visual image quality as a function of the compression bitrate, then we describe the hardware features of the JPEG-like circuit when implemented on different FPGAs and ASIC prototypes. Performance evaluation is provided for several ranges of compression bitrate, accordingly with the right value of k. Considering a grayscale image compressed to 0.25bpp for example, k=4 is the best choice. In this case, and for an image of 128×128 pixels, the CMOS circuit of the proposed encoder, synthesized using 45nm integration technology, clocks at 360MHz and consumes 18.02mW. It outperforms most of similar circuits being presented in the literature.

VLSI Architecture for 8-Point AI-based Arai DCT having Low Area-Time Complexity and Power at Improved Accuracy

A low complexity digital VLSI architecture for the computation of an algebraic integer (AI) based 8-point Arai DCT algorithm is proposed. AI encoding schemes for exact representation of the Arai DCT transform based on a particularly sparse 2-D AI representation is reviewed, leading to the proposed novel architecture based on a new final reconstruction step (FRS) having lower complexity and higher accuracy compared to the state-of-the-art. This FRS is based on an optimization derived from expansion factors that leads to small integer constant-coefficient multiplications, which are realized with common sub-expression elimination (CSE) and Booth encoding. The reference circuit [1] as well as the proposed architectures for two expansion factors α† = 4.5958 and α′ = 167.2309 are implemented. The proposed circuits show 150% and 300% improvements in the number of DCT coefficients having error ≤ 0:1% compared to [1]. The three designs were realized using both 40 nm CMOS Xilinx Virtex-6 FPGAs and synthesized using 65 nm CMOS general purpose standard cells from TSMC. Post synthesis timing analysis of 65 nm CMOS realizations at 900 mV for all three designs of the 8-point DCT core for 8-bit inputs show potential real-time operation at 2.083 GHz clock frequency leading to a combined throughput of 2.083 billion 8-point Arai DCTs per second. The expansion-factor designs show a 43% reduction in area (A) and 29% reduction in dynamic power (PD) for FPGA realizations. An 11% reduction in area is observed for the ASIC design for α† = 4.5958 for an 8% reduction in total power (PT ). Our second ASIC design having α′ = 167.2309 shows marginal improvements in area and power compared to our reference design but at significantly better accuracy.

FAST DCT ALGORITHM FOR VIDEO TRANSMISSION

This paper presents a fast DCT algorithm by using convolution method. Multipliers will be a crucial process in designing a fast DCT algorithm because they take a long time to complete their process. Reducing a number of multipliers is the one way to make a fast DCT algorithm. This paper shows how to reduce multipliers by using two steps: the first step is by grouping transformation matrix to be two groups in which this process uses the folding concept. The second step is by using fast convolution by inspection to minimize multipliers. Keywords : multiplier, fast DCT, fast convolution, folding.

FAST DCT ALGORITHM FOR VIDEO TRANSMISSION

This paper presents a fast DCT algorithm by using convolution method. Multipliers will be a crucial process in designing a fast DCT algorithm because they take a long time to complete their process. Reducing a number of multipliers is the one way to make a fast DCT algorithm. This paper shows how to reduce multipliers by using two steps: the first step is by grouping transformation matrix to be two groups in which this process uses the folding concept. The second step is by using fast convolution by inspection to minimize multipliers. Keywords : multiplier, fast DCT, fast convolution, folding.

The Application Research of MD5 Encryption Algorithm in DCT Digital Watermarking

This article did the preliminary study of the application of algorithm for MD5 in the digital watermark. It proposed that copyright information will be encrypted using an algorithm MD5, and made rules for the second value image watermarks, through DCT algorithm that embeds an image by the carrier. The extraction algorithms can pick up the watermark and restore MD5 code.

A Scheme of Concealment and Transmission of Secret Information in Text Files

Abstract A common method to transfer a secret information is encrypting the secret information before transmission. However, most cipher texts are incomprehensible which attracts more attackers. A better scheme is to hide the secret information in a common document and to transfer it in common channel. The sender encrypts the secret information before the cipher text is embedded into a text file based on the characteristics of line and diagonal profile of the text documents. Then, the sender embeds the factors to encrypt the cipher text as a double-watermark into the seal image based on DCT and LSB algorithms. The receiver extracts and recovers the secret information from the text file and the seal image. The system of the Identity based on Encryption is the basis of the communication between the sender and the receiver.