Hybrid DC Circuit Breaker Research Articles

Metal Oxide Varistor Design Optimization and Main Breaker Branch Switch Control of a Progressively Switched Hybrid DC Circuit Breaker

In this article, metal oxide varistor (MOV) design optimization and switching control in the main circuit breaker (MCB) branch of a progressively switched hybrid dc circuit breaker (DCCB) is presented. A progressively switched hybrid DCCB can achieve faster fault isolation with reduced peak fault current magnitude and transient recovery voltage compared with a regular hybrid DCCB due to its modified switching strategy. Consequently, thermal stress on the semiconductor devices in MCB is significantly reduced. Analytical model of the system dynamics during fault isolation with progressive switching is derived to demonstrate the switching scheme’s effect on the energy-absorbing component, MOV, during turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> process. Derived analytical model in conjunction with the displacement curve of the fast mechanical switch of the hybrid DCCB is utilized to optimize the components of the main circuit breaker branch to reduce MOV degradation through asymmetric energy dissipation. A model of the circuit breaker is built in PSCAD to validate the performance of the proposed optimization method in a 10-kV/250-A system with four stage progressive switching. Additionally, a low voltage system model at 380 V is developed in PLECS for two stage progressive switching that works as the basis of experimental validation. This includes both lookup table-based MOV model and device thermal model for junction temperature estimation. Experimental results are provided for a 380-V system to demonstrate reduced fault current peak in a progressive switching and near uniform energy absorption in optimally selected MOVs.

Parameters design of voltage sharing components for the series multi‐break mechanical switch

Series multi-break mechanical switch is one of the critical components of high-voltage hybrid DC circuit breakers. However, due to the existence of distributed capacitance, the voltage distribution between the breaks is not balanced. This paper proposed a voltage sharing configuration method of the mechanical switch of hybrid DC circuit breaker, and carried out the static DC voltage and the transient voltage distribution characteristics tests to verify its effectiveness. Considering the influence of whole structure of the circuit breaker, this paper established the electrostatic field model and circuit simulation model of a typical ±535-kV hybrid DC circuit breaker. And it analyzed the influence of single break's opening fault, breaking open distance, and the shielding fitting on the voltage distribution characteristics of series six break mechanical switch. According to the simulation results based on the Zhangbei voltage source converter-based high-voltage direct current project type test parameters, the parameters design of the voltage sharing components of the mechanical switch are obtained, which can meet the voltage sharing coefficient requirement of 95%.

Multiport Hybrid DC Circuit Breaker With Reduced Fault Isolation Time and Soft Reclosing Capability

The hybrid dc circuit breaker is one of the most promising dc circuit breakers (DCCBs). However, its cost is relatively high, and the completion of its fault isolation is significantly delayed because of the large current limiting inductors configured in the multiterminal dc grid. Besides, due to the utilization of overhead lines, the probability of temporary faults is much increased, which means there is a great possibility that the power supply can be rapidly restored by reclosing DCCBs. However, the temporary faults must be distinguished from the permanent faults before the reclosing operation to avoid damaging the fragile power electronic equipment. Therefore, considering the above issues, a novel multiport hybrid dc circuit breaker (MHCB) is proposed in this article. The MHCB mainly has three advantages: the reduced implementation cost by sharing the expensive main breaker among multiple lines, the reduced fault isolation time by bypassing the current limiting inductor during energy dissipation, and the ability to reclose softly. Extensive simulations and experiments verify the effectiveness of the device. In addition, the comparison of the new device and existed solutions is presented.

An Improved Hybrid DC Circuit Breaker With Self-Adaptive Fault Current Limiting Capability

The effective fault current limiting is very significant for the dc distribution system. However, the traditional dc fault current limiting method, i.e., directly installing dc reactor, may trigger negative impacts the system normal operation and fast isolation of the circuit breaker. Therefore, an improved hybrid dc circuit breaker with self-adaptive fault current limiting capability is proposed in this article. Not only can it realize fault current limitation in a quick and efficient manner, but also ensures the continuous operation of the converter and the fault ride-through of the healthy network after the dc fault. In this sense, the requirements on the protection and arrester capacity are reduced. Compared with other types of fault current limiting methods, the proposed topology has the merit of few negative effects on system stability and transient response. It can effectively perform fault current limiting and fault isolation, with low conduction loss and low implementation difficulty. The working principle and advantages of the proposed topology are verified by experimental tests and simulation cases.

An adaptive‐impedance fault current limiter for accelerating fault current suppression in MMC‐HVDC systems

DC fault clearance is one of the critical issues for the modular-multilevel-converter-based high voltage direct current (MMC-HVDC) systems. Employing a hybrid DC circuit breaker (H-DCCB) to isolate the faulty line is a typical method to achieve fast fault clearance. However, the H-DCCB has to interrupt the fault current and absorb the energy up to tens of megawatts in several milliseconds. Through theoretical analysis of the interruption process using the H-DCCB, reducing the equivalent inductance of the fault circuit during the fault falling stage is recommended to accelerate the fault current suppression for the H-DCCBs. This paper proposes a novel adaptive-impedance fault current limiter (AFCL), which contains two coupled DC reactors and an energy absorption branch (EAB). The proposed AFCL can automatically limit the fault current during the current rising stage and works as a DC reactor with a fixed equivalent inductance through a two-state model analysis. Meanwhile, the AFCL contributes to accelerating the decline of the current by adaptively reducing the inductance of the discharge circuit. Consequently, the fault current suppression time and the energy absorbed by the H-DCCB are reduced. Simulation case studies and hardware experiments are carried out to verify the performance and practicality of the proposed AFCL.

Hybrid DC Circuit Breaker with Integrated Self-charging and Current Limiting

With the rapid development of DC power systems in recent years, more stringent requirements have been put forward for the fast reliability of DC circuit breakers. At present, in the medium voltage DC circuit breaker, the mechanical switch commonly uses an external secondary power supply to charge the mechanism drive capacitor, which has the problems of large breaker size and high cost. In this paper, we propose a DC circuit breaker topology that uses short-circuit current to charge the mechanism drive capacitor of the mechanical switch. When the short-circuit current rises, a voltage drop is formed across the series inductor, and this voltage charges the drive capacitor in parallel through a diode, avoiding the use of a secondary power supply to charge the drive capacitor and reducing the complexity of the DC circuit breaker system. The operating principle of the circuit breaker is analysed and the rationality of the proposed scheme is verified by simulation calculations.

A Novel DC Circuit Breaker With Counter-Current Injection and IGCT Combined

The fast fault clearance in medium voltage direct current (MVDC) grids requires the DC circuit breakers (DCCBs) with high breaking capability and low cost. The traditional hybrid DCCB realizes large current interruption relying on several insulated gate bipolar transistors (IGBTs) in parallel, which results in difficulty of cost reduction. In this paper, a novel DC circuit breaker with counter-current injection and integrated gate-commutated thyristor (IGCT) combined is proposed and analyzed. By combining forced commutation and IGCT, the large current breaking capability can be realized and the low cost is guaranteed. The simulation of the proposed DCCB is performed to evaluate the fault current breaking capability and influence of circuit parameters consisting of stray parameters and pre-charged capacitors on current commutation processes. Furthermore, a prototype of the 10 kV MVDC circuit breaker with 20 kA breaking capability is developed, then the fault current breaking test is carried out to verify the validity of the proposed topology which can cut off current within 2.5 ms. 1

A Low-Loss Integrated Circuit Breaker for HVDC Applications

Hybrid dc circuit breakers (HCBs) are recognized as suitable devices for protecting high-voltage direct-current (HVDC) systems, along with other dc circuit breakers (DCCB). However, compared to mechanical circuit breakers, HCBs exhibit higher conduction losses. Such losses are inevitable under no-fault conditions as current may flow through some of the semiconductor switches. An integrated circuit breaker (ICB) minimizing these losses is presented in this paper, and this is achieved by replacing semiconductor switches by mechanical components in the current path. For completeness, the topology design, operating sequence and a mathematical analysis for component sizing of the device are provided. In addition, an estimation of the conduction losses is quantified. It is estimated that the power losses of an ICB are 2 to 30&#x0025; of an HCB only. The ICB has been implemented in PSCAD&#x002F;EMTDC to demonstrate its effectiveness for isolating dc faults, with simulations conducted on a three-terminal HVDC grid.

A New Design of MP-HDCCB Topology Based on Hybrid Switching Device

Since each branch of the multiterminal DC circuit system relies on the DC circuit breaker for breaking and fault isolation, the prohibitive cost and huge volume of the Hybrid DC Circuit Breaker (HCB) limit its development and broad application in multiterminal flexible DC systems. Multiport hybrid DC circuit breaker (MP-HDCCB) based on device and branch sharing reduces the configuration cost of the circuit breaker to a certain extent. In order to further reduce the cost of MP-HDCCB, a novel MP-HDCCB topology based on hybrid switching devices is proposed, adopting full controlled switching devices to achieve rapidity of breaking fault current, and using semi-controlled switching devices in series to withstand the transient interruption voltage (TIV), so as to reduce the construction cost and technical difficulty. In this paper, the working principle and fault breaking strategy of the topology are introduced in detail, then the parameters of the major circuit are analyzed theoretically, and the parameter design of each branch is given. In the end, the rationality and validity of the proposed topology is tested and verified by simulations and experimental tests.

High efficiency isolated power supply used for hybrid DC circuit breaker in high voltage direct current systems

High efficiency isolated power supply used for hybrid DC circuit breaker in high voltage direct current systems

Reclosing Current Limiting for DC Line Faults in VSC-HVDC Systems

The problem of reclosing current limiting in voltage source converter based high-voltage direct current (VSC-HVDC) systems is becoming more and more serious. A soft reclosing scheme for DC permanent faults is presented in this paper. Because the converter voltages of stations at both terminals of the disconnected faulty line may be different, the choice of which terminal to reclose first will affect the reclosing overcurrent. A method for selecting the terminal to reclose first is inves-tigated to achieve a minimum peak overcurrent during the reclosing process. In order to ensure that the hybrid DC circuit breaker (HDCCB) adapts to the needs of the reclosing process better, the traditional HDCCB is improved by adding a soft reclosing module (SRM). The energy dissipated in the arresters is significantly reduced when using the improved HDCCB. The improved HDCCB will be able to reclose multiple times safely and thus increase the possibility of successful reclosing. Moreover, the recovery time after the HDCCB is successfully reclosed is very short with the improved HDCCB and its control principles. Simulation results show that this proposed scheme is capable of limiting the reclosing overcurrent when the fault still exists.

A Hybrid Dc Circuit Breaker with Selective Interruption

A Hybrid Dc Circuit Breaker with Selective Interruption

Hybrid Dc Circuit Breaker with Reduced Fault Isolation Time and Current Limiting Capability

Hybrid Dc Circuit Breaker with Reduced Fault Isolation Time and Current Limiting Capability

A Fault Current Limiting Hybrid DC Circuit Breaker

Due to the low impedance characteristic of the high voltage direct current (HVDC) grid, the fault current rises extremely fast after a DC-side fault occurs, and this phenomenon seriously endangers the safety of the HVDC grid. In order to suppress the rising speed of the fault current and reduce the current interruption requirements of the main breaker (MB), a fault current limiting hybrid DC circuit breaker (FCL-HCB) has been proposed in this paper, and it has the capability of bidirectional fault current limiting and fault current interruption. After the occurrence of the overcurrent in the HVDC grid, the current limiting circuit (CLC) of FCL-HCB is put into operation immediately, and whether the protected line is cut off or resumed to normal operation is decided according to the fault detection result. Compared with the traditional hybrid DC circuit breaker (HCB), the required number of semiconductor switches and the peak value of fault current after fault occurs are greatly reduced by adopting the proposed device. Extensive simulations also verify the effectiveness of the proposed FCL-HCB.

A Breaker Failure Detection Method Based on Nonlinear Parameter Estimation for Modular Hybrid DC Circuit Breakers

Modular hybrid dc circuit breakers (DCCBs) have been widely employed to protect multiterminal high-voltage dc (MT-HVdc) grids. However, breaker failures still pose a challenge to the protection of MT-HVdc grids, especially for a single module failure of breakers. To this end, a breaker failure detection method based on nonlinear parameter estimation is presented. This proposed method consists of three parts. The first is a signal preprocessing method that eliminates the effect of the RC circuit of the hybrid DCCB. The second is an offline optimal parameter acquisition method that has an improved numerical model of the metal–oxide varistor (MOV) and combines the Levenberg–Marquardt (LM) algorithm with the particle swarm optimization (PSO) algorithm. The third is an online breaker voltage error calculation that estimates the breaker voltage based on the improved numerical MOV model to detect the partial failure of the modular hybrid DCCB. The performance of the proposed algorithm is evaluated by both power system computer aided design (PSCAD)/electro-magnetic transient design and control (EMTDC) tests and field tests. The study results prove the effectiveness of the proposed method for the partial failure of the modular hybrid DCCB considering different faulty conditions and the aging of MOVs.

P+ Base Doping Optimization of 6-in Gate Commutated Thyristors for Hybrid DC Circuit Breaker Application

The 6-in gate commutated thyristor (GCT) is suitable for hybrid dc circuit breaker (HDCB) application with its large chip area and high maximum controllable current (MCC), compared with traditional 4-in GCTs. P+ base doping dispersion control is of vital importance in the 6-in GCT chip. Based on the strong correlation between P+ base doping and the gate-cathode breakdown voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {gbr}}$ </tex-math></inline-formula> ), P+ base doping dispersion is characterized through <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {gbr}}$ </tex-math></inline-formula> . Test results show that <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {gbr}}$ </tex-math></inline-formula> dispersion in the 6-in GCT sample with etched depth of around <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10~\mu \text{m}$ </tex-math></inline-formula> is about 2 V with the average <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {gbr}}$ </tex-math></inline-formula> of around 22 V. While <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {gbr}}$ </tex-math></inline-formula> dispersion in the sample with etched depth of above 20 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> is above 6 V with the average <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {gbr}}$ </tex-math></inline-formula> of around 27 V. These are consistent with the 2-D simulation results. Then, P+ base doping parameter design is optimized through experiment. Both turn-on and turn-off characteristics of 6-in GCT samples with different P+ base doping parameter designs are compared with HDCB application. The final optimized 6-in GCT chip has no difficulty in turning on under a low dc-link voltage below 100 V and it can turn off 13 kA with the overvoltage of about 4.5 kV successfully, which shows potential in HDCB application.

Protection of MTDC Network Using a Resistive Type Superconducting Fault Current Limiter

Multi-terminal DC network (MTDC) offers great potential for long distance huge power delivery with multi-direction power transmission capability. However, the key obstacle in a realization of MTDC is the lack of existing commercial protection device can withstand the DC fault that rises rapidly and surge tenfold within several milliseconds over the whole system. The new technology called Superconducting Fault Current Limiter (SFCL) could bring a solution to the main bottleneck of the MTDC networks. In this work, an electro-thermal model of resistive type SFCL in series with a hybrid DC circuit breaker is proposed to protect a five terminal MTDC network. The numerical analysis carried out using (EMTP-RV®) software, and the simulation results show how effectively the SFCL can reduce the fault current and increase the breaking capability. Moreover, system stability is remarkably improved.

A Multi‐Port Current‐Limiting Hybrid DC Circuit Breaker Based on Thyristors

Multi‐port hybrid DC circuit breakers (MP‐HCBs) are rapidly developing due to their obvious advantages in economy compared to traditional two‐port hybrid circuit breakers (HCBs). However, most of the existing MP‐HCB topologies do not have the current‐limiting capability, and a large number of insulated‐gate bipolar transistors (IGBTs) are still needed in their main breakers. In response to the problems, a multi‐port current‐limiting hybrid DC circuit breaker (MP‐CLHCB) based on thyristors is proposed in this paper. MP‐CLHCB uses low‐cost thyristors instead of IGBTs, and suppresses the rise of fault current through current‐limiting branch. In an attempt to prevent the MP‐CLHCB from reclosing in a permanent fault and causing damage to the DC grid again, an adaptive reclosing scheme is also proposed. In this paper, the topology, operation stages, theoretical derivation, and parameter design of the MP‐CLHCB are provided. Finally, the performance of the MP‐CLHCB is verified and compared through simulations in PSCAD/EMTDC. © 2021 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC.

Topology optimization and evaluation of multiport hybrid DC circuit breaker based on graph theory

The multiport hybrid dc circuit breaker (M-HCB) is a cost-effective choice for fault blocking in meshed HVDC system. Various M-HCB topologies have been proposed in recent years. However, the topology derivation has randomness and uncertainty. Whether the topology can be improved and how to derive new topology from existing topology has less discussion. In this paper, a topology optimization and evaluation method based on graph theory is proposed to deduce more M-HCB topologies from existing topologies. A series of new topologies is quickly derived from the proposed method, and the performance can be evaluated based on the feasible path calculation. Compared with the existing topology, the derived topologies have the advantages of cost and loss in specific application scenarios. Simulation and experiment results are given to verify the topologies. The comparison between the existing topologies proves the superiority of the deduced topologies and the feasibility of the proposed method.

Analysis for magnetic field disturbance of hybrid DC circuit breaker during breaking

The high current of hybrid DC circuit breaker (HCB) in the process of breaking generates strong transient magnetic field (MF), which may interfere with the normal operation of driver control units (DCUs). Therefore, the analysis for transient MF disturbance is of great significance. Due to the large space scale of HCB, with the large number of power electronic devices, the numerical calculation method has the disadvantages of large consumption of resources and slow calculation speed in solving the transient MF inside the HCB. In this study, the current generation mechanism of a 500 kV HCB is analysed, and the equivalent current path is obtained by considering the skin effect. Combined with the temporal and spatial distribution of transient current, the multi-process transient equivalent model of transient MF calculation is established, and the model has the advantages of high precision and high speed. Then, the breaking experiment of HCB is carried out, and the transient MF near the DCU is measured. The experiment results verify the validity of the model. Furthermore, the disturbance of transient MF at the DCU of the transfer branch during breaking 25 kA current is analysed.