DC Circuit Breaker Research Articles

Integrated Topology of Multi-Line DC Circuit Breaker and Power Flow Controller

The reliability of meshed DC grids mainly relies on their ability in DC fault protection and line power flow managing. Multiple DC circuit breakers (DCCB) and current flow controller (CFC) need to be installed, which significantly increases the system cost. A novel current flow controller integrated with hybrid dc circuit breaker (CFC-IHCB) is proposed to significantly reduce the loss and cost of the whole system. Only one unidirectional IGBT string based main breaker branch is needed for <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> lines, and the CFC function is integrated into the load communication switches (LCSs). The basic working principle of proposed topology is presented and analyzed. The functionality is verified and a comparison of the proposed solution and other DCCB/CFC solutions is given based on a multi-terminal HVDC system case study.

An Improved DC Circuit Breaker Topology Capable of Efficient Current Breaking and Regeneration

The dc power system, due to its convenience of conversion, integration, and use, is getting immense attention in the field of power transmission and distribution. It is superior to the traditional ac systems in terms of efficiency, reliability, and control simplicity as well. A dc circuit breaker is one of the important elements of any dc power system. It is a sophisticated technology designed to break dc current only. The breaking of a dc current is always challenging compared with the breaking of an ac current, as dc current does not have natural zero crossing points like ac current has. Moreover, dc current breaking becomes more critical when the current is inductive as energy stored in the network inductance opposes instantaneous current breaking. Hence, this energy needs to be absorbed and dissipated as heat during the current breaking operation, which is exactly what is done in the traditional dc circuit breaker topologies. This article introduces a new topology for dc circuit breakers with a mechanism to reuse this stored energy instead of dissipating it. The mechanism is analogous to regenerative braking in electric drive systems and can enhance the overall system efficiency. The proposed scheme was analyzed through rigorous computer simulation and was experimentally validated.

Thermal FEM Analysis of Surge Arresters During HVdc Current Interruption Validated by Experiments

This paper deals with the development of an accurate finite-element model of an arrester to investigate the electrothermal and mechanical stress during dc current interruption. The comprehensive analysis performed on a ZnO surge arrester is supported by experiments during high-voltage dc circuit breaker current interruption. The performed experimental analysis comprises three sequential 26 kV/10 kA direct current interruption tests carried out within a period of one hour. The dynamic temperature and current distribution of the surge arrester columns during current interruption are measured. The finite-element simulation results are in good agreement with the test results. The influence of the surge arrester temperature on the current distribution among the surge arrester columns is analyzed. The impact of the surge arrester temperature on ZnO electrical characteristics and mechanical stress inside the surge arrester are also investigated. The surge arrester finite-element model can be used with full success for parameter optimization of the surge arresters to prevent possible failures when dc circuit breakers performed multiple interruptions in short period of time.

A π-type Compensated Ferrite-Free Domino IPT System for DC Circuit Breakers

This article proposes a novel domino inductive power transfer (IPT) system to provide voltage isolation capability for gate drives in medium voltage dc circuit breakers (DCCBs). The property of reasonably steady outputs under various load conditions is achieved by applying the π-type compensation network. The efficiency of a domino IPT system with identical loads is analyzed, including parasitic resistances. There are two main contributions. First, a ferrite-free PCB-based magnetic coupler combing bipolar with unipolar structures is proposed, lowering cost and weight. Second, a parameter selection method is given to meet the requirements of the output voltages of all loads and the system efficiency. Furthermore, a single-input-five-output prototype is implemented. The transfer distance between adjacent transmitter and receiver is 40 mm, and the switching frequency is 1 MHz. When the input dc voltage is 24 V, the induced voltage of each receiver is around 20 V, and the voltage difference is within 3 V. The maximum efficiency can reach 60% at the total power of 15.5 W. Besides, the prototype is exploited to power five gate drivers of a DCCB during a current turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> test. The total power consumption is 5.6 W, and efficiency reaches 47%.

Analysis of Combined Resistive Superconducting Current Limiter

Based on a brief analysis of the discovered quench mechanism and basic model of the resistive superconducting current limiter, in order to alleviate the defects of the conventional resistive superconducting current limiter, a Combination of fault current limiting operating modes of the current transformer. A custom model of resistive superconducting current limiter was built on the PSCAD/EMTDC simulation platform, and based on a 200kV DC transmission system, the influence of the combined operating mode resistive superconducting current limiter on the circuit was studied, and it was shown that the Define the correctness and necessity of the model. The simulation results show that the resistive superconducting current limiter in the combined operation mode can effectively suppress the short-circuit fault current, reduce the system’s requirements for the breaking capacity of the DC circuit breaker, and improve the safety of the system operation.

Short-Circuit Fault Current Modeling of a DC Light Rail System with a Wayside Energy Storage Device

This paper proposes a simulation model to calculate short-circuit fault currents in a DC light rail system with a wayside energy storage device. The simulation model was built in MATLAB/Simulink using the electrical information required to define a comprehensive DC traction power rail system. The short-circuit fault current results obtained from the simulation model were compared with hand calculation results obtained using EN 50123-1 guidance. The relative error was 1.02%, which validates the model. A case study was carried out for a 1500 V DC light rail system. In the case study, a method was proposed to assess the DC protection and the withstand and breaking capacity of the DC circuit breakers for maximum current and distant faults. A traction power modeling simulation was conducted for the 1500 V DC light rail system to calculate the maximum load current in the analyzed electrical sections. It is concluded that the proposed simulation model and fault methodology can be used for DC protection settings calculations and DC circuit breaker rating analysis.

Semi AI-based protection element for MMC-MTDC using local-measurements

The multi-terminal HVDC system based on the modular multilevel converter (MMC-MTDC) is a promising technique for flexible power transmissions to multiple regions. As such a system is quite sensitive to DC faults, there is an acute need to propose a protection element that can trip the local DC circuit breaker (CB) within several milliseconds once there is an internal DC line fault. However, the existing main protection scheme faces a dilemma balancing selectivity and sensitivity. To solve this problem, a novel semi artificial-intelligence (AI) based protection element is proposed, including a start-up criterion and a fault-identification criterion. The start-up criterion is based on the propagation characteristics of the initial fault-induced surge. To enhance the real-time performance of the protection element, it will not trip the fault-identification process unless the fault is identified as a forward one. The fault-identification criterion is based on artificial intelligence (AI), and further determines whether the forward fault is internal, which only works if the start-up criterion trips. Simulation results indicate that the proposed protection element has satisfactory speed, sensitivity, and selectivity against internal DC faults and is quite secure under external fault conditions. The impact of disturbances, such as the white noise, abnormal samplings, etc., on the security of the proposed protection element is also discussed.

3-D Dynamic Simulation of the Initial Expansion Process of Vacuum Arc Plasma in DC Interruption

This work investigates the dynamic characteristics of vacuum arc in the initial expansion process of a direct current (dc) circuit breaker. Based on the commercial cup-type axial magnetic field (AMF) contact, a 3-D transient magnetohydrodynamic (MHD) model is established. In the model, transient equations are used to study the transient characteristics of the vacuum arc. The effect of magnetic field hysteresis is also considered in the method. The dynamic mesh technique is adopted to simulate the electrode separation, which can make the simulation results more accurate. The simulation results show that, during the initial expansion process, with the increase in the current, the arc gradually expands in the electrode gap. The ion pressure, ion number density, axial current density, and energy flux density to the anode gradually decrease. Ion rotation can be observed under the influence of the magnetic field, and the rotation speed will increase with the increase in the current. Two different arc ignition positions are also compared. The result shows that igniting the arc at the contact center is more helpful to the success of the interruption of the dc circuit breaker. The appearance of the arc predicted by the model is consistent with the experimental results.

Metal Oxide Varistor Design Optimization and Main Breaker Branch Switch Control of a Progressively Switched Hybrid DC Circuit Breaker

In this article, metal oxide varistor (MOV) design optimization and switching control in the main circuit breaker (MCB) branch of a progressively switched hybrid dc circuit breaker (DCCB) is presented. A progressively switched hybrid DCCB can achieve faster fault isolation with reduced peak fault current magnitude and transient recovery voltage compared with a regular hybrid DCCB due to its modified switching strategy. Consequently, thermal stress on the semiconductor devices in MCB is significantly reduced. Analytical model of the system dynamics during fault isolation with progressive switching is derived to demonstrate the switching scheme’s effect on the energy-absorbing component, MOV, during turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> process. Derived analytical model in conjunction with the displacement curve of the fast mechanical switch of the hybrid DCCB is utilized to optimize the components of the main circuit breaker branch to reduce MOV degradation through asymmetric energy dissipation. A model of the circuit breaker is built in PSCAD to validate the performance of the proposed optimization method in a 10-kV/250-A system with four stage progressive switching. Additionally, a low voltage system model at 380 V is developed in PLECS for two stage progressive switching that works as the basis of experimental validation. This includes both lookup table-based MOV model and device thermal model for junction temperature estimation. Experimental results are provided for a 380-V system to demonstrate reduced fault current peak in a progressive switching and near uniform energy absorption in optimally selected MOVs.

Capacitive Couple-Based Transient Current Commutation in Solid-State Circuit Breakers

This letter presents a new auxiliary circuit to achieve transient current commutation (TCC) in dc solid-state circuit breakers (SSCBs). The auxiliary circuit consists of two parts: active injection circuits (AIC) and capacitive couplers. There are two contributions. First, coupling capacitors between AIC and the main branch are introduced to prevent short circuit failures in the auxiliary branch. Second, a boost converter-based resonant circuit is presented for AIC to achieve TCC in the main branch through couplers. The presented AIC tunes the duration time and amplitude of injected countercurrent pulses during dc current interruption. The working principle and design procedure of the auxiliary circuit are presented. The proposed topology is verified by experiments of a 2&#x00A0;kV&#x002F;100 A dc SSCB prototype under load current interruption. The experimental results show that the injected pulse current through couplers reaches 110 A, and it decays to zero within 12.5&#x00A0;&#x03BC;s. The total reaction time interval including the communication delay and the AIC current rising delay is 108&#x00A0;&#x03BC;s. Meanwhile, the peak voltages across the main branch and the coupler reach 2099 V and 2193&#x00A0;V, respectively.

Hybrid MVDC Circuit Breaker Based on Enhanced Arc Voltage of Vacuum Interrupter

The hybrid dc circuit breaker (HDCCB) is one of the most promising solutions for the dc interruption. But the power electronics-based load commutation switch (LCS) in the main current path causes the high on-state loss and cost, which inhibits the application of the HDCCB. In this paper, a novel hybrid dc circuit breaker is proposed, in which the vacuum interrupter with the external transverse magnetic field (ETMF) is designed to improve the arc voltage and thus enhance the current commutation to power electronics. The ETMF-based vacuum interrupter achieves the fast current commutation instead of the LCS, which realizes the low on-state loss and cost while preserving the short commutation and interruption time. The arc voltage characteristic with ETMF is analyzed, and the influence of the different factors on the commutation time and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">di/dt</i> before current zero are investigated in detail. Based on the calculation results, a 10 kV dc breaker prototype based on the proposed topology is developed with the breaking current of 15.5 kA. Finally, the application of the proposed scheme in HVdc grids is discussed.

Air-Core-Transformer-Based Solid-State Fault-Current Limiter for Bidirectional HVdc Systems

Modular multilevel converter (MMC) high-voltage direct current (HVdc) transmission is a promising method to integrate renewable energies. However, limiting the dc-link fault current and accelerating the fault-current clearance are critical issues for MMC-HVdc systems. In this article, we propose an air-core-transformer-based fault-current limiter (ACT-FCL) in cooperation with the dc circuit breaker to limit fault-current rising and decrease fault-clearing time. Compared with the conventional dc reactor, hybrid current-limiting circuit, current-commutation-based fault-current limiter (FCL), and magnetic coupling FCL, the ACT-FCL can increase the equivalent inductance during the dc fault stage to reduce the rising rate and peak of fault current. The ACT-FCL can also decrease the equivalent inductance during the fault-current-clearing stage to reduce the fault-clearing time. The simulations and laboratory experiments verify the effectiveness of the proposed ACT-FCL in the bidirectional HVdc systems. The ACT-FCL may be extended to more fields, such as dc microgrid and domestic dc transmission.

직류 전력조류 제어 컨버터를 이용한 전력조류 제어 및 직류 차단기 스트레스 감소에 관한 연구

The method proposed in this paper controls the power flow of the meshed DC power system using a DC Power Flow Control Converter (PFCC), and reduces the fault current that occurs in the case of a short circuit in a DC circuit. It is a method to lower the fault current flowing through the DC circuit breaker and thus to reduce the stress applied to the circuit breaker. The proposed PFCC is a Dual Active Bridge (DAB) Converter consisting of a DC/AC power converter connected in parallel with the DC system, a high-frequency transformer that transforms voltage, and a DC/AC power converter, and It consists of a full bridge converter that is connected in series with a DC line and outputs a constant voltage and a reverse voltage, and controls the voltage of the grid line. In this paper, simulation was performed by applying PFCC to a mesh-type DC power system through MATLAB/Simscape, and performance and feasibility were verified through Cassie method to analyze the characteristics of DC circuit breakers.

Parameters design of voltage sharing components for the series multi‐break mechanical switch

Series multi-break mechanical switch is one of the critical components of high-voltage hybrid DC circuit breakers. However, due to the existence of distributed capacitance, the voltage distribution between the breaks is not balanced. This paper proposed a voltage sharing configuration method of the mechanical switch of hybrid DC circuit breaker, and carried out the static DC voltage and the transient voltage distribution characteristics tests to verify its effectiveness. Considering the influence of whole structure of the circuit breaker, this paper established the electrostatic field model and circuit simulation model of a typical ±535-kV hybrid DC circuit breaker. And it analyzed the influence of single break's opening fault, breaking open distance, and the shielding fitting on the voltage distribution characteristics of series six break mechanical switch. According to the simulation results based on the Zhangbei voltage source converter-based high-voltage direct current project type test parameters, the parameters design of the voltage sharing components of the mechanical switch are obtained, which can meet the voltage sharing coefficient requirement of 95%.

Analysis and suppression of voltage oscillation at DC circuit breaker terminal in DC fault transient process

High-frequency voltage oscillation occurs at the initial stage of DC short-circuit fault in the modular multilevel converter (MMC)-based high-voltage direct-current systems, which directly threatens the reliable operation of the secondary equipment in DC circuit breakers (DCCBs). Therefore, this paper focusses on the voltage oscillation characteristic at DCCB terminals, considered the stray parameters of connecting lines, the parasitic parameters of main equipment and the impedance of grounding grid, established equivalent circuit models of MMC-HVDC converter station at the initial stage of pole-to-pole and pole-to-ground fault, and obtained the analytical formula for the voltage oscillation frequency. Then, the comparison with the DC short-circuit test data of ±200 kV MMC-HVDC converter station verified the validity of the models and revealed the mechanism of voltage oscillation. Finally, the influence of the parameters of the converter station on the oscillation characteristics was discussed. It was proposed to install the DCCB at the MMC valve's terminal near the DC side, and the oscillation frequency is about 10–60 kHz, which is more than 5 times lower than that at the DC reactor's terminal near the DC pole bus, and the disturbance of oscillation to DCCB was alleviated.

Multiport Hybrid DC Circuit Breaker With Reduced Fault Isolation Time and Soft Reclosing Capability

The hybrid dc circuit breaker is one of the most promising dc circuit breakers (DCCBs). However, its cost is relatively high, and the completion of its fault isolation is significantly delayed because of the large current limiting inductors configured in the multiterminal dc grid. Besides, due to the utilization of overhead lines, the probability of temporary faults is much increased, which means there is a great possibility that the power supply can be rapidly restored by reclosing DCCBs. However, the temporary faults must be distinguished from the permanent faults before the reclosing operation to avoid damaging the fragile power electronic equipment. Therefore, considering the above issues, a novel multiport hybrid dc circuit breaker (MHCB) is proposed in this article. The MHCB mainly has three advantages: the reduced implementation cost by sharing the expensive main breaker among multiple lines, the reduced fault isolation time by bypassing the current limiting inductor during energy dissipation, and the ability to reclose softly. Extensive simulations and experiments verify the effectiveness of the device. In addition, the comparison of the new device and existed solutions is presented.

An Improved Hybrid DC Circuit Breaker With Self-Adaptive Fault Current Limiting Capability

The effective fault current limiting is very significant for the dc distribution system. However, the traditional dc fault current limiting method, i.e., directly installing dc reactor, may trigger negative impacts the system normal operation and fast isolation of the circuit breaker. Therefore, an improved hybrid dc circuit breaker with self-adaptive fault current limiting capability is proposed in this article. Not only can it realize fault current limitation in a quick and efficient manner, but also ensures the continuous operation of the converter and the fault ride-through of the healthy network after the dc fault. In this sense, the requirements on the protection and arrester capacity are reduced. Compared with other types of fault current limiting methods, the proposed topology has the merit of few negative effects on system stability and transient response. It can effectively perform fault current limiting and fault isolation, with low conduction loss and low implementation difficulty. The working principle and advantages of the proposed topology are verified by experimental tests and simulation cases.

Adaptive sequential reclosing strategy for hybrid HVDC circuit breakers in MMC‐based DC grids

DC circuit breaker (DCCB) is one of the most promising solutions for handling DC fault in half-bridge modular multilevel converter (MMC)-based DC grid. Generally after fault isolation, DCCBs are required to have the ability to quickly reclose so as to restore power transmission. However, the traditional simultaneous reclosing scheme may make the whole system suffer from secondary strikes such as overvoltage and overcurrent in the event of permanent faults. To solve this problem, many adaptive reclosing schemes have been proposed. Among them, the sequential reclosing scheme can achieve rapid recovery without laying any burden on the sampling and protection system. Unfortunately, secondary strikes under a reclosing failure still exist though they can be suppressed. Due to this, this paper illustrates that the overcurrent protection-based fault identification method is not able to identify the fault in time, and thus the secondary strikes are generated during the second tripping. Optimal configuration of DCCBs' parameters can reduce these adverse impacts but cannot avoid them. Based on this, an adaptive reclosing scheme is proposed. Permanent and temporary faults are recognised according to the voltage characteristics at the beginning of the fault line as soon as the arresters are conducted. Extensive simulations on a four-terminal DC grid in PSCAD/EMTDC show that the proposed method can eliminate the potential adverse impacts and is robust to fault resistance.

A novel acceleration criterion for remote-end grounding-fault in MMC-MTDC under communication anomalies

The multi-terminal HVDC system based on the modular multilevel converter (MMC-MTDC) has very high technical merits for long-distance, flexible power transmission. In recent years, there has been a significant improvement in developing its fast-speed primary protection, especially for local-measurement-based ones immune to communication anomalies. However, in many cases, the problem of remote-end fault identification for the local-measurement-based protection elements needs further studies, mainly because such protection elements should balance between sensitivity and security. This paper proposes a novel acceleration criterion to identify remote-end faults for the MMC-MTDC. Based on the difference of the traveling wave propagation characteristics between the scenario of internal faults and that of the external fault, the local-end protection element will detect a highly-oscillating signal due to the opening of the remote-end DC circuit breaker. In contrast, no such signal will be observed in the external fault scenario. The wavelet time entropy is utilized to quantify the feature of oscillation. The performance of the proposed criterion is assessed based on the established four-terminal MMC-MTDC on the PSCAD/EMTDC platform. Results indicate that by using the proposed criterion, the sensitivity of the local-measurement-based protection element against remote-end faults is greatly enhanced.

An adaptive‐impedance fault current limiter for accelerating fault current suppression in MMC‐HVDC systems

DC fault clearance is one of the critical issues for the modular-multilevel-converter-based high voltage direct current (MMC-HVDC) systems. Employing a hybrid DC circuit breaker (H-DCCB) to isolate the faulty line is a typical method to achieve fast fault clearance. However, the H-DCCB has to interrupt the fault current and absorb the energy up to tens of megawatts in several milliseconds. Through theoretical analysis of the interruption process using the H-DCCB, reducing the equivalent inductance of the fault circuit during the fault falling stage is recommended to accelerate the fault current suppression for the H-DCCBs. This paper proposes a novel adaptive-impedance fault current limiter (AFCL), which contains two coupled DC reactors and an energy absorption branch (EAB). The proposed AFCL can automatically limit the fault current during the current rising stage and works as a DC reactor with a fixed equivalent inductance through a two-state model analysis. Meanwhile, the AFCL contributes to accelerating the decline of the current by adaptively reducing the inductance of the discharge circuit. Consequently, the fault current suppression time and the energy absorbed by the H-DCCB are reduced. Simulation case studies and hardware experiments are carried out to verify the performance and practicality of the proposed AFCL.