DC Bias Conditions Research Articles

Novel realizations of digitally controlled low power current controlled current conveyor for tuning filter outputs with constant power consumption

This paper presents a dual output resistance tunable current controlled current conveyor (DO-RTCCCII). In the existing current conveyor the change in bias current is required to alter the design parameter Rx which is the intrinsic resistance of input X terminal. This variation changes the internal dc bias conditions such as saturation margins as well as total power consumption of the block. A resistance trimming block is added at X terminal which is controlled by some programmable bits. The usage of programmable bits helps to achieve the desired response without changing bias current, dc operating point and total power consumption. The port relationships of the DO-RTCCCII block are checked and the circuit and design parameters of current follower, voltage follower are analyzed. The operation of filter circuit is also included to illustrate usefulness of the proposal. The circuit has been designed and simulated using 28 nm CMOS bulk technology model parameters on Cadence Virtuoso/AMS environment (eldo simulator) using 0.75 V supply voltage and results have been verified with post layout netlist.

Core form transformer topological duality based transient model validation for exciting current calculation within DC bias

Transformer topological duality-based transient model (TDuM) has been widely used in the electromagnetic transient (EMT) simulation to consider the impact of core non-linear features and windings arrangement on exciting current. In this study, the transformer TDuMs that specialized for geomagnetically induced current events studying were validated. After a summary of the transformer TDuMs' derivation and their parameters estimation methodologies, the numerical experiments were carried out to investigate the transformer TDuMs and their related key issues such as core's material types, loss factor of hysteresis model, linear leakage inductance, tank wall with EMT analysis software. The numerical results show a good agreement with the measured data in the field experiments with DC bias applied, which mean that using the transformer TDuM to calculate the exciting current under DC bias condition is feasible. Besides, some practical tips were proposed based on the parameters sensitivity analysis for estimating the transformer TDuMs' parameters to study the transformers' dynamics under DC bias condition.

Dielectric polarisation in naturally disordered trilead tetroxide Pb3O4

The paper presents the results of an experimental study of trilead tetraoxide Pb3O4 binder layers and their dielectric properties. The study revealed polarisation processes in low frequency range associated with structure peculiarities in the Pb3O4 compound. The study established the dependence of dielectric properties on temperature and frequency of the applied field. The complex dielectric response of layer samples was measured under various AC drive and DC bias conditions. The paper provides an explanation for the influence of the simultaneous AC and DC voltages on dipole and Maxwell–Wagner polarisation in Pb3O4. It is assumed that there is an impact of interfacial barriers in the polycrystalline structure. The paper discusses the role of lone pair (LP) electrons Pb2+ in polarisation properties of trilead tetraoxide compound.

Nonquasi-Static Capacitance Modeling and Characterization for Printed Inorganic Electrolyte-Gated Transistors in Logic Gates

Printed electronics can benefit from the deployment of electrolytes as gate insulators, which enables a high gate capacitance per unit area (1– $10\,\,\mu \text {F}\,\text {cm}^{-2}$ ) due to the formation of electrical double layers (EDLs). Consequently, electrolyte-gated field-effect transistors (EGFETs) attain high-charge carrier densities already in the subvoltage regime, allowing for low-voltage operation of circuits and systems. This article presents a systematic study of lumped terminal capacitances of printed electrolyte-gated transistors under various dc bias conditions. We perform voltage-dependent impedance measurements and separate extrinsic components from the lumped terminal capacitance. The proposed Meyer-like capacitance model, which also accounts for the nonquasi-static (NQS) effect, agrees well with experimental data. Finally, to verify the model, we implement it in Verilog-A and simulate the transient response of an inverter and a ring oscillator circuit. Simulation results are in good agreement with the measurement data of fabricated devices.

Performance Analysis of a Low-Noise, Highly Linear Distributed Amplifier in 500-nm InP/InGaAs DHBT Technology

This article is an extension of the previous report on an ultrawideband distributed amplifier (DA) in the InP double heterojunction bipolar transistor (DHBT) technology. With the choice of a tricode unit cell, the Miller capacitance is reduced and a larger bandwidth (BW) is obtained. Measured S-parameters show a 3-dB BW of near dc to >170 GHz with a gain of 12 dB. In addition, the circuit operates in low dc bias conditions, thus yielding a low measured noise figure (NF) of 8 dB over the frequency range of 5–50 GHz and 12 dB at 135 GHz. Within the 5–50-GHz frequency range, the NF is only 0.5 dB higher than the NF of a similar DA with cascode unit cell. When the circuit is measured for large-signal condition, it reaches a 1-dB output compression point, $P_{\mathrm {1\,dB}}$ , of 8.4 dBm at 150 GHz, a saturated output power of approximately 10 dBm, and an associated maximum power-added efficiency (PAE) of 6%. This is the best linearity as well as the highest saturated output power and PAE reported at this frequency for DAs. When measured at 20 GHz, the circuit shows a $P_{\mathrm {1\,dB}}$ , of 9 dBm and output referred third-order intercept point of 22 dBm, a saturated output power of 11 dBm, and an associated maximum PAE of 6%, thereby proving its uniform large-signal character within the full band. In short, this circuit brings in the unique combination of low NF, highly linear characteristics, and high PAE simultaneously together over large BW. Furthermore, the circuit consumes 180 mW of dc power only.

Behavior of gold-doped silicon substrate under small- and large-RF signal

In this paper, small- and large-signal performances of passive devices integrated on high-resistivity, trap-rich and gold-doped silicon wafers are presented and compared through measurements and simulations. The gold-doped silicon substrate was produced starting from standard silicon having a nominal resistivity of 56 Ω·cm. We show that the gold-doped substrate presents high effective resistivity and low losses suitable for RF applications. This has been demonstrated by measuring coplanar waveguides, crosstalk, inductors and band pass filter where we observed similar performances for small-signal measurements compared with trap-rich substrate. Large-signal measurements of gold-doped substrates show 60 dBm lower harmonic distortion than high-resistivity substrates, and 10 dB lower than trap-rich substrate at 0 V DC bias. However, a large DC bias dependence on the harmonic distortion induced by the gold-doped substrate is observed. This unexpected behavior is explained using the Fermi level localization in the silicon bandgap for the different DC bias conditions.

Electrochemical impedance of electrodiffusion in charged medium under dc bias.

An immobile charged species provides a charged medium for transport of charge carriers that is exploited in many applications, such as permselective membranes, doped semiconductors, biological ion channels, as well as porous media and microchannels with surface charges. In this paper, we theoretically study the electrochemical impedance of electrodiffusion in a charged medium by employing the Nernst-Planck equation and the electroneutrality condition with a background charge density. The impedance response is obtained under different dc bias conditions extending above the diffusion-limiting bias. We find a transition in the impedance behavior around the diffusion-limiting bias and present an analytical approximation for a weakly charged medium under an overlimiting bias.

An Efficient Method for Offset Mitigation in Free-Space Optical Systems

Channel estimation is a key feature for free space optical (FSO) wireless communication systems which are required for a high QoS and high data rate system. Aiming at the problem of FSO wireless channel estimation, this paper proposes an implicit sequence channel estimation scheme to eliminate dc offset, and studies the key factors affecting the system performance. The optimal power allocation factor is derived based on the maximum SNR criterion. The system performance parameters such as the bit error rate (BER), mean square error (MSE), and computational complexity are evaluated. The results show that under the same dc bias condition, the MSE is estimated to decrease significantly after using the method of this paper. With the increase of dc offset d , the system error rate is significantly reduced and more approaching d = 0 (i.e., no dc offset). The proposed algorithm effectively mitigates the dc offset impact on the system and the BER is significantly improved while the MSE is reduced to 50% of the traditional state-of-the-art method. The proposed work can provide a technical solution to the FSO system and give support to technological development.

Synthesis, Characterization and Fabrication of Graphene/Boron Nitride Nanosheets Heterostructure Tunneling Devices.

Various types of 2D/2D prototype devices based on graphene (G) and boron nitride nanosheets (BNNS) were fabricated to study the charge tunneling phenomenon pertinent to vertical transistors for digital and high frequency electronics. Specifically, G/BNNS/metal, G/SiO2, and G/BNNS/SiO2 heterostructures were investigated under direct current (DC-bias) conditions at room temperature. Bilayer graphene and BNNS were grown separately and transferred subsequently onto the substrates to fabricate 2D device architectures. High-resolution transmission electron microscopy confirmed the bilayer graphene structure and few layer BNNS sheets having a hexagonal B3-N3 lattice. The current vs voltage I(V) data for the G/BNNS/Metal devices show Schottky barrier characteristics with very low forward voltage drop, Fowler-Nordheim behavior, and 10−4 Ω/sq. sheet resistance. This result is ascribed to the combination of fast electron transport within graphene grains and out-of-plane tunneling in BNNS that circumvents grain boundary resistance. A theoretical model based on electron tunneling is used to qualitatively describe the behavior of the 2D G/BNNS/metal devices.

New Criterion of Converter Transformer Differential Protection Based on Wavelet Energy Entropy

For converter transformer, current differential protection fails to operate in the case of internal fault occurs during dc bias or inrush current. Therefore, a new criterion is proposed in this paper to construct a new differential protection scheme. The new criterion is established by the ratio of wavelet energy entropy (RWEE) of current fault component on the primary to that on the secondary side. Once an internal fault occurs, the energy entropy (WEE) of the primary side is much larger than that on the secondary side, and then a large RWEE can be obtained. Otherwise, WEE of both sides are similar, and RWEE is around one. The simulation results show that the proposed criterion can perform well under inrush current, CT saturation, and dc bias conditions. It can discriminate the internal fault from external fault. Most importantly, it avoids the refusal of tripping when an internal fault occurs.

Iron Loss Estimation Method for Silicon Steel Sheet Taking Account of DC-Biased Conditions

One of the issues of an iron loss estimation is the modeling of an excess loss. This paper investigates the modeling method for the excess loss under dc-biased conditions. The proposed approach is based on the 1-D finite-element analysis for the silicon steel sheet in the thickness direction considering hysteretic property and skin effect. In addition, the magnetic flux density waveform is divided into the outline loop and minor loops and estimate the excess loss of each loop using the eddy current loss correction factor $\kappa $ taking account of dc-biased conditions. To demonstrate the effectiveness of the proposed method, we compare the estimated loss with measured one for the harmonic wave in single sheet tester.

Research on DC bias analysis for transformer based on vibration Hilbert Huang transform and ground-state energy ratio method

With the development and construction of (high voltage direct current) HVDC system, more and more DC bias problems caused by monopole operation of HVDC are appeared in grid which leads to efficiency droop or potential risk of transformer. This paper proposes a new non-electrical method, Ground-state energy ratio (GER), based on Hilbert-Huangtransform (HHT) characteristics of vibration signals which can reflect the DC bias accurately. Firstly, the transformer DC bias experiment platform is set up and the transformer vibration signals are measured. Meanwhile, the displacement signals are obtained by the quadratic integral. Secondly, the time-frequency spectra of the DC bias vibration signals are obtained by HHT analysis. According to the energy change of each mode in HHT, the GER method is proposed to quantify the DC bias of signal at each point. Lastly, Comparing the GER values of different parts of transformer, such as core, shell and winding, the vibration signals that can accurately reflect the degree of DC bias are confirmed. Results show that the HHT-GER values of vibration signals which on axial vibration of the iron core column and at the top of the transformer shell increase with the increase of DC bias. Therefore, the HHT-GER is an effective method to analyze the DC bias condition of transformer and diagnose the abnormal vibration of transformer core.

Spatial distribution of oxygen chemical potential under potential gradients and performance of solid oxide fuel cells with Ce0.9Gd0.1O2−δ electrolyte

In this work, maximum power density as the function of electrolyte thickness of a solid oxide fuel cell (SOFC) with Ce0.9Gd0.1O2-δ (GDC10) electrolyte was calculated by integrating partial conductivities of charge carriers under various DC bias conditions at a fixed oxygen chemical potential gradient at both sides of the electrolyte. Partial conductivities as a function of temperature and oxygen partial pressure (PO2) were calculated using Hebb-Wagner polarization method and spatial distribution of PO2 across the electrolyte was calculated based on Choudhury and Patterson's model [1] by considering reversible electrode conditions. At terminal voltages corresponding to SOFC and electrolysis cell operation modes, the oxygen chemical potential gradient at a electronic-stoichiometric point became maximum and minimum to compensate the contribution from electrochemical potential gradient of electron. The current-voltage characteristics in different fuel cell conditions with temperature and thickness dependence were calculated with cathodic and anodic PO2 of 0.21 and 10−22 atm, respectively. The theoretical maximum power density increased from 1.26 W·cm−2 at 500 °C to 7.39 W·cm−2 at 700 °C. Similarly, at 500 °C, power density increased two fold on reducing electrolyte thickness from 20 μm to 10 μm. The implications of these results on the development of GDC10 based SOFC systems was discussed.

Diagnosis of DC Bias in Power Transformers Using Vibration Feature Extraction and a Pattern Recognition Method

DC bias is a great threat to the safe operation of power transformers. This paper deals with a new vibration-based technique to diagnose DC bias in power transformers. With this technique, the DC bias status of power transformers can be automatically recognized. The vibration variation process of a 500 kV autotransformer is tested under the influence of DC bias in the monopole trail operation stage of a ±800 kV HVDC transmission system. Comparison of transformer vibration under normal and DC-biased conditions is conducted. Three features are proposed and are validated by sensitivity analysis. The principal component analysis method is employed for feature de-correlation and dimensionality reduction. The least square support vector machine algorithm is used and verified successful in DC bias recognition. A remote on-line monitoring device based on the proposed algorithm is designed and applied in field DC bias diagnosis of power transformers. The suggested diagnostic algorithm and monitoring device could be useful in targeted DC bias control and improving the safe operation level of power transformers.

Multi stage OTA design: From matrix description to circuit realization

This paper presents a comprehensive approach to frequency compensating multistage amplifiers. Different stage cases have been considered namely, differential voltage and current blocks, and general compensation blocks for both voltage and current states. Then, a matrix description has been proposed to describe the configurations. The approach involved binary matrixes in order to model amplifiers with feedback networks. Evolutionary algorithms were used to find optimum numerical values and simplify symbolic transfer functions. Also a diagram-based design was used to find the appropriate MOSFET DC bias conditions and dimensions. Note that using simplified transfer functions to symbolically locate the poles and zeroes allowed a better circuit design knowledge compared to numerical approaches. To demonstrate the proposed procedure, two circuit were designed in TSMC 0.18 μm CMOS technology and simulated results successfully compared to linear models extracted from the matrix description. According to simulations, the proposed configurations in both voltage and current states show excellence performance versus previous works. Finally, special design cases such as multi-compensation blocks and N-stage approach were discussed.

Employing Microwave Graphene Field Effect Transistors for Infrared Radiation Detection

In this work, we investigate the possibility of employing graphene field effect transistors, specifically designed for microwave applications, as infrared detectors for telecom applications. Our devices have been fabricated on a sapphire substrate employing CVD-grown transferred graphene. The roles of both the gate dielectric and the DC bias conditions have been evaluated in order to maximize the infrared generated signal through an experimental investigation of the signal-to-noise ratio dependence on the transistor operating point.

Noninvasive Localization of IGBT Faults by High-Sensitivity Magnetic Probe With RF Stimulation

This paper presents a new and simple method to noninvasively localize failure sites in an insulated-gate bipolar transistor (IGBT) module by using a magnetic probe. The method detects the magnetic field generated by leakage currents occurring at the broken gates of an IGBT module. In this method, not only an RF stimulus signal but also a dc bias voltage is applied to the IGBT module under test, because the resistance of the failure site’s change depends upon the dc bias condition. A high-sensitivity magnetic probe is used to detect the magnetic field to locate the corresponding fault positions. The magnetic probe is fully integrated onto a chip by a 180-nm CMOS process and includes a magnetic pickup coil, a low-noise amplifier, a downconversion mixer, and a low-pass filter. Magnetic scanning experiments are implemented for two kinds of IGBT module samples to demonstrate the detection of the broken gate positions. In addition, a visual confirmation of the broken gate positions is performed. Several postprocessing steps in a clean room are applied to these samples in order to visually confirm the scanning results of the proposed method. Experimental results successfully demonstrate that our method can be used for noninvasive localization of small intrinsic faults, on two kinds of SiC and Si substrates, of IGBT modules.

InP femtosecond mode-locked laser in a compound feedback cavity with a switchable repetition rate.

A monolithically integrated mode-locked semiconductor laser is proposed. The compound ring cavity is composed of a colliding pulse mode-locking (ML) subcavity and a passive Fabry-Perot feedback subcavity. These two 1.6mm long subcavities are coupled by using on-chip reflectors at both ends, enabling harmonic mode locking. By changing DC-bias conditions, optical mode spacing from 50 to 450GHz is experimentally demonstrated. Ultrafast pulses shorter than 0.3ps emitted from this laser diode are shown in autocorrelation traces.

Nonlinear Analysis of Nonresonant THz Response of MOSFET and Implementation of a High-Responsivity Cross-Coupled THz Detector

The nonresonant THz response of CMOS FET has been analyzed based on static nonlinearities of the transistor channel. For the applied gate-to-source and drain-to-source signals, the significance of the second-order nonlinear terms is investigated as a function of dc bias conditions. A cross-coupled design for differential excitation of the THz detector is also proposed, and it has been shown, based on analysis as well as through measurements, that a cross-coupled detector topology can give the highest responsivity in an unbiased-drain operation, among the possible detector topologies. A minimum optical noise equivalent power (NEP) of $\text{29 pW}/\surd \text{Hz}$ is measured for the cross-coupled detector topology at 500 GHz with unbiased drain. The change in the polarity of the detector response under certain bias conditions is also explained. This paper gives a comprehensive picture of the behavior of the CMOS THz detector by discussing the design considerations such as readout modes, optimum bias points, and device dimensions with respect to both responsivity and NEP.

Two-Dimensional AC Magnetic Properties of Electrical Steel Sheet under Two-Dimensional DC-Biased Magnetization

Electrical steel sheets have been widely employed as a magnetic core material of an electromagnetic equipment. Magnetic materials in the equipment is possible to be excited by two-dimensional AC-magnetization and/or AC-magnetization with two-dimensional DC-biased magnetization. In this paper, the magnetic properties of electrical steel sheets under two-dimensional DC-biased magnetization have been researched. The phase difference of between the fundamental components of B and H under high DC-biased condition becomes very smaller and phase compensation is very important in loss measurement. Also, we found that the magnetic loss under two-dimensional AC-magnetization is very sensitive to magnetic flux density waveform.