Data-intensive Workloads Research Articles

Side Channel Attacks on GPUs

Graphics Processing Units (GPUs) are commonly integrated with computing devices to enhance the performance and capabilities of graphical workloads. In addition, they are increasingly being integrated in data centers and clouds such that they can be used to accelerate data intensive workloads. Under a number of scenarios the GPU can be shared between multiple applications at a fine granularity allowing a spy application to monitor side channels and attempt to infer the behavior of the victim. For example, OpenGL and WebGL send workloads to the GPU at the granularity of a frame, allowing an attacker to interleave the use of the GPU to measure the side-effects of the victim computation through performance counters or other resource tracking APIs. We demonstrate the vulnerability by implementing three end-to-end attacks. We show that an OpenGL or CUDA based spy can fingerprint websites accurately (attack I), track user activities within the website, and even infer the keystroke timings for a password text box (attack II) with high accuracy. The third attack demonstrates how a CUDA spy application can derive the internal parameters of a neural network model being used by another CUDA application on the cloud. To counter these attacks, the paper suggests mitigations based on limiting the rate of the calls, or limiting the granularity of the returned information.

Optimal Performance-Aware Cooling on Enterprise Servers

Datacenters house massive databases and applications to provide business decision support and cloud services where commercial success is contingent on timely responses. The servers that these tasks run on dissipate a lot of power, requiring equally powerful cooling systems to maintain a safe and efficient temperature level. In a typical enterprise server, server chassis fans can generate vibrations that are powerful enough to degrade the performance of data-intensive workloads. Our methodology measures and reproduces real-life vibrations on a rack server to evaluate the performance of different hard disks. Effective hardware management relies on an accurate understanding of these devices and their interactions to mitigate any performance degradation and meet thermal constraints. While current strategies focus on managing processing resources, at the expense of more data-dependent workloads, this paper approaches server efficiency by targeting the cooling-performance relationship in conjunction with other dependencies between power, thermal, and cooling. We extract a model from common database benchmarks based on expected resource utilization and corresponding cooling needs, while considering these mechanical disturbances. Our proposed strategy uses convex optimization to maintain thermal constraints at all times, while reducing the energy consumption of a server by 65% compared to basic proportional-integral-derivative controllers, or by 19% in comparison to advanced hardware management techniques proposed in literature.

Performance and Resource Utilization of FUSE User-Space File Systems

Traditionally, file systems were implemented as part of operating systems kernels, which provide a limited set of tools and facilities to a programmer. As the complexity of file systems grew, many new file systems began being developed in user space. Low performance is considered the main disadvantage of user-space file systems but the extent of this problem has never been explored systematically. As a result, the topic of user-space file systems remains rather controversial: while some consider user-space file systems a “toy” not to be used in production, others develop full-fledged production file systems in user space. In this article, we analyze the design and implementation of a well-known user-space file system framework, FUSE, for Linux. We characterize its performance and resource utilization for a wide range of workloads. We present FUSE performance and also resource utilization with various mount and configuration options, using 45 different workloads that were generated using Filebench on two different hardware configurations. We instrumented FUSE to extract useful statistics and traces, which helped us analyze its performance bottlenecks and present our analysis results. Our experiments indicate that depending on the workload and hardware used, performance degradation (throughput) caused by FUSE can be completely imperceptible or as high as −83%, even when optimized; and latencies of FUSE file system operations can be increased from none to 4× when compared to Ext4. On the resource utilization side, FUSE can increase relative CPU utilization by up to 31% and underutilize disk bandwidth by as much as −80% compared to Ext4, though for many data-intensive workloads the impact was statistically indistinguishable. Our conclusion is that user-space file systems can indeed be used in production (non-“toy”) settings, but their applicability depends on the expected workloads.

Profile-based power-aware workflow scheduling framework for energy-efficient data centers

In the age of big data, software-as-a-service (SaaS) clouds provide heterogeneous and multitenant utilization of underlying virtual environments in data centers. Real-time and parallel deployment of applications with data-intensive workloads of various sizes pose challenges in optimal resource scheduling, power utilization, task completion time, network latency, and so on, causing degradation in the quality of service and affecting the user experience. In this paper, we investigate the role of application profiles in addressing the tradeoff between performance and energy efficiency of small- to medium-scale data centers. A power-aware framework for efficient placement of application workloads in the data center is proposed. The framework considers various application workflow constraints, such as CPU, memory, network I/O, and power consumption requirements to develop realistic profiles of application workloads. A system model for the efficient workflow assignment in the data center using a novel scheduler algorithm is presented. The performance of the proposed scheduler is validated through simulation studies. We compare the proposed scheduler with two scheduling algorithms: robust time cost (RTC) and heterogeneous earliest finish time (HEFT). Results show that the proposed scheduler is 19% and 38% more energy efficient than RTC and HEFT, respectively for medium–large sized workloads.

On the role of message broker middleware for many-task computing on a big-data platform

We have designed and implemented a new data processing framework called “Many-task computing On HAdoop” (MOHA) which aims to effectively support fine-grained many-task applications that can show another type of data-intensive workloads in the YARN-based Hadoop 2.0 platform. MOHA is developed as one of Hadoop YARN applications so that it can transparently co-host existing many-task computing (MTC) applications with other data processing workflows such as MapReduce in a single Hadoop cluster. In this paper, we investigate main characteristics of two well-known open-source message broker middleware systems (Apache ActiveMQ and Kafka) and their implications on a many-task management scheme in our MOHA framework. Through our extensive experiments with a real MTC application, we demonstrate and discuss trade-offs between parallelism and load balancing of data access patterns in message broker middleware systems for Many-Task Computing on Hadoop.

Location-Aware Energy-Efficient Workload Allocation in Geo Distributed Cloud Environment

The proliferation of cloud computing relied on the virtualization of the compute and storage resources and provisioning them dynamically according to users’ needs on a pay-per-use model. Massive cloud providers have geo-distributed cloud data centers to ensure service reliability, availability and satisfy user’s need. Therefore, cloud management systems are necessary to increase the profit of cloud providers and to improve the quality-of service demanded by users. This paper focuses on an energy-efficient method to solve the problem of allocating data-intensive workloads in geographically distributed data centers. The workload’s tasks are characterized by large data transfer times than their execution times. The problem formulated as a nonlinear programming optimization problem. Then, to find an optimal solution to the problem, meta-heuristic genetic algorithm is proposed. The designed heuristic takes into account the cost of the data transfer time from the storage location to the compute servers as well as the workload makespan on the available hosts. Extensive simulations using the CloudSim simulator are conducted to evaluate the efficacy of the proposed allocation method and how it performs with respect to other methods in the literature. Our results show significant enhancements in energy consumption while respecting the user’s QoS.

Generating Fine-Grain Multithreaded Applications Using a Multigrain Approach

The recent evolution in hardware landscape, aimed at producing high-performance computing systems capable of reaching extreme-scale performance, has reignited the interest in fine-grain multithreading, particularly at the intranode level. Indeed, popular parallel programming environments, such as OpenMP, which features a simple interface for the parallelization of programs, are now incorporating fine-grain constructs. However, since coarse-grain directives are still heavily used, the OpenMP runtime is forced to support both coarse- and fine-grain models of execution, potentially reducing the advantages obtained when executing an application in a fully fine-grain environment. To evaluate the type of applications that benefit from executing in a unified fine-grain program execution model, this article presents a multigrain parallel programming environment for the generation of fine-grain multithreaded applications from programs featuring OpenMP’s API, allowing OpenMP programs to be run on top of a fine-grain event-driven program execution model. Experimental results with five scientific benchmarks show that fine-grain applications, generated by and run on our environment with two runtimes implementing a fine-grain event-driven program execution model, are competitive and can outperform their OpenMP counterparts, especially for data-intensive workloads with irregular and dynamic parallelism, reaching speedups as high as 2.6× for Graph500 and 51× for NAS Data Cube.

The optimization for recurring queries in big data analysis system with MapReduce

As data-intensive cluster computing systems like MapReduce grow in popularity, there is a strong need to promote the efficiency. Recurring queries, repeatedly being executed for long periods of time on rapidly evolving data-intensive workloads, have become a bedrock component in big data analytic applications. Consequently, this paper presents optimization strategies for recurring queries for big data analysis. Firstly, it analyzes the impact of recurring queries efficiency by MapReduce recurring queries model. Secondly, it proposes the MapReduce consistent window slice algorithm, which can not only create more opportunities for reuse of recurring queries, but also greatly reduce redundant data while loading input data by the fine-grained scheduling. Thirdly, in terms of data scheduling, it designs the MapReduce late scheduling strategy that improve data processing and optimize computation resource scheduling in MapReduce cluster. Finally, it constructs the efficient data reuse execution plans by MapReduce recurring queries reuse strategy. The experimental results on a variety of workloads show that the algorithms outperform the state-of-the-art approaches.

Adaptive hybrid storage systems leveraging SSDs and HDDs in HPC cloud environments

Cloud computing should inherently support various types of data-intensive workloads with different storage access patterns. This makes a high-performance storage system in the Cloud an important component. Emerging flash device technologies such as solid state drives (SSDs) are a viable choice for building high performance computing (HPC) cloud storage systems to address more fine-grained data access patterns. However, the bit-per-dollar SSD price is still higher than the prices of HDDs. This study proposes an optimized progressive file layout (PFL) method to leverage the advantages of SSDs in a parallel file system such as Lustre so that small file I/O performance can be significantly improved. A PFL can dynamically adjust chunk sizes and stripe patterns according to various I/O traffics. Extensive experimental results show that this approach (i.e. building a hybrid storage system based on a combination of SSDs and HDDs) can actually achieve balanced throughput over mixed I/O workloads consisting of large and small file access patterns.

Performance-Monitoring-Based Traffic-Aware Virtual Machine Deployment on NUMA Systems

Virtualization technology enables multiple virtual machines (VMs) to share a single physical server. Commercial servers increasingly use the nonuniform memory access (NUMA) architecture due to its scalable memory performance. However, multiple VMs running on a NUMA physical server will cause performance overheads such as remote memory access latency and shared microarchitectural resource contention, which makes the VM performance less efficient and stable. These performance overheads are mainly caused by memory traffic from data-intensive workloads. In this paper, we propose a traffic-aware VM optimization (TAVO) scheme on NUMA systems. Based on the performance monitoring of the data traffic and CPU/memory resource usages in the system, TAVO addresses VM memory access locality and shared resource contention problems via automatic VM initial placement and NUMA-aware VM online scheduling. Our experimental results show that TAVO improves VM performance in terms of benchmark runtime by up to 22.6% compared with the default KVM CFS scheduler. TAVO also achieves a much stable performance with benchmark's average runtime variation under 3%.

하둡 기반 대규모 작업 배치 및 처리 기술 설계

This paper presents a MOHA(Many-Task Computing on Hadoop) framework which aims to effectively apply the Many-Task Computing(MTC) technologies originally developed for high-performance processing of many tasks, to the existing Big Data processing platform Hadoop. We present basic concepts, motivation, preliminary results of PoC based on distributed message queue, and future research directions of MOHA. MTC applications may have relatively low I/O requirements per task. However, a very large number of tasks should be efficiently processed with potentially heavy inter-communications based on files. Therefore, MTC applications can show another pattern of data-intensive workloads compared to existing Hadoop applications, typically based on relatively large data block sizes. Through an effective convergence of MTC and Big Data technologies, we can introduce a new MOHA framework which can support the large-scale scientific applications along with the Hadoop ecosystem, which is evolving into a multi-application platform.

Feedback Autonomic Provisioning for Guaranteeing Performance in MapReduce Systems

Companies have a fast growing amounts of data to process and store, a data explosion is happening next to us. Currently one of the most common approaches to treat these vast data quantities are based on the MapReduce parallel programming paradigm. While its use is widespread in the industry, ensuring performance constraints, while at the same time minimizing costs, still provides considerable challenges. We propose a coarse grained control theoretical approach, based on techniques that have already proved their usefulness in the control community. We introduce the first algorithm to create dynamic models for Big Data MapReduce systems, running a concurrent workload. Furthermore, we identify two important control use cases: relaxed performance—minimal resource and strict performance. For the first case we develop two feedback control mechanism. A classical feedback controller and an even-based feedback, that minimises the number of cluster reconfigurations as well. Moreover, to address strict performance requirements a feedforward predictive controller that efficiently suppresses the effects of large workload size variations is developed. All the controllers are validated online in a benchmark running in a real 60 node MapReduce cluster, using a data intensive Business Intelligence workload. Our experiments demonstrate the success of the control strategies employed in assuring service time constraints.

Resistive Ternary Content Addressable Memory Systems for Data-Intensive Computing

Power dissipation and memory bandwidth are significant performance bottlenecks in virtually all computer systems. Associative computing with ternary content addressable memory (TCAM) holds the potential to address both problems in a wide range of data intensive workloads. Power dissipation is reduced by eliminating instruction processing and data movement overheads present in a purely RAM-based system. Bandwidth demand is lowered by processing data directly on the TCAM chip, thereby decreasing off-chip traffic. Unfortunately, existing SRAM-based TCAM cells are more than 90 times larger than a DRAM cell at the same technology node, which limits the capacity of commercially available TCAMs to a few megabytes. This article examines the integration of gigascale TCAM systems based on resistive memories within a general-purpose computing platform. TCAM density is improved by novel, resistive memory cells that exploit phase change and spin-toque transfer magnetoresistive RAM technologies. TCAM chips are organized into a DDR3-compatible DIMM and are accessed through a software library with zero modifications to the processor or the motherboard. The proposed TCAM systems achieve average speedups of 3 to 4.5 times and average energy reductions of 5 to 8 times as compared to a conventional RAM-based system.

Codesign Lessons Learned from Implementing Graph Matching on Multithreaded Architectures

Executing irregular, data-intensive workloads on multithreaded architectures can result in performance losses and scalability problems. Codesigning algorithms and architectures can realize high performance on irregular applications. A codesign study reveals four key lessons learned from implementing matching algorithms on various platforms

PIM-enabled instructions

Processing-in-memory (PIM) is rapidly rising as a viable solution for the memory wall crisis, rebounding from its unsuccessful attempts in 1990s due to practicality concerns, which are alleviated with recent advances in 3D stacking technologies. However, it is still challenging to integrate the PIM architectures with existing systems in a seamless manner due to two common characteristics: unconventional programming models for in-memory computation units and lack of ability to utilize large on-chip caches. In this paper, we propose a new PIM architecture that (1) does not change the existing sequential programming models and (2) automatically decides whether to execute PIM operations in memory or processors depending on the locality of data. The key idea is to implement simple in-memory computation using compute-capable memory commands and use specialized instructions, which we call PIM-enabled instructions, to invoke in-memory computation. This allows PIM operations to be interoperable with existing programming models, cache coherence protocols, and virtual memory mechanisms with no modification. In addition, we introduce a simple hardware structure that monitors the locality of data accessed by a PIM-enabled instruction at runtime to adaptively execute the instruction at the host processor (instead of in memory) when the instruction can benefit from large on-chip caches. Consequently, our architecture provides the illusion that PIM operations are executed as if they were host processor instructions. We provide a case study of how ten emerging data-intensive workloads can benefit from our new PIM abstraction and its hardware implementation. Evaluations show that our architecture significantly improves system performance and, more importantly, combines the best parts of conventional and PIM architectures by adapting to data locality of applications.

Design, Implementation, and Evaluation of a NUMA-Aware Cache for iSCSI Storage Servers

In an iSCSI based storage area network, target hosts serve concurrent I/O requests from initiators to achieve both high throughput and low latency. Existing iSCSI leverages the OS page cache to ensure data sharing and reuse. However, the non-uniform memory access (NUMA) architecture introduces another dimension of complexity, i.e., asymmetric memory access in multi-core and many-core platforms. Within a NUMA platform, an iSCSI target often dispatches an access request with a cache hit to an I/O thread remote to cached data, and thus cannot fully utilize multi-core systems. We encounter this problem in the context of ultra high-speed data transfer between two iSCSI storage systems, during which inferior NUMA remote memory access lags behind available high network bandwidth, and thereby becomes a bottleneck of the entire end-to-end data transfer path. We design a NUMA-aware cache mechanism to align cache memory with local NUMA nodes and threads, and then schedule I/O requests to those threads that are local to the data being accessed. This NUMA-aware solution results in lower access latency and higher system throughput. We implement a cache system within the Linux SCSI target framework, and evaluated it on our NUMA-based iSCSI testbed. Experimental results show the NUMA-aware cache can significantly improve the performance of iSCSI as measured by several benchmark tools and confirm its viability in data intensive applications and real-life workloads.

Improving Update-Intensive Workloads on Flash Disks through Exploiting Multi-Chip Parallelism

Solid state drives (SSDs), or flash disks have been considered as ideal storage for various data-intensive workloads, because of the low random access latency and the intra-disk multi-chip parallelism. However, due to inherent nature of flash memories, update-intensive workloads cause the flash disk fragmented, and trigger costly internal activities such as cleaning and wear leveling. We use database transaction processing as a motivating update-intensive workload. Our studies based on a flash disk simulator as well as flash disks show that, these activities result in significant overhead to the I/O response time and system throughput. To resolve the impact of internal activities, we propose dynamic page replications to exploit the multi-chip parallelism on the flash disk. Specifically, we replicate the frequently blocked data pages to improve the data availability even when internal activities block the request. To reduce the overhead of replications, we take advantage of the idle periods in the flash chips for the I/O operations by writes to replicas or reads from replicas, and further develop a prediction model for the decisions on those I/O operations to minimize the interference to normal I/O operations. We evaluate our techniques with three public transaction benchmarks in the simulator as well as on the real flash disks. Our results demonstrate the effectiveness of our replication management on improving I/O response time and system throughput.

Collective input/output under memory constraints

Compared with current high-performance computing (HPC) systems, exascale systems are expected to have much less memory per node, which can significantly reduce necessary collective input/output (I/O) performance. In this study, we introduce a memory-conscious collective I/O strategy that takes into account memory capacity and bandwidth constraints. The new strategy restricts aggregation data traffic within disjointed subgroups, coordinates I/O accesses in intranode and internode layers, and determines I/O aggregators at run time considering memory consumption among processes. We have prototyped the design and evaluated it with commonly used benchmarks to verify its potential. The evaluation results demonstrate that this strategy holds promise in mitigating the memory pressure, alleviating the contention for memory bandwidth, and improving the I/O performance for projected extreme-scale systems. Given the importance of supporting increasingly data-intensive workloads and projected memory constraints on increasingly larger scale HPC systems, this new memory-conscious collective I/O can have a significant positive impact on scientific discovery productivity.

Domain-Specific Many-core Computing using Spin-based Memory

Spin-based devices have shown great potential in enabling high-density, energy-efficient memory and are therefore, considered highly promising for the design of future computing platforms. While the impact of spin-based devices on general-purpose computing platforms has been studied, they are yet to be explored in the context of domain-specific computing, where the characteristics of the devices can be matched to application characteristics through architectural customization, so as to maximize the benefits. We present the design and evaluation of a many-core domain-specific processor for the emerging application domains of Recognition and Mining (RM) using spin-based memories. The domain-specific processor has a two-level on-chip memory hierarchy consisting of a streaming access first-level memory and a random access second-level memory. Based on the memory access characteristics, we suggest the use of Domain Wall Memory (DWM) and Spin Transfer Torque Magnetic RAM (STT-MRAM) to realize the first and second levels, respectively. We develop architectural models of DWM and STT-MRAM, and use them to evaluate the proposed design and explore various architectural tradeoffs in the domain-specific processor. We evaluate the proposed design by comparing it to a CMOS-based baseline at the same technology node. For three representative RM algorithms (support vector machine, k-means clustering, and generalized learning vector quantization), the spin-memory-based design achieves an energy-delay product improvement of 1.5 ×-4 × over the CMOS baseline at iso-area. Our results suggest that spin-based memory technologies can enable significant improvements in energy efficiency and performance for highly parallel, data-intensive workloads. Our study also highlights the importance of synergistic architectural exploration along with the use of emerging devices rather than simply considering them as drop-in replacements.

Correcting vibration-induced performance degradation in enterprise servers

Server fan subsystems are power-hungry and generate vibrations, degrading the performance of data-intensive workloads and inflating the uptime electric bills of cost-sensitive datacenters. In this paper, we demonstrate a systematic server measurement methodology to isolate different types of vibrations and quantify their effect on hard disks. We introduce a thermal and cooling management policy that mitigates vibrational effects workload scheduling and fan control, and study the benefits of a hybrid storage array with solid-state drives (SSDs) that are impervious to vibrations. We achieve performance improvements of up to 73% and energy savings of up to 76% over the state of the art, while meeting thermal constraints and improving the system's resilience to both internal and external vibrations.