Daisy Chain Structure Research Articles

Foldaxane-Based Switchable [c2]Daisy Chains.

Artificial molecular muscles are highly attractive in the field of molecular machinery due to their unique properties of contraction and stretching motion. However, the synthesis of molecular muscles poses formidable challenges as it is hindered by undesirable yields and poor selectivity. Herein, we present a procedure for the dynamic assembly of foldaxane-based [c2]daisy chains, wherein the hermaphroditic sequences consisting of aromatic helices and peptide rods are interlocked through inter-strand hydrogen-bonding interactions. The binding complementarity facilitates a selective and efficient assembly of [c2]daisy chain structures, inhibiting the creation of by-products. Introducing multiple recognition sites confers the system with contraction and stretching motion actuated by chemical stimuli. The rate of this muscle-like motion is calculated to be 0.8 s-1, which is 107 times faster than that of complex dissociation.

Foldaxane‐Based Switchable [c2]Daisy Chains

AbstractArtificial molecular muscles are highly attractive in the field of molecular machinery due to their unique properties of contraction and stretching motion. However, the synthesis of molecular muscles poses formidable challenges as it is hindered by undesirable yields and poor selectivity. Herein, we present a procedure for the dynamic assembly of foldaxane‐based [c2]daisy chains, wherein the hermaphroditic sequences consisting of aromatic helices and peptide rods are interlocked through inter‐strand hydrogen‐bonding interactions. The binding complementarity facilitates a selective and efficient assembly of [c2]daisy chain structures, inhibiting the creation of by‐products. Introducing multiple recognition sites confers the system with contraction and stretching motion actuated by chemical stimuli. The rate of this muscle‐like motion is calculated to be 0.8 s−1, which is 107 times faster than that of complex dissociation.

Electronics design for a muon imaging system using triangular plastic scintillators with WLS fiber readouts

Muon imaging technology has developed rapidly over the past decades with extensive applications. In many cases, plastic scintillator detectors are preferred because of their high cost performance, ease of processing and robustness in harsh environments. To reduce imaging time and improve imaging quality, detectors tend to have large areas and high position resolutions. The challenge to the electronics for such detectors is to maintain the scale of electronics acceptable while improving the high position resolution of the detector. In this paper, the basic detector unit is a triangular strip of plastic scintillator, each embedded with two wavelength-shifting (WLS) fibers read out by the silicon photomultipliers (SiPMs). Since the hit position of muon on the detector is determined by the splitting ratio of the scintillation light on two adjacent scintillator strips, it is necessary the readout electronics has high linearity and low noise. The possibility of the electronics channel multiplexing on the same detector plane is fully explored so that four WLS fibers can be read out by one SiPM realizing 2:1 readout channel compression. Furthermore, since multiple electronics modules are connected by a daisy chain structure, the electronics system is very scalable with its data acquisition system (DAQ) independent of detector size. In addition to detailing the position encoding readout scheme, the design of electronics module and the DAQ system, the electronics system has been implemented and applied to a prototype detector for performance evaluation. Using scintillator strips with 11 mm pitch size, the position resolution of the detector reaches 1.49 mm, which demonstrates that the designed electronics is suitable for the new detector structure, and the combination of the two has a good application prospect in muon imaging.

Flip chip bonding on stretchable printed substrates; the effects of stretchable material and chip encapsulation

Stretchable printed electronics have recently opened up new opportunities and applications, including soft robotics, electronic skins, human-machine interfaces, and healthcare monitoring. Stretchable hybrid systems (SHS) leverage the benefits of low-cost fabrication of printed electronics with high-performance silicon technologies. However, direct integration of silicon-based devices on conventional stretchable substrates such as thermoplastic polyurethane (TPU) and polydimethylsiloxane (PDMS) is extremely challenging due to their restricted low-temperature processing. In this study, a recently developed thermoset, stretchable substrate (BeyolexTM) with superior thermal and mechanical properties was employed to realize SHS via direct flip chip bonding. Here, ultra-thin chips (UTC) with a fine-pitch, daisy-chain structure was flip-chip bonded by using anisotropic conductive adhesives, while the complementary circuitry was facilitated via screen-printed, stretchable silver tracks. The bonded samples successfully passed reliability assessments after being subjected to cyclic 30% stretch tests for 200 cycles. The potential benefits of chip encapsulation after integration with the stretchable substrate to withstand larger strains were demonstrated by both mechanical simulation and experimental results.

Low-temperature, short-time, wafer-level bonding for Cu/Sn/Cu solid-state-diffusion interconnect in 3-D integration

In this paper, Cu/Sn/Cu solid-state diffusion (SSD) under low temperature is proposed and investigated for three-dimensional (3-D) integration. Cu and Sn films were deposited by high-efficiency and low-cost physical vapor deposition to fabricate 40-μm-pitch daisy-chain structures. Subsequently, the Cu bump surface was treated with Ar (5% H2) plasma. The Cu/Sn/Cu structure was bonded face to face at 200 °C for 15 min The interfacial composition of the as-bonded dies comprised five layers, Cu/Cu3Sn/Cu6Sn5/Cu3Sn/Cu, with no Sn remaining and no overflow. After annealing at 200 °C for 15 min under N2 atmosphere, as the Cu6Sn5 completely transformed into Cu3Sn, the microstructure changed to stable three layers: Cu/Cu3Sn/Cu. Additionally, the average bonding shear strength reached 27.0 MPa, which is higher than that for conventional Cu/Sn SSD bonding. The measured bonding resistance value was maintained at the theoretical value. Moreover, the parabolic growth constant of Cu3Sn reached 1.86 × 10−15 m2/s. Our study demonstrates the feasibility of using Cu/Sn/Cu SSD for low-temperature, short-time, wafer-level bonding.

Decentralized Phase Shedding with Low Power Mode for Multiphase Converter

With a multiphase converter, the phase-shedding function dedicated to maximizing the power efficiency, in a manner that is dependent on the load current, is always provided by a centralized controller that induces a Single Point of Failure (SPOF). The objective of this study is to obtain a decentralized control approach to implement this function by removing any SPOF. The method consists of using identical local controllers, each associated with a converter phase, that communicate with each other in a daisy-chain structure. Instead of measuring the global output current to determine the optimal number of active phases required, each local controller measures its own leg current and takes a local decision based on threshold crossing management and inter-controller communications. Functional simulations are carried out on a 5-leg 12 V/1.2 V 60 W multiphase converter supplying a modern microcontroller. They demonstrate that the number of active phases is well adjusted, in a dynamic manner, depending on the load current level. Specific events such as load current inrush or the start-up sequence are analyzed to guarantee optimal transient responses. A maximum power efficiency tracking ability is also demonstrated. Finally, it is shown that this control strategy allows phase shedding to be implemented using as many phases as desired, in a modular manner, thereby avoiding any centralized processing.

Formation of the various types of daisy chains constructed by modified cyclodextrin depending on the bond angle of the modified part linked to α-cyclodextrin

ABSTRACT Inclusion complexes (daisy chains) have been widely used in supramolecular chemistry and molecular machines. To develop new molecular machines, it is important to control the inclusion complex structures constructed using modified cyclodextrins (mCDs). To investigate the influence of the bond angle of the modified part linked to the CD on the inclusion complex structures, coarse-grained Brownian dynamics (BD) simulations were conducted. During the simulations, we observed the various types of inclusion complex structures (acyclic, cyclic, branched acyclic, and branched cyclic daisy chains). For the modified part linked to the outer direction of the CD, daisy chains of various sizes were constructed. However, for the modified part linked to the inner direction of the CD, cyclic dimers ([c2] daisy chain) were mainly constructed. To elucidate the formation difference in the daisy chain structures, depending on the bond angle of the modified part linked to the CD, the free energies of the [c2] daisy chain structures were estimated using the histogram reweighting method. It was observed that the formation of the various types of daisy chain structures was determined by the stability of the [c2] daisy chain.

High-density low-loss millimeter-wave package interconnects with the impact of dielectric-material surface roughness

Heterogeneous package integration and chiplet approaches are the key technology to enable next-generation high performance small form-factor packages for emerging applications. Millimeter-wave packaging for fifth-generation and upcoming sixth-generation platforms also need to meet the high-density low signal-loss interconnect specifications utilizing advanced conductor and dielectric materials. This article presents the comparison of the liquid-based photoimageable dielectric (PID) and dry-film dielectric materials in terms of interconnect path losses that are critical in mm-wave frequency bands. The conductor loss being more dominant in the frequency bands and in thinner dielectric structures, we assess daisy chains and microstrip lines on 15-μm dielectric by measuring the S-parameters to quantify the impact of the surface roughness at around 28 GHz. Measured results from the daisy chain and microstrip line structures exhibit that the smooth surface of the liquid-based PID (3 nm) leads to 8%–32% lower signal loss in the dB scale than the 325-nm rough dry-film dielectric. The study provides comprehensive experimental results that the different material forms with various surface roughness largely impact the package-level interconnect loss.

Embedding of Ultrathin Chips in Highly Flexible, Photosensitive Solder Mask Resist.

This work presents an embedding process for ultrathin silicon chips in mechanically flexible solder mask resist and their electrical contacting by inkjet printing. Photosensitive solder mask resist is applied by conformal spray coating onto epoxy bonded ultrathin chips with a daisy chain layout. The contact pads are opened by photolithography using UV direct light exposure. Circular and rectangular openings of 90 µm and 130 µm diameter, respectively, edge length are realized. Commercial inks containing nanoparticular silver and gold are inkjet printed to form conductive tracks between daisy chain structures. Different numbers of ink layers are applied. The track resistances are characterized by needle probing. Silver ink shows low resistances only for multiple layers and 90 µm openings, while gold ink exhibits low resistances in the single-digit Ω-range for minimum two printed layers.

Flip Chip integration of ultra-thinned dies in low-cost flexible printed electronics; the effects of die thickness, encapsulation and conductive adhesives

As the demand for flexible hybrid electronics has increased extensively e.g. for the internet of things (IoT), electronic skin and wearables applications, the implementation of devices based on low-cost materials such as PET, paper, and unpackaged bare dies have become crucial for economical mass production. To facilitate flexibility for instance in wearables, the rigid silicon-based components are also deemed to become ultra-thin, which raises major challenges in terms of handling and reliable integration. In this paper, the hybrid integration of ultra-thin dies on PET and paper-based printed substrates is investigated. Silicon dies with different thicknesses from 10 to 50 μm with an internal daisy-chain structure were made and flip-chip bonded to screen-printed substrates. The bonding was conducted by using two types of anisotropic conductive adhesives, i.e. anisotropic conductive films (ACF) and anisotropic conductive paste (ACP). The effect of die encapsulation on the reliability of the assembly was also assessed by employing a protective foil. For reliability analysis, a cyclic bending test was carried out to identify the failure cycle. The successful integration of ultra-thin chip on the low-cost printed flexible substrate was obtained by optimizing the bonding parameters with both ACF and ACP. It was revealed that in flexible hybrid electronics; the thinner the die, the higher is the reliability, as the thinner dies promise superior flexibility, and can withstand higher bending stresses. Moreover, it was found that encapsulation of the thin die in a foil dramatically increases the long-term reliability of the bonded chip.

Nb-based superconducting silicon interconnect fabric for cryogenic electronics

Quantum computing for real world applications requires large arrays of qubits. This requires advanced integration technologies. In this work, we propose a simple integration method with fine interconnect pitch (10 μm) and close spacing that can overcome the large input and output (I/O) and high wiring level requirements of very large scale of quantum circuits. A system-on-wafer (SoW) packaging concept called superconducting silicon interconnect fabric (superconducting-IF), based on silicon interconnect fabric (Si-IF), is proposed, with the help of a Au interlayer technology onto the superconducting-IF. The fine-pitch and die-to-wafer-scale Au interlayer is the first demonstration of direct metal–metal thermocompression bonding (TCB) that is optimized for superconducting applications without the use of solders. The developed Au interlayer integration technology is demonstrated to be Josephson-junction-compatible (<150 °C), mechanically robust (>30 MPa), and electrically reliable down to 2 K. The mechanical strength of the Au interlayer integration method is optimized through shear tests with a shear force around 150 N on 2 × 2 mm2 dies. The transition temperature (Tc) of Nb, which is at 9 K, is experimentally verified to be unchanged after each fabrication process. Electrical and temperature cycling measurements on over 20 bonded dies of large-pitch Kelvin structures as well as fine-pitch daisy chain structures reveal reliable connections in the low-temperature regime. This work pushes quantum computing a step closer to realize its potential through 3D integration of a very large scale of quantum circuits with a high density of I/O (>10 000 per mm2) as well as high wiring capability and without introducing lossy amorphous dielectrics.

Wafer-level direct bonding of optimized superconducting NbN for 3D chip integration

3D integration has well-developed for traditional CMOS technology operating at room temperature, but few studies have been performed for cryogenic applications such as quantum computers. In this paper, a wafer-to-wafer bonding of superconductive joints based on niobium nitride (NbN) is performed to demonstrate the possibility of 3D integration of superconducting chips. The NbN thin films are deposited by magnetron sputtering. Its high critical temperature (15.2 K) is achieved by optimizing the sputtering recipe in terms of N2 flow rate and discharge voltage. Wafer-level bumping is bonded by the thermo-compression method. The sheet resistance of the thin film and the contact resistance of the joints are measured by the Greek-cross (4-point Kelvin method) and daisy chain structures at cryogenic temperature, respectively. Direct-bonding wafers with NbN superconductive joints avoid using adhesive layers and the bonding interface could still present superconducting electrical connections in a cryogenic environment above 4 K, which will allow us to use a smaller and high-cooling power cryostat. The contribution of this work could lead to the fabrication of multi-layered superconducting chip that operates beneficially in cryogenic temperature, which is essential in building scalable quantum processors.

Cyclodextrin-Based [c2]Daisy Chain Rotaxane Insulating Two Diarylacetylene Cores.

A [c2]daisy chain rotaxane with two diarylacetylene cores was efficiently synthesized in 53 % yield by capping a C2 -symmetric pseudo[2]rotaxane composed of two diarylacetylene-substituted permethylated α-cyclodextrins (PM α-CDs) with aniline stoppers. The maximum absorption wavelength of the [c2]daisy chain rotaxane remained almost unchanged in various solvents, unlike that of the stoppered monomer, indicating that the two independent diarylacetylene cores were insulated from the external environment by the PM α-CDs. Furthermore, the [c2]daisy chain rotaxane exhibited fluorescence emission derived from both diarylacetylene monomers and the excimer, which implies that the [c2]daisy chain structure can undergo contraction and extension. This is the first demonstration of a system in which excimer formation between two π-conjugated molecules within an isolated space can be controlled by the unique motion of a [c2]daisy chain rotaxane.

Thermosonic fine-pitch flipchip bonding of silicon chips on screen printed paper and PET substrates

In light of the necessity to introduce new techniques for hybrid integration of semiconductor dies on temperature and pressure-sensitive substrates, the feasibility of employing thermosonic flipchip bonding on screen printed paper and PET substrates was the objective of this study. Gold-bumped silicon test chips with internal daisy chain structures were bonded to the corresponding screen printed silver pads on PET and paper substrates by using both thermocompression and thermosonic techniques. The contact resistance of the interconnecting bumps and the die-shear strength of the resulting assembly were evaluated and the optimized bonding conditions on paper and PET substrates were identified. It was proposed that by the introduction of ultrasonic energy, diffusion bonding between the silver flakes and the gold bump were facilitated, whereas in the thermocompression bonding the mechanical interlocking was the main bonding mechanism. As a result, thermosonic flipchip bonding could be conducted in a much shorter time (milliseconds) and at lower bonding pressure (5 N) and temperature (100 °C). It was also found that for screen printed flexible substrates, thermosonic flipchip bonding at lower ultrasonic energy levels is preferential, while the possible bonding-induced damages to the pads and substrates can be avoided. Conclusively, It was proposed that thermosonic flip chip bonding can be regarded as a promising solution for fine-pitch system on paper (SOP) and system on PET (SOPE) technologies.

Modeling and Research on Power System of Distributed Sensor Networks for Long Streamers in Marine Seismic Exploration.

The electric power system plays an important role in sensor networks. In the marine seismic exploration streamer system (MSESS), an underwater power system transmits high-voltage direct current to all nodes in the streamer through a daisy chain structure. As offshore oil exploration develops toward deep water, it is necessary to study long streamers with large-scale sensor networks for deep water exploration. When the length of a streamer is increased to a certain value, the output current of the power supply increases sharply. This results in the activation of the overcurrent protection and the power supply shuts down. This paper puts forward an accurate model for an underwater power system applied to MSESS. Using the Newton iteration algorithm and a reverse algorithm, equations established by the model are solved and laboratory test results are used to verify the accuracy of the model. Based on simulation and analysis of the model, we explain why the power system crashes when the streamer is too long. Software that can quickly calculate the maximum number of nodes (the maximum length with which the system works normally) is developed and it is significant for the design of MSESS. The method of research could also be applied to relevant work such as large-scale sensor networks with daisy-chaining power supply in land seismic exploration.

Electrical Interconnects Fabricated From Biodegradable Conductive Polymer Composites.

This study presents the development and characterization of biodegradable electrical interconnects for transient implantable medical devices. The interconnects comprised micropatterned biodegradable conductive polymer composites, which were developed using iron (Fe) microparticles as the conductive filler and polycaprolactone (PCL) as the insulating matrix. The electrical properties of the composites were investigated under various degradation conditions. Electrical percolation was observed at 17% iron volume fraction, but higher volume fractions exhibited more stable electrical resistivity throughout the time course of physiological degradation. The electrical resistivity of 40%vf Fe-PCL composites increased tenfold in an emulated packaged environment under degradation. Biodegradable electrical interconnects based on 40%vf Fe-PCL composites were successfully micropatterned in daisy chain structures, illustrating the process compatibility of Fe-PCL composites for interconnect applications. The electrical resistance of the packaged daisy chain structures exhibited a reasonable increase under degradation. An electrical lifetime of over 5 days was also achieved. System integration with a commercial humidity sensor and analytical calculations supporting other application scenarios confirmed the feasibility of micropatterned Fe-PCL interconnects for use in implantable electrical systems.

Cu–Cu Bonding in Ambient Environment by Ar/N2 Plasma Surface Activation and Its Characterization

Ar/N2 plasma surface activation in ambient environment for Cu–Cu bonding has been performed and characterized. Cu–Cu bonding occurs at room temperature and under normal atmospheric conditions. Postbonding annealing is performed at 300 °C and below to control the overall thermal budget. Shear strength and hermeticity property of samples with varying annealing temperature are investigated. Samples annealed at 250 °C demonstrate the highest average shear strength of 20.3 MPa and the lowest average helium leak rate of $8.7 \times 10^{-9}\,\,\text {atm}\cdot \text {cc}$ /s. Daisy chain structures are used to examine the electrical property of sample bonded at 300 °C, and the temperature cycling tests from −40 °C to 125 °C for 1000 cycles have been performed for the reliability assessment. It is observed that the dies are well-bonded and intact after 1000 cycles even though the exposed Cu surface is heavily oxidized.

Notice of Retraction: Defects Identification in a TSV Daisy-Chain Structure by a Machine Learning Approach

This work applies the paradigm of the machine learning to the identification of type and position of short-and open-circuit defects along a three-dimensional daisy-chain signal channel in presence of through silicon vias. A suitable artificial neural network is designed, trained, and used for this task. This contribution discusses the advantages and limitations of this approach quantifying the differences among the real and estimated positions of the defects.

Investigation of low temperature bonding process using indium bumps

Hybrid pixel detector modules are state of the art components of X-ray cameras in synchrotron radiation experiments. Temperature-sensitive, high-Z sensor materials like Germanium, Cadmium-Telluride, Cadmium-Zinc-Telluride and MCT-sensors require an especially low temperature bonding process. The investigation presented in this paper focuses on a low temperature compression bonding process using a ductile bump material, like indium, and a dedicated UBM surface that is able to form intermetallic compounds with this bump metal. The test samples are based on a test chip design with the size of the MEDIPIX3 readout chip and an identical number of bumps, arranged in a 256 × 256 bump matrix with 55 μm pitch in X- and Y-directions. In addition to the indium bumped test chip, two typical UBM-pad configurations were investigated on the corresponding interconnect side: a pad-defined electroplated Ni-Au-UBM and a passivation opening-defined, PVD-deposited NiV-Au pad. Daisy chain structures, 4-Point-probe resistance measurement structures and isolation test structures were implemented to characterize the influence of bonding pressure, bonding temperature and dwell time of bonding pressure on the electrical interconnection resistance. Good bonding results and a corresponding minimum electrical resistance of daisy chains and individual interconnects were achieved at temperatures of 80̂C and 100̂C. A minimum bonding pressure of 3.2 MPa was necessary to achieve reliable bonding results. Daisy chain failures occurred especially in the corner of the chips. After electrical characterization, pull tests were performed to investigate the corresponding bonding area. Pull test results showed a larger bonding area for the pad-defined, electroplated UBM pad configuration in comparison to the passivation opening defined bonding pad.

New Photosensitive Dielectric Material for High-Density RDL with Ultra-Small Photo-Vias and High Reliability

Abstract This paper presents an advanced ultra-thin photosensitive dielectric Film (PDM) newly developed with high resolution, low CTE and low residual stress for next-generation high-density redistribution layer (RDL), 2.5D interposer, and high-density fan-out package applications. For high-density RDL, photosensitive dielectric materials need to have low CTE to achieve high package reliability. The CTE of the material is 30–35ppm/K. While maintaining the low CTE, we successfully demonstrated the minimum micro-via diameter of 3um in the 5um thickness. Curing temperature of the PDM is 180°C × 60 min. which is lower than most of the advanced dielectric materials which currently used in industry. Low-temperature curing process results in low stress. We have calculated residual stress in the cured PDM from a test result of warpage measurement on 4 inch wafer. As another benefit of the PDM material in curing process, the PDM can be cured in air oven. Most of advanced photo dielectric materials need to cure in N2 oven due to prevent an oxidation of the material. We have demonstrated copper traces of 2um lines and spaced on the PDM by using semi-additive process (SAP) with sputtered Ti/Cu seed layer. Thanks to the low CTE and low residual stress due to the low-temperature curing, it passed temperature cycle test (1,000 cycles) with daisy chain structure which has 400 vias in the structure. It can be concluded that the newly developed PDM is a promising dielectric material for highly reliable high-density redistribution layer (RDL) for 2.5D interposers and fan-out wafer level package applications.