Cut-through Switching Research Articles

End-to-End Latency Prediction for General-Topology Cut-Through Switching Networks

Low latency networking is gaining attention to support futuristic network applications like the Tactile Internet with stringent end-to-end latency requirements. In realizing the vision, cut-through (CT) switching is believed to be a promising solution to significantly reduce the latency of today’s store-and-forward switching, by splitting a packet into smaller chunks called flits and forwarding them concurrently through input and output ports of a switch. Nevertheless, the end-to-end latency performance of CT switching has not been well studied in heterogeneous networks, which hinders its adoption to general-topology networks with heterogeneous links. To fill the gap, this paper proposes an end-to-end latency prediction model in a heterogeneous CT switching network, where the major challenge comes from the fact that a packet’s end-to-end latency relies on how and when its flits are forwarded at each switch while each flit is forwarded individually. As a result, traditional packet-based queueing models are not instantly applicable, and thus we construct a method to estimate per-hop queueing delay via M/G/c queueing approximation, based on which we predict end-to-end latency of a packet. Our extensive simulation results show that the proposed model achieves 3.98–6.05% 90th-percentile error in end-to-end latency prediction.

A novel reconfigurable router for QoS guarantees in real-time NoC-based MPSoCs

Abstract This paper presents a proposal and implementation of a multi-mode full-reconfigurable router for Network-on-Chip (NoC). First, the router supports a hybrid packet-switching architecture that is dynamically reconfigurable to exchange between wormhole and virtual cut-through switching schemes at run-time. Therefore, it reaches a higher average performance than wormhole switching, while decreasing the implementation cost in comparison with the virtual cut-through switching. Second, the router is equipped a Quality-of-Services (QoS)-driven arbiter. Therefore, the proposed solution not only guarantees the guaranteed-throughput service without reserving resources but also enhances the average performance for the best-effort service by using network resources efficiently based on the priority inheritance arbitration mechanism. Third, the router is enhanced with the dynamically deadline-aware rerouting mechanism. In contention situation, the router can configure the routing computation unit to reroute the packet to another path so as to reduce the waiting interval of the blocked packets. The router was designed at the Register Transfer Level and modeled using VHDL language and then synthesized with Xilinx Virtex-7 FPGA technology. The experimental results prove that the proposed router is reliable and can improve the average performance of different QoS loads significantly compared with the generic routers while the area and power overhead are acceptable.

Flit Scheduling for Cut-Through Switching: Towards Near-Zero End-to-End Latency

Achieving low end-to-end latency with high reliability is one of the key objectives for future mission-critical applications, like the Tactile Internet and real-time interactive Virtual/Augmented Reality (VR/AR). To serve the purpose, cut-through (CT) switching is a promising approach to significantly reduce the transmission delay of store-and-forward switching, via flit-ization of a packet and concurrent forwarding of the flits belonging to the same packet. CT switching, however, has been applied only to well-controlled scenarios like network-on-chip and data center networks, and hence flit scheduling in heterogeneous environments (e.g., the Internet and wide area network) has been given little attention. This paper tries to fill the gap to facilitate the adoption of CT switching in the general-purpose data networks. In particular, we first introduce a packet discarding technique that sheds the packet expected to violate its delay requirement and then propose two flit scheduling algorithms, f EDF (flit-based Earliest Deadline First) and f SPF (flit-based Shortest Processing-time First), aiming at enhancing both reliability and end-to-end latency. Considering packet delivery ratio (PDR) as a reliability metric, we performed extensive simulations to show that the proposed scheduling algorithms can enhance PDR by up to 30.11% (when the delay requirement is 7 ms) and the average end-to-end latency by up to 13.86% (when the delay requirement is 10 ms), against first-in first-out (FIFO) scheduling.

Automated Inter-Domain Cut-Through Switching for the Future Internet

As the deployment of software-defined networks increases, so does the manageability of local and wide area networks. Designing intelligent solutions that respond to traffic changes automatically will soon become a mandatory requirement in production networks. In this paper, we focus on designing an intelligent control plane for the MobilityFirst Future Internet architecture. This architecture proposes novel mechanisms to replace the Internet Protocol to better support content delivery and mobility, such as hop-by-hop transfer, storage-aware routing and separation of identifiers and network addresses. In earlier work, we have argued that these mechanisms can be bypassed for certain data flows. Indeed, when there is no mobility involved, it is more convenient to implement cut-through switching at lower layers to bypass the routing mechanisms. In this paper, we propose an inter-domain framework capable of cut-through switching in MobilityFirst. The proposed framework is capable of adding and removing flows from tunnels automatically. It is also capable of creating inter-domain tunnels based on flow behavior and inter-domain latency. Our implementation experiments show that the control plane delay can be reduced by 75% when using inter-domain tunnels. Furthermore, the results also show how our framework needs fewer messages than current protocols such as label distribution protocol to setup intra-domain and inter-domain tunnels.

Comparative Analysis of Stability to Induced Deadlocks for Computing Grids with Various Node Architectures

The classification and application of switching methods and their advantages and disadvantages are considered. A computing grid model was constructed in the form of a colored Petri net with a node, which implements cut-through packet switching. The model consists of packet switching nodes, traffic generators, and guns that form malicious traffic disguised as usual user traffic. The characteristics of the grid model are investigated under a workload with different intensities. The influence of malicious traffic such as “traffic duel” to the quality of service parameters of the grid is estimated. A comparative analysis of computing grid stability with nodes, which implement store-and-forward (SAF) and cut-through switching technologies, was conducted. It is shown that grid performance is approximately the same under workload, and under peak load the grid with a node implementing SAF packet transmission is more stable. The grid with nodes implementing SAF technology comes to a complete deadlock through an additional load, which is less than 10%. It is shown after detailed study that the traffic duel configuration does not affect the grid with cut-through nodes when increasing the workload up to peak load, at which the grid comes to a complete deadlock. The periodicity of execution of the guns, which generate malicious traffic, is determined by a random function with the Poisson distribution. The CPN Tools modeling system is used for constructing models and measuring characteristics. The grid performance and average packet delivery time are estimated under different variants of the grid load.

Global Round Robin: Efficient Routing With Cut-Through Switching in Fat-Tree Data Center Networks

Fat tree is a scalable and widely deployed data center network topology. In this paper, a novel framework for designing per-packet load-balanced routing algorithms in fat tree called global round robin (GRR) is proposed. Routing in fat tree consists of uprouting and downrouting. In uprouting, a packet is sent to a switch that is a common ancestor (CA) of the source (server) and the destination. In downrouting, the packet is sent from the CA switch to the destination. Assume that time is slotted and each slot can accommodate one packet. With GRR, in each slot, a connection configuration is formed by establishing an uprouting path from each server to a spine switch port such that no paths will cross each other. Packets are sent from sources to respective spine switches with cut-through switching. The connection configuration is updated in a round robin fashion such that in every $m$ slots, where $m$ is the number of spine switches, each server is connected to each spine switch exactly once. Since a CA does not need to be a spine switch, an improved GRR (IGRR) is then proposed to allow the nearest CA to intercept packets for downrouting. We prove that both GRR and IGRR can guarantee 100% throughput under a wide class of traffic. An analytical model is also constructed for studying their delay performance under uniform traffic. Finally, simulation results show that IGRR provides the best delay-throughput performance among all the existing per-packet load-balanced routing algorithms.

Performance evaluation of communication grids with cut-through switching nodes

For the performance evaluation of communication and computing rectangular grids of arbitrary size with a node that implements the cut-through packet switching technology, a model is constructed in the form of a reenterable colored Petri net. The grid model consists of three main parts: a grid structure model, a switching node model, and a terminal device model that generates a user’s traffic. The listed models are presented in a single copy, in accordance with the rules of reenterable models construction, the main parameters of the models are the grid topology, traffic intensity and packet processing time. The advantages of a reenterable model for the properties investigation and the design of complex systems are shown. Models of guns were added for the investigation of ill-intentioned traffic influence. The results of the grid performance estimation and the average packet delivery time for nodes with different packet switching technology under working load conditions are presented. The behavior of the communication grid model under workload conditions and ill-intentioned traffic is investigated. The quality of service parameters were estimated and the efficiency of real-size communication and computing grids was investigated for different types and intensities of ill-intentioned traffic. It is shown that the Focus configuration leads the grid, with the node that implements the technology of cut-through packet switching, to a complete deadlock under workload conditions. The other configurations lead the grid to a complete deadlock only under peak load conditions, while in the workload environment the Side shot and Crossfire configurations reduce the average packet delivery time.

An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors

Chip multiprocessors (CMPs) require a low-latency interconnect fabric network-on-chip (NoC) to minimize processor stall time on instruction and data accesses that are serviced by the last-level cache (LLC). While packet-switched mesh interconnects sacrifice performance of many-core processors due to NoC-induced delays, existing circuit-switched interconnects do not offer lower network delays as they cannot hide the time it takes to set up a circuit. To address this problem, this work introduces CIMA—a hybrid circuit-switched and packet-switched mesh-based interconnection network that affords low LLC access delays at a small area cost. CIMA uses virtual cut-through (VCT) switching for short request packets, and benefits from circuit switching for longer, delay sensitive response packets. While a request is being served by the LLC, CIMA attempts to set up a circuit for the corresponding response packet. By the time the request packet is served and the response gets ready, a circuit has already been prepared, and as a result, the response packet experiences short delay in the network. A detailed evaluation targeting a 64-core CMP running scale-out workloads reveals that CIMA improves system performance by 21 percent over the state-of-the-art hybrid circuit-packet-switched network.

Using OpenFlow to provide cut-through switching in MobilityFirst

Mobile devices are expected to become the Internet's predominant technology. Current protocols such as TCP/IP were not originally designed with mobility as a key consideration, and therefore underperform under challenging mobile and wireless conditions. MobilityFirst, a clean slate architecture proposal, embraces several key concepts centered around secure identifiers that inherently support mobility and trustworthiness as key requirements of the network architecture. This includes a hop-by-hop segmented data transport based on a globally unique identifier. This allows late and dynamic rebinding of end-point addresses to support mobility. While this provides critical gains in wireless segments, some overheads are incurred even in stable segments such as in the core. Bypassing routing-layer decisions in these cases, with lower layer cut-through forwarding, can improve said gains. In this work, we introduce a general bypass capability within the MobilityFirst architecture that provides better performance and enables both individual and aggregate flow-level traffic control. Furthermore, we present an OpenFlow-based proof-of-concept implementation of the bypass function using layer 2 VLAN tagging. We run experiments on the ORBIT and Global Environment for Network Innovations (GENI) testbeds to evaluate the performance and scalability of the solution. By implementing the bypass functionality, we are able to significantly reduce the number of messages processed by the controller as well as the number of flow rules that need to be pushed into the switches.

Reprint of “Virtual cut-through: A new computer communication switching technique”

In this paper a new switching technique called virtual cut-through is proposed and its performance is analyzed. This switching system is very similar to message switching, with the difference that when a message arrives in an intermediate node and its selected outgoing channel is free (just after the reception of the header), then, in contrast to message switching, the message is sent out to the adjacent node towards its destination before it is received completely at the node; only if the message is blocked due to a busy output channel is a message buffered in an intermediate node. Therefore, the delay due to unnecessary buffering in front of an idle channel is avoided. We analyze and compare the performance of this new switching technique with that of message switching with respect to three measures: network delay, traffic gain and buffer storage requirement. Our analysis shows that cut-through switching is superior (and at worst identical) to message switching with respect to the above three performance measures. [Display omitted]

Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip

This paper presents adaptive routing selection strategies suitable for network-on-chip (NoC). The main prototype presented in this paper uses contention information and bandwidth space occupancy to make routing decision at runtime during application execution time. The performance of the NoC router is compared to other NoC routers with queue-length-oriented adaptive routing selection strategies. The evaluation results show that the contention- and bandwidth-aware adaptive routing selection strategies are better than the queue-length-oriented adaptive selection strategies. Messages in the NoC are switched with a wormhole cut-through switching method, where different messages can be interleaved at flit-level in the same communication link without using virtual channels. Hence, the head-of-line blocking problem can be solved effectively and efficiently. The routing control concept and the VLSI microarchitecture of the NoC routers are also presented in this paper.

A single-cycle output buffered router with layered switching for Networks-on-Chips

We present a single-cycle output buffered router based on layered switching for networks on chips (NoCs). Different from state-of-the-art NoC routers, the router has three important characteristics: (1) It employs layered switching, which implements wormhole on top of virtual cut-through (VCT) switching; (2) In contrast to input buffered architectures, it adopts an output buffered architecture; (3) It is single cycle, meaning that the router pipeline takes only one cycle for all flits. Experimental results show that the router achieves up to 80% of ideal network throughput under uniform random traffic pattern. Compared with wormhole switching, layered switching achieves up to 36.9% latency reduction for 12-flit packets under uniform random traffic with an injection rate of 0.5 flit/cycle/node. Under 65nm technology synthesized results show that its critical path has only 20 logic gates, and it reduces 11% area compared to the input virtual-channel router with the same buffer capacity.

Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip

A VLSI microrchitecture of a network-on-chip (NoC) router with a wormhole cut-through switching method is presented in this paper. The main feature of the NoC router is that, the wormhole messages can be interleaved (cut-through) at flit-level in the same buffer pool and share communication links. Each flit belonging to the same message can track its routing paths correctly because a local identity-tag (ID-tag) is attached on each flit that varies over communication resources to support the wire-sharing message transportation. Flits belonging to the same message will have the same local ID-tag on each communication channel. The concept, on-chip microarchitecture, performance characteristics and interesting transient behaviors of the proposed NoC router that uses the wormhole cut-through switching method are presented in this paper. Routing engine module in the NoC architecture is an exchangeable module and must be designed in accordance with user specification i.e., static or adaptive routing algorithm. For quality of service purpose, inter-switch data transfers are controlled by using link-level overflow control to avoid drops of data.

Cross-layer cut-through switching mechanism for IEEE 802.16d/e wireless networks

This paper proposes a fast cross-layer cut-through switching mechanism (CCSM) for supporting media access control (MAC) layer packet switching in IEEE 802.16-based broadband wireless access (BWA) networks. The local traffic, which means subscriber stations (SSs) communicating with each other within the cell, can be switched via the MAC layer without involving the network layer. The average access delay of request from SSs is studied and analyzed in this paper. Finally, the simulation and numerical results show that the performance of CCSM is superior to that of the legacy IEEE 802.16d/e protocol.

An Effective Design of Deadlock-Free Routing Algorithms Based on 2D Turn Model for Irregular Networks

System area networks (SANs), which usually accept arbitrary topologies, have been used to connect hosts in PC clusters. Although deadlock-free routing is often employed for low-latency communications using wormhole or virtual cut-through switching, the interconnection adaptivity introduces difficulties in establishing deadlock-free paths. An up*/down* routing algorithm, which has been widely used to avoid deadlocks in irregular networks, tends to make unbalanced paths as it employs a one-dimensional directed graph. The current study introduces a two-dimensional directed graph on which adaptive routings called left-up first turn (L-turn) routings and right-down last turn (R-turn) routings are proposed to make the paths as uniformly distributed as possible. This scheme guarantees deadlock-freedom because it uses the turn model approach, and the extra degree of freedom in the two-dimensional graph helps to ensure that the prohibited turns are well-distributed. Simulation results show that better throughput and latency results from uniformly distributing the prohibited turns by which the traffic would be more distributed toward the leaf nodes. The L-turn routings, which meet this condition, improve throughput by up to 100 percent compared with two up*/down*-based routings, and also reduce latency

Comparing four classes of torus-based parallel architectures: Networkparameters and communication performance

The relative communication performance of low- versus high-dimensional torus networks ( k-ary n-cubes) has been extensively studied under various assumptions about communication patterns and technological constraints. In this paper, we extend the comparison to torus networks with incomplete, but regular, connectivities. Taking an nD torus as the basis, we show that a simple pruning scheme can be used to reduce the node degree from 2 n to 4, while preserving many of the desirable properties of the intact network. Orienting the torus links (removing half of the channels) provides a second form of pruning that leads to (multidimensional) Manhattan street networks. Finally, combined pruning and orientation yields the fourth class of toroidal networks studied here. We compare the static performance parameters of these networks and evaluate their dynamic communication performance under the assumptions of virtual cut-through switching and constant pin count. The 3D case, leading to networks that are efficiently realizable with current technology, is used to demonstrate and quantify the performance benefits. Our results reinforce, extend, and complement previous studies that have demonstrated the performance advantages of low-dimensional k-ary n-cubes over higher-dimensional ones. For example pruned 3D tori provide additional design points that fall between 2D and 3D tori in terms of implementation complexity but can outperform both of these standard architectures. Thus, from a practical standpoint, pruning introduces additional flexibility in implementation options and trade-offs available to designers.

Scalable Scheduling for Clusters and Grids Using Cut Through Switching

A new scalable scheduling strategy using cut-through switching is proposed. Recursive and closed-form expressions for speedup are found in heterogeneous single-level trees and in homogeneous multilevel trees, respectively. The ratio of speedup using cut-through switching to that using store-and-forward switching is presented so as to illustrate the amount of improvement in speedup between these two techniques.

Scalable Schesuling for Cluster and Grids using Cut Through Switching

A new scalable scheduling strategy using cut-through switching is proposed. Recursive and closed-form expressions for speedup are found in heterogeneous single-level trees and in homogeneous multilevel trees, respectively. The ratio of speedup using cut-through switching to that using store-and-forward switching is presented so as to illustrate the amount of improvement in speedup between these two techniques.

A new adaptive hardware tree-based multicast routing in k-ary n-cubes

Multicast communication is a key issue in almost all applications that run on any parallel architecture and, hence, efficient implementation of multicast is critical to the performance of multiprocessor machines. Multicast is implemented in parallel architectures either via software or via hardware. Software-based approaches for implementing multicast can result in high message latencies, while hardware-based schemes can greatly improve performance. Deadlock freedom in multicast communication is much more difficult to achieve resulting in more involved routing algorithms and higher startup delays. Hardware tree-based algorithms do not require these high startup delays, but do suffer from high probabilities of message blocking leading to poor performance. In this paper, we propose a new hardware tree-based routing algorithm (HTA) for multicast communication under virtual cut-through switching in k-ary n-cubes that outperforms existing software and hardware path-based multicast routing schemes. Simulation results are compared against several commonly used multicast routing algorithms and show that HTA performs extremely well under many different conditions.

A protocol for deadlock-free dynamic reconfiguration in high-speed local area networks

High-speed local area networks (LANs) consist of a set of switches interconnected by point-to-point links, and hosts linked to those switches through a network interface card. High-speed LANs may change their topology due to switches being turned on/off, hot expansion, link remapping, and component failures. In these cases, a distributed reconfiguration protocol analyzes the topology, computes the new routing tables, and downloads them to the corresponding switches. Unfortunately, in most cases, user traffic is stopped during the reconfiguration process to avoid deadlock. These strategies are called static reconfiguration techniques. Although network reconfigurations are not frequent, static reconfiguration such as this may take hundreds of milliseconds to execute, thus degrading system availability significantly. Several distributed real-time applications have strict communication requirements; Distributed multimedia applications have similar, although less strict, quality of service (QoS) requirements. Both stopping packet transmission and discarding packets due to the reconfiguration process prevent the system from satisfying the above requirements. Therefore, in order to support hard real-time and distributed multimedia applications over a high-speed LAN, we need to avoid stopping user traffic and discarding packets when the topology changes. In this paper, we propose a new deadlock-free distributed reconfiguration protocol that is able to asynchronously update routing tables without stopping user traffic. This protocol is valid for any topology, including regular as well as irregular topologies. It is also valid for packet switching as well as for cut-through switching techniques and does not rely on the existence of virtual channels to work. Simulation results show that the behavior of our protocol is significantly better than for other protocols based on stopping user traffic.