Cut-in Voltage Research Articles

Investigation of the polysilicon p-i-n diode and diode string as a process compatible and portable ESD protection device

The polysilicon p-i-n diode displays noticeable process compatibility and portability in advanced technologies as an electrostatic-discharge (ESD) protection device. This paper presents the reverse breakdown, current leakage and capacitance characteristics of fabricated polysilicon p-i-n diodes. To evaluate the ESD robustness, the forward and reverse TLP I–V characteristics were measured. The polysilicon p-i-n diode string was also investigated to further reduce capacitance and fulfill the requirements of tunable cut-in or reverse breakdown voltage. Finally, to explain the effects of the device parameters, we analyze and discuss the inherent properties of polysilicon p-i-n diodes.

Threshold voltage model for quantum-well channelpMOSFET with poly SiGe gate

In this paper, threshold voltage model of quantum-well channel pMOSFET with p+polycrystalline SiGe gate and its cut-in voltage model were established based on solving Poisson equation while considering the impact of free carrier. The effects of relevant parameters (Ge concentration of poly SiGe gate, Ge concentration of quantum-well SiGe channel, thickness of oxide layer, thickness of Si cap layer, doping content of quantum-well SiGe channel, and doping content of substrate) on threshold voltage and cut-in voltage of the parasitic channel was analysed by numerical analysis, and obtained the methods to restrain the opening of parasitic channel. The results of the models are in good agreement wih that of experiment reported as well as of ISE simulation.

I– V characteristics of the p–n junction between vertically aligned ZnO nanorods and polyaniline thin film

The characteristics of the p–n junction between vertically aligned ZnO nanorods and polyaniline (PANI) thin film were investigated. The rectifying behavior of the I– V curve of ZnO/PANI diode was verified with assembled ZnO/PANI structures. The cut-in voltage of the p–n junction was found to be around 0.5 V and the reverse breakdown voltage was about −27 V. In addition, the effects of UV illumination and NH 3 exposure on the I– V characteristics of ZnO/PANI configuration were also investigated.

A review of direct metamorphic In x Ga1− x As and InP epilayers on GaAs substrates by MOCVD

This is a review of direct growing high-quality In x Ga1− x As or InP buffer layers on GaAs substrates by metal-organic chemical vapour deposition (MOCVD). This low-temperature growth method benefits the improvement of metamorphic device performance. A simple and novel method of directly depositing thin In x Ga1− x As or InP buffer layers (<1 µm) on GaAs substrates is presented, instead of the strained-layer superlattice, two-step, graded or CS (compliant substrates) methods, while maintaining low dislocation density, high crystal quality, uniform and mirror-like surfaces. For the direct growth technique of In x Ga1− x As on GaAs, we found that an excellent quality In0.54Ga0.46As buffer of r.m.s surface roughness of only 0.686 nm by AFM and FWHM of 925 arcsec by XRD can be obtained at a low growth temperature of 440°C with a constant Ga/Ingas partial pressure of 5. An MIS-like Schottky diode with Au/i-InGaAs/n+-GaAs structure is investigated to check the film quality. A distinguished I–V characteristic with cut-in voltage of 0.23 V and reverse breakdown of 3 V, corresponding to the electric field of 2 × 105 V cm−1, is also achieved. The superior results are mainly due to the use of low-temperature growth technology. In addition, we also found this growth technology is available to directly grow the InP buffer layers on GaAs. Experimental results conclude that the growth temperature of 480°C in harmony with the V/III ratio range of 130–210 is a suitable window to directly grow InP on GaAs substrates. Contents 1. Introduction 48 1.1. Background of the development of metamorphic high electron mobility transistors (HEMTs) 48 1.2. Difficulties of the development of MHEMTs 49 1.3. Direct growth of InxGa1-xAs and InP on GaAs substrates 51 2. Overview of MOCVD system 51 2.1. Reactor design and gas control system 53 2.2. Gas system and components 54 2.3. Gas blending unit 54 2.4. Planetary reactor with heated susceptor 55 2.5. Vacuum system 56 2.6. Scrubbing system 57 2.7. Source molecules 57 2.8. Useful formulas for the epitaxial parameter control 58 3. Growth of metamorphic epilayers on GaAs by LP-MOCVD 59 3.1. Vertical MOCVD reactor 59 3.2. Material sources 59 3.3. Epitaxial conditions and environment control 60 3.4. Investigation of the film quality by direct growth technology 61 3.5. Carbon contamination (dependent on the group V partial pressure) 61 3.6. Temperature dependence of the In0.25Ga0.75As on GaAs substrate 61 3.7. Direct growth of high-quality In0.53Ga0.47As metamorphic layers on GaAs substrates 63 3.8. Effect of growth rates on film quality 66 3.9. I–V characteristics of MIS-like InGaAs Schottky diode 68 4. Growth of InP on GaAs 68 4.1. Instruments for measurement 69 4.2. Photoluminescence spectroscopy (PL) analysis 69 4.3. Surface morphology and XRD analysis 71 4.4. Effect of V/III ratios 74 5. Conclusion 77 Acknowledgements 77 References 78 Subject Index 80

Atomic layer epitaxy growth of ZnSxSe1−x epitaxial layers lattice-matched to Si substrates

Optical, crystallographic and transport properties of nominally undoped n-type ZnSxSe1−x /Si grown by atomic layer epitaxy have been studied. The lattice of a ZnSxSe1−x layer with a sulfur content estimated to be about 93% is found to have the best match to the Si substrate, as indicated by XRD, PL and electrical measurements. A narrow X-ray diffraction rocking curve line-width with a minimal FWHM of about 0.16° was observed. PL spectra, obtained at 7 and 300K, exhibited a strong near band-edge emission and weak deep-level emissions in the longer wavelength region for the ZnS0.93Se0.07 epitaxial layer. Schottky diodes were fabricated from the undoped ZnSxSe1–x layer and the electrical properties were measured at room temperature. From the current–voltage (I–V) characteristics, a high reverse breakdown voltage (>40V) and an extremely low cut-in voltage of 0.68V were obtained with ZnS0.93Se0.07. In addition, a Hall mobility of 347cm2/Vs was determined by the Van der Pauw method. These results indicate a good lattice-match of ZnS0.93Se0.07 /Si as a result of low numbers of interface and epitaxial layer defects.

Growth and characterization of ZnSe on Si by atomic layer epitaxy

High-quality undoped ZnSe films on n-type (1 0 0)-silicon substrate were obtained by atomic layer epitaxy (ALE), in which dimethylzinc (DMZn) and hydrogen selenide (H 2Se) were used as the reactants. Key growth steps are described. Growth parameters were varied to obtain films of higher quality. It was found that ZnSe monolayer growth rate is independent of substrate temperature (150–225°C) and the mole fractions of both DMZn and H 2Se. ZnSe epilayer characteristics were investigated by XRD, PL and electrical measurement. A single intense diffraction line was observed at 65.8°, which is slightly smaller than the standard value of bulk ZnSe crystal, confirming that the epitaxial layer is a (1 0 0)-oriented single-crystalline layer. PL spectra, obtained at 7 and 300 K, showed a strong and dominant peak emission at near-band-edge emission of 2.81 eV (4412 Å). Schottky diodes were fabricated from the undoped ZnSe layer and the electrical properties were measured at room temperature. From the current–voltage ( I– V) characteristics, a high reverse breakdown voltage (>40 V) and an extremely low cut-in voltage of 0.6–0.8 V were obtained. On the basis of the observed ZnSe/Si epitaxial film properties, the material is suitable for fabrication of ZnSe-based blue-light-emitting diodes (LEDs) and for application in direct-current thin-film electroluminescence (DCTFEL).

The influence of window layers on the performance of 650 nm AlGaInP/GaInP multi-quantum-well light-emitting diodes

In this article, we investigate the influence of AlGaAs and GaP window layers on the device performance of 650 nm AlGaInP/GaInP multi-quantum-well (MQW) light-emitting diodes (LEDs) grown by metalorganic chemical-vapor deposition. The AlGaInP/GaInP MQW structure with different window layers are characterized by double-crystal X-ray diffraction, secondary ion mass spectrometry and photoluminescence. By using the AlGaAs window layer, the LEDs have a lower cut-in voltage, a smaller dynamic series resistance and a higher breakdown voltage, while the LEDs with a GaP window layer show a stronger electroluminescence intensity, a higher light output power, a higher external quantum efficiency and a slower degradation of light output with increasing bias current. These results indicate that the GaP material is more adequate to be used as a window layer for the AlGaInP optical devices.

Controllable drain cut-in voltage with strong negative differential resistance in GaAs/InGaAs real-space transfer heterostructure

Three-terminal GaAs/InGaAs/GaAs pseudomorphic real-space transfer heterostructure employing graded channel as the emitter layer grown by low-pressure metal-organic chemical-vapor deposition has been fabricated. We observe controllable drain cut-in voltage characteristics with strong negative differential resistance. The largest peak-to-valley current ratio of the proposed device is about 33 000 at room temperature. Moreover, we observe an energy exchange effect between electrons.

Fabrication of N/sup +/-N iso-type diodes with LPCVD-grown polysilicon on silicon structures

We report the results of fabricating low cut-in voltage, n/sup +/-n iso-type diodes using in situ phosphorus-doped polysilicon films on n-type Si substrates. The electrical characteristics of these structures show exponential current-voltage (I-V) behavior. The temperature dependence of the current is used to extract the energy barrier at the film-substrate interface. The formation of the energy barrier is assumed to be due to the presence of energy states at the polysilicon-substrate interface. A simple phenomenological model, which takes into account the interface charge, is presented to explain the formation of the energy barrier. An energy barrier height of about 0.18 eV is extracted from the results of I-V characteristics at different ambient temperatures.

Effects of gamma irradiation on the insulated-gate bipolar transistor

The effects of gamma irradiation on the International Rectifier IRGBC20 insulated-gate bipolar transistor (IGBT) was investigated. These devices were found to be sensitive to gamma irradiation due to their metal-oxide-semiconductor field-effect-transistor (MOSFET) input drive. Total doses as small as 50 Krads(Si) increased the saturated collector current (I c) by an order of magnitude when the irradiation was performed with zero gate bias. For a constant (V g − V th) of 0.5 V, I c decreased to about half its pre-irradiation value after irradiation to 40 Krads(Si). The threshold voltage of the MOSFET shifted in the negative direction with the largest and smallest shifts occurring for a positive and negative gate bias applied during the irradiation, respectively. The shift in threshold voltage saturated at the cut-in voltage of the P-i-N diode portion of the device, indicating that gamma irradiation does not affect the P-i-N diode. The reverse blocking leakage current of the device is not very sensitive to radiation below a total dose of 400 Krads(Si), but increases sharply for larger doses. All of these radiation-degraded characteristics of the IGBT are primarily the result of increasing interface-state and oxide-trapped charge densities with total radiation dose, which decreases the carrier channel mobility by increased carrier scattering. Both room temperature and 150°C annealing were observed to partially recover all of the device characteristics by reducing the radiation-induced oxide-trapped charges.

Air-bridge field-emission vacuum device fabrication with 0.1 μm spacing

A novel approach for the fabrication of air-bridge field-emission vacuum diodes is described. In order to reduce the device operating voltage, a submicron anode/cathode spacing is required for lateral devices which typically causes difficulties with conventional optical lithography. This article reports on a vertical air-bridge thin-film process which achieves a 0.1 μm anode/cathode spacing while avoiding costly patterning lithography. The vacuum devices are designed to use Mo/Au/Au plating as anode and Mo as cathode. A silicon dioxide spacer layer is used to create a submicron gap-spacer within the air-bridge vacuum diode. The results of dc current-voltage characterization on prototype devices are presented. The devices exhibit a low cut-in voltage (21 V) from dc measurements. This novel fabrication process has the benefits of low-cost and simplicity, and significantly reduces the extraction voltage in vacuum field-emission device applications.

Theory of junction between two-dimensional electron gas and p-type semiconductor

The authors develop a theory of the junction between a two-dimensional electron gas and a three-dimensional p-type semiconductor contact. The cut-in voltage of such a junction depends on the density of the 2-D electron gas. Hence, at low currents, the device current varies exponentially with the 2-D gas density. The unique features of such junctions include a very small effective cross section (equal to the product of the thickness of the 2-D gas and the device width) and, hence, a small junction capacitance and a small device current at large current densities. Using a conformal mapping technique, the authors calculate potential and field distributions and find the differential device capacitance as a function of bias. They then calculate the output device characteristics for different gate voltages. The results of a 2-D self-consistent Monte Carlo simulation for such a structure are presented. This simulation clearly shows that electrons and holes are localized in the vicinity of the 2-D electron gas even at high drain biases.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Semi-insulating polysilicon heterojunctions on silicon

The electrical characteristics of undoped semi-insulating polysilicon (SIPOS)/p-type crystalline silicon (p-Si) and N +-SIPOS/p-Si heterojunctions were investigated. The current-voltage characteristics of the undoped SIPOS/p-Si heterojunctions depart from a hyperbolic sine behavior as the refractive index of the SIPOS increases. Carrier conduction in the undoped heterojunctions is characterized by low- and high-temperature barrier heights, which also vary with refractive index. Current-voltage characteristics of the n +-SIPOS/p-Si structures were rectifying with a cut-in voltage of about 1 V, which decreased with increasing temperature. Increasing the SIPOS doping increased the current density for a given bias and reduced the cut-in voltage. The forward characteristic displayed both a low and a high field activation energy with the difference attributable to the presence of interface states at the junction. Consequently, carrier conduction in these doped and undoped SIPOS/p-Si heterojunctions appears to be controlled by the SIPOS/p-Si interface. However, hydrogen annealing passivates the interface states thereby altering the low field conduction region.

Polyimide-passivated pn diodes

Polyimide-passivated pn diodes have been fabricated and characterized electrically. Four different passivation schemes were investigated; Hitachi PIX-1400, PIQ-13 with coupler, PIQ-13/oxide and silicon dioxide. The PIQ-13 passivated diodes exhibit a very leaky current-voltage ( I- V) characteristic, due to surface inversion induced by the coupler. PIQ-13/oxide passivated diodes also have less than desirable characteristics, the result of charge accumulation at the PIQ-13/oxide interface. On the other hand, PIX-1400 polyimide yields low-voltage pn diodes with a quality factor of approximately 1.5, a cut-in voltage of 0.6 V and a reverse breakdown voltage in excess of 25 V. Although the reverse saturation current of these diodes has a slight voltage dependence, they do not exhibit any hysteresis after ten consecutive measurements of the reverse I- V characteristics. Furthermore, moisture absorption does not appear to have an adverse effect on the electrical characteristics of these devices.

Geometry effects on the GaAs bipolar-unipolar negative differential resistance transistor

Geometry effects on the novel bipolar-unipolar transition negative differential resistance (BUNDR) transistor are investigated. Comparisons of d.c. characteristics are made among rectangular, circle and interdigitated structures fabricated on the same MBE-grown wafer. By using suitable geometry, the cut-in voltage can be reduced and the current can also be greatly enhanced for power consideration.