Current Source Gate Driver Research Articles

Single-Switch Discontinuous Current-Source Gate Driver With Voltage Boosting Capability and No Current Diversion

Single-Switch Discontinuous Current-Source Gate Driver With Voltage Boosting Capability and No Current Diversion

A Novel Driving Current Control Approach in Enhanced Current-Source Gate Driver

Active gate drivers (AGDs) get popular by their capability to flexibly control the switching behavior of power transistor. State-of-the-art AGDs need to adopt extensive driving switches, resistors or additional voltage or current sources which significantly increase the cost, size and complexity of gate driver. To overcome this bottleneck, an enhanced inductor-based current source gate driver (ECSGD) with well controlled gate driving current and fast driving current transition is proposed in this paper. Driving current is controlled by switching between different resonant networks within a pre-settled hysteresis window to solve the poor gate driving current regulation limitation of conventional inductor-based current source gate driver. Driving current transition speed is also accelerated by internal supply voltage boosting function. The design prototype demonstrates the driving current control of 2A with hysteresis window of 0.3A. The driving current transition time is shortened by more than 30% with VD1 boosted from 15V to 25V. Hence, the ECSGD can be used as an AGD with simple structure, high control accuracy and fast response speed.

Configurable gate driver for a stress test bench of newly developed discrete silicon power devices

Stress test system development is increasingly aimed at meticulous reliability and robustness evaluation for power semiconductors under application conditions as well as qualification purposes. Newly developed silicon (Si) power devices need further investigation in terms of potential new failure mechanisms. A double pulse tester is utilized as a test vehicle for studying hard switching related failure modes. However, setting up such a repetitive reliability test for multiple channels requires substantial manual labour. This paper proposes an open loop current source gate driver (CSGD) with adjustable gate voltage which can be software programmed, enabling an operator to set variable turn on/off speeds without hand-operated switching speed adjustment by gate resistors. The CSGD performance is assessed with various hard switching speeds in experiment and simulation for a discrete TO-247 MOSFET and IGBT respectively. Finally, additional considerations are proposed for faster switching so as to overcome the inherent nonlinearities and the CSGD output impedance effects.

GATE THRESHOLD VOLTAGE MEASUREMENT METHOD FOR SIC MOSFET WITH CURRENT-SOURCE GATE DRIVER

Gate threshold voltage is a classic thermo-sensitive electrical parameter (TSEP) for the junction temperature estimation and the gate oxide degradation, which is considered as a promising precursor for the online condition monitoring of power MOSFET. However, due to the fast switching transient, the gate threshold voltage of SiC MOSFET is much more difficult to measure than its Si counterpart. More specifically, the conventional measurement method mentioned in the datasheet obtains the gate threshold voltage during the turn-on transient, which requires the measurement to be completed within tens of nanoseconds. This paper presents a new approach to evaluate the gate threshold voltage with the assistance of a current-source gate driver. The advantage of the proposed measurement method is its lower requirement for the bandwidth of the measurement circuit, compared with the conventional method. The principle of the proposed method is demonstrated, followed by the simulation validation. A current-source gate driver is designed and constructed to assess the proposed method in experiment which shows that the measurement results can be used to evaluate the junction temperature effectively.

High-Speed Medium-Voltage SiC Thyristors for Pulsed Power Applications

The high peak current withstand capability of thyristors makes them extremely suitable for pulsed power applications. Silicon carbide (SiC) thyristors provide significant efficiency advantages compared with their silicon counterparts due to their very fast switching transitions. This article presents the development and characteristics of 3 kV SiC thyristors. A novel current-source gate driver is proposed to enhance their switching speed and, hence, maximize their benefits in pulsed power applications. The proposed driver provides a very high gate current slew rate while limiting the peak of the current pulse. The higher gate current slew rate achieves faster and, thus, more efficient device switching transition. Gate driver circuit description, variant topologies, and experimental results for a 3 kV SiC thyristor for a pulsed power application are presented to verify the proposed concepts.

A Universal Block of Series-Connected SiC MOSFETs Using Current-Source Gate Driver

SiC MOSFET has superior switching performance over Si IGBT in terms of power loss and temperature characteristics. In order to significantly improve the efficiency and power density of medium-voltage drive and high-power converters, this article proposes a current-source gate driver (CS-GD) for series-connected SiC MOSFETs, forming a universal block of series-connected SiC devices with the higher voltage rating. The proposed CS-GD has better gate voltage synchronization performance because of its constant gate current and novel gate driver structure. By implementing synchronized gate voltages, the snubber circuit is designed only for power loop difference and gate displacement current difference, and the snubber can be minimized or even be eliminated. The proposed block has been verified by LTSPICE simulations and multipulse test experiments under 200-kHz, 2-kV, 0~60-A condition using three 1.2-kV/60-A C2M0040120D SiC MOSFETs connected in series.

A Closed-Loop Current Source Gate Driver With Active Gate Current Control for Dynamic Voltage Balancing in Series-Connected GaN HEMTs

The voltage rating of commercial Gallium Nitride (GaN) power semiconductors is limited to 600/650 V because of the lateral structure. Stacking low-voltage switches is an effective way to block higher dc-link voltage. However, unbalanced voltage sharing can occur even with well-matched gate drivers and semiconductors due to the device-to-ground displacement currents. As a result, the low-voltage switches may suffer from over-voltage breakdown. This study presents a novel closed-loop current source gate driver to address the unbalanced dynamic voltage sharing issue. Additional compensation current is actively injected into the switch gate to counteract the voltage imbalance brought by the device-to-ground displacement currents. Compared with the conventional voltage source gate driver-based active gate control method, the proposed current source gate driver tunes the switch turn-off timing and dv/dt more accurately because the switch gate current is directly regulated. Meanwhile, since both the pulse width and amplitude of the compensation gate current can be adjusted, the proposed active gate control is more flexible for adapting to different operating conditions. Moreover, without employing snubber circuits or extra Miller capacitors, the switching speed and switching energy of the GaN devices are not compromised. By implementing the proposed gate driver and voltage balancing schemes, well-balanced voltage sharing can be obtained for both soft-switching and hard-switching scenarios. A series-connected GaN-based multiple pulse tester (MPT) is built to prove the effectiveness of the proposed approach under different load and different switching speed (dv/dt) conditions.

A Novel Current-Source-Based Gate Driver With Active Voltage Balancing Control for Series-Connected GaN HEMTs

The voltage rating of the commercial Gallium Nitride (GaN) power devices are limited to 600/650 V due to the lateral structure. Stacking the low-voltage rating devices is a straightforward approach to block higher dc link voltage. However, the unbalanced voltage sharing can occur due to the discrepancies in the gate driving loops, the device parameter tolerance and the device-to-ground displacement currents for the series-connected devices in the stack. The voltage imbalance may cause the over-voltage breakdown, in particular for GaN devices, which do not have the avalanche breakdown mechanism. In this article, a novel controllable current source gate driver is proposed, which addresses the voltage imbalance issue of series-connected GaN HEMTs for both hard switching and soft switching scenarios. The proposed current source gate driver controls the device switching timing and the dv/dt with fine accuracy by directly regulating the device gate current. Without the employment of the lossy snubber circuit or the external Miller capacitor, the switching energy and the switching speed are almost not compromised for each individual device. Meanwhile, the current mirror circuits are utilized as the discontinuous pulsed current sources, which produce negligible additional gate driving loss. A series-connected GaN-based multiple pulse tester is built to validate the proposed current source gate driver and the voltage balancing strategies. It is demonstrated that the drain-to-source voltage difference of the series-connected GaN devices is below 10% for different load current and different switching speed (dv/dt) conditions. Moreover, it is found that the series-connected GaN solution can save 33.6% switching energy compared with the benchmark SiC solution under the same operating condition.

A Dual-Switch Discontinuous Current-Source Gate Driver Overcoming the Current Diversion Problem for a Buck VRM

In this article, a novel dual-switch discontinuous current-source gate driver (CSD) suitable for driving the high-side mosfet (HS mosfet ) of buck voltage regulator module (VRM) is presented. The proposed gate driver completely solves the gate current diversion problem, which most of the previous CSDs suffer from, during turn- off transition. Thus, in comparison to most of the previous CSDs, the proposed gate driver achieves to turn- off the power mosfet considerably faster and with much higher effective gate current, which leads to significant reduction of turn- off losses. Whereas, turn- on losses of buck VRM HS mosfet driven by the proposed CSD and the previous CSDs are equal. Furthermore, the introduced gate driver consists of the minimum number of control switches and circuit elements, compared to previous CSDs. The proposed gate driver is analyzed and a prototype of the driver operating at 1 MHz is implemented in order to validate the theoretical analysis.

An Inductor-Less, Discontinuous Current Source Gate Driver for SiC Devices

EMI has remained a limiting factor in driving the SiC MOSFETs to its maximum potential and achieving a trade-off between EMI and switching losses is a major challenge for the designers. In this paper, an inductor-less, discontinuous current source gate driver (DCSD) is proposed. Exclusion of inductor results in a compact footprint and easy integration in IC form. The absence of predriver for proposed DCSD reduces the complexity of the driver, making it easier to control and implement. In addition, very low propagation delay is attained with the proposed DCSD which allows SiC MOSFETs to switch at higher switching frequencies with low losses. The proposed DCSD is compared with a commercially available reference gate driver for SiC MOSFET, and the results are analyzed and validated with hardware prototype. A better trade-off between switching losses and EMI is obtained with the proposed driver, where during turn-off, a 65% reduction in $dV_{ds}/dt$ and 45% reduction in $dI_{d}/dt$ is achieved at the cost of 33% increase in the total switching loss.

A Discontinuous Current-Source Gate Driver With Gate Voltage Boosting Capability

In this paper, a novel discontinuous current-source driver (CSD) is proposed, in which the power MOSFET gate-source voltage is increased to more than the drive supply voltage. The proposed CSD is able to recover gate energy dissipated in a conventional driver. In comparison to the conventional gate driver, the proposed CSD achieves fast switching speed to reduce switching losses. A wide range of operating duty cycle, low circulating losses, and high Cdv/dt immunity are other features of the proposed CSD. In comparison to previous discontinuous CSDs, the special advantage of the proposed circuit is power MOSFET gate voltage boosting, which leads to reduction of Rds(on) and, thus, the conduction loss. The proposed circuit is appropriate for voltage regulators (VRs) with synchronous rectifier and also it is suitable for two-stage 48-V power pod applications and low-voltage converters. Two-stage VR for laptop computer CPUs is another application of this gate driver circuit to improve light load performance. A prototype of the circuit operating at 1 MHz is implemented, and the experimental waveforms justify the theoretical analysis.

A Novel Current Source Gate Driver for ultra-low voltage applications

In this paper, a new current-source driver (CSD) is proposed, which consists of two control switches, an inductor, and a capacitor. This driver has some important features such as significant reduction of switching losses due to quick turn-on and turn-off of power switch at transition times, noise immunity, considerable gate drive loss reduction due to gate energy recovery, zero-voltage switching in the drive switches, low number of components, and simplicity of its control circuit. Compared to other CSDs, the introduced circuit has one special advantage, which is useful for low-voltage circuits such as microprocessor applications and power transmission circuits for neural implants. In this CSD, the voltage level of the MOSFET input capacitance rises to more than the gate drive power supply voltage. The proposed gate drive is analyzed and an 800-kHz prototype is implemented to validate the features of the proposed circuit.

A High-Dynamic Range Current Source Gate Driver for Switching-Loss Reduction of High-Side Switch in Buck Converter

In this letter, a high-dynamic range current source gate driver (HD-CSD) circuit is proposed to reduce the switching loss of the high-side switch in buck converter with wide variation of the gate resistance. Hard switching loss is the major loss in high-side switch and limits the high switching-frequency application of dc-dc converter. Comparing with conventional voltage source gate driver (VSD) and the reported four switches CSD (4S-CSD), the proposed HD-CSD behaves more like the ideal current source driver which can realize the fast switching of power switches to reduce the switching loss. In addition, with proposed HD-CSD, impact of gate resistance that limits the switching speed of the power switch can be greatly reduced. Experimental results are presented to show the power efficiency improvement of buck converter with HD-CSD high-side driver comparing with VSD and 4S-CSD high-side drivers at switching frequency of 1 MHz.

A Current Source Gate Driver Achieving Switching Loss Savings and Gate Energy Recovery at 1-MHz

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> In this paper, a new current source gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. In addition, it can recover a portion of the CV<formula formulatype="inline"><tex>$^{2}$</tex> </formula> gate energy normally dissipated in a conventional driver. The circuit consists of four controlled switches and a small inductor (typically 100 nH or less). The current through the inductor is discontinuous in order to minimize circulating current conduction loss. This also allows the driver to operate effectively over a wide range of duty cycles with constant peak current—a significant advantage for many applications since turn on and turn off times do not vary with the operating point. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz, 5 V input, 10 V/5 A output. At 5 V gate drive, a 2.9% efficiency improvement is achieved representing a loss savings of 24.8% in comparison to a conventional driver. </para>