Current-reuse Technology Research Articles

Design and optimisation of feedforward noise cancelling complementary metal oxide semiconductor LNA for 2.4 GHz WLAN applications

This study deals with the design and optimisation of two-stage complementary metal oxide semiconductor low noise amplifier (LNA) for wireless local area network (WLAN) applications. IEEE 802.11n WLAN standard provides up to 600 Mbps speed with 40 MHz channel bandwidth and high throughput. The receiver of these WLAN applications requires LNA with higher gain and minimum noise figure (NF). Elephant Herding Optimisation technique was involved for the first time to optimise the performance of the LNA. The post-layout simulation shows that a maximum gain of 26.7 dB at 2.4 GHz is achieved in the proposed design. Feedforward noise cancelation technique is involved to get a reduced NF of 1.12 dB. The first and second stages are tuned to cover the 3 dB maximum gain bandwidth of 3.2 GHz (from 1.7 to 4.4 GHz). This LNA is designed at 90 nm technology with the supply voltage of 0.5 and 1.2 V, and consumes 8.9 mW of power. Current reuse technology is used to reduce power consumption. The input and output return losses have been found to be -18 and -15 dB, respectively at the targeted 2.4 GHz frequency. Third-order input intercept point of the optimised LNA is -8.1 dBm.

Analysis and Design of a Wide-Tuning-Range VCO With Quadrature Outputs

A quadrature voltage-controlled oscillator (QVCO) with a wide tuning range is proposed and implemented in the TSMC 0.18- mum CMOS process. The said QVCO uses a cross-coupled structure and a current-reuse technology to produce the quadrature signal and to save power consumption and area, respectively. Based on our measurement, the phase noise with 1-MHz offset from the carrier frequency of 3.6 GHz is - 114 dBc/Hz and the proposed QVCO has a wide-band tuning range of 3.6-4.9 GHz. Also, the maximal phase error and power imbalance are less than 5 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">deg</sup> and 1.5 dB, respectively, and the power consumption is 8 mW at 2-V power supply voltage.

A 5.7-GHz 0.18-μm CMOS gain-controlled differential LNA with current reuse for WLAN receiver

This letter presents a 5.7 GHz 0.18 /spl mu/m CMOS gain-controlled differential LNA for an IEEE 802.11a WLAN application. The differential LNA, fabricated with the 0.18 /spl mu/m 1P6M standard CMOS process, uses a current-reuse technology to increase linear gain and save power consumption. The circuit measurement is performed using an FR-4 PCB test fixture. The LNA exhibits a noise figure of 3.7 dB, linear gain of 12.5 dB, P/sub 1dB/ of -11 dBm, and gain tuning range of 6.9 dB. The power consumption is 14.4 mW at V/sub DD/=1.8 V.