This work examines the individual impact of drift and diffusion charge collection in the collector-base (CB) and collector-substrate (CS) junctions on single-event-upset (SEU) in SiGe HBT current mode logic (CML) circuits. The CS junction diffusion charge collection has negligible impact on circuit SEU, despite its large charge collection magnitude. The CB and CS drift charge collection are primarily responsible for the observed SEU in CML circuits. The CB drift charge collection is as important as the CS drift charge collection, even though its charge magnitude is much less, because the resulting current excitation appears between collector and base nodes, and hence is amplified. Using selective ion track placement, we show that an ion track passing through the physical CS junction is much more effective in causing SEU than an ion track not passing through the CS junction because of potential funneling and consequent large induced drift current magnitude, which is necessary for SEU of CML circuit.
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