Current Differencing Transconductance Amplifier Research Articles

New Z copy- current differencing transconductance amplifier active filter using FinFET transistor based current Mode Universal Filter

This research paper presents the design of an active current mode device named Z-copy- Current Differencing Transconductance Amplifier (ZC-CDTA) in conjunction with FinFET (Fin Field-Effect Transistor) transistors. An input bias current can be used to adjust its parasitic resistances at its two current input ports. It is ideal for use in current-mode signal processing, which is steadily more common than voltage-style signal processing, because it operates in current mode on all terminals. The suggested component was implemented using Finfet technology, and its performances were assessed using simulations using cadence tools and linear technology SPICE. They demonstrate the new active element's usage, with a maximum bandwidth of 300MHz. The highest power consumption is 1.01 mW, and the supply voltages can be as low as ±0.1 V. The low-power consumption and wide current range tuning of the suggested Zc-CDTA are achieved.

Current mode multi scroll chaotic oscillator based on CDTA

Compared to voltage mode circuits, current mode circuits have advantages such as large dynamic range, fast speed, wide frequency band, and good linearity. In recent years, the development of call flow modeling technology has been rapid and has become an important foundation for analog integrated circuits. In this paper, a current mode chaotic oscillation circuit based on current differential transconductance amplifier (CDTA) is proposed. This proposed circuit fully utilizes the advantages of current differential transconductance amplifier: a current input and output device with a large dynamic range, virtual ground at the input, extremely low input impedance, and high output impedance. The linear and non-linear parts of the proposed circuit operate in current mode, enabling a true current mode multi scroll chaotic circuit. Pspice simulation results show that the current mode chaotic circuit proposed can generate multi scroll chaotic attractors.

Two New Voltage-Mode Sinusoidal Quadrature Oscillators Employing Second-Generation Voltage Conveyors

This article presents an application of a second-generation voltage conveyor (VCII) as a quadrature oscillator. The controlling parameters of the presented circuits, i.e. oscillation condition and oscillation frequency are tuneable without affecting the other. Both the single-resistance-controlled oscillators employ only two VCII, two grounded capacitors, and three grounded/ virtually grounded resistors. To strengthen the design idea regular mathematical analysis such as ideal, non-ideal, parasitic, frequency stability, phase noise analysis, and sensitivity calculations have been performed. To validate the proposed networks, the simulations have been carried out using 180 nm CMOS technology parameters, and experimental studies have also been performed using commercially available integrated circuits. Abbreviations: VDTA: voltage differencing transconductance amplifier; CDBA: current differencing buffered amplifier; OTRA: operational transconductance amplifier; CCI: first generation current conveyor; CCII: second generation current conveyor; ICCII: Inverting current conveyor; CFOA: current feedback operational amplifier; CDTA: current differencing transconductance amplifier; VDDDA: voltage differencing differential difference amplifier; OTA: operational transconductance amplifier; DVCC: differential voltage current conveyor; DXCCTA: dual:X current conveyor transconductance amplifier; M: MOS model; H: Hardware experimentation; BJT:Bipolar Junction Transistor; MM: Macro-model Simulation.

Fully Differential Current-Mode Configuration for the Realization of First-Order Filters with Ease of Cascadability

It is well known that fully differential signal processing is more advantageous than single-ended signal processing in a noisy environment, and is widely used in audio, video and other signal processing applications. This paper introduces a new fully differential configuration that contains a first-order low-pass (LP) filter, high-pass (HP) filter, and all-pass (AP) filter, all present within the same circuit design. The proposed fully differential configuration is simple and employs only one multiple-output current differencing transconductance amplifier and one grounded capacitor. The circuit has a wide operating frequency range (up to 73 MHz). The additional features offered by the proposed circuit include use of the lowest number of active and passive components, suitability of the integrated circuit chip, support of cascadability, electronic tunability, no passive component-matching restrictions, availability of all first-order responses, i.e., LP, HP, and AP, and low-level operating supply voltages. Non-ideal and parasitic analyses are investigated for the proposed circuit, and PSPICE simulation results are presented to verify the proposed theory. Additionally, the proposed fully differential LP filter circuit is experimentally verified using off-the-shelf ICs. Moreover, the cascading feasibility is demonstrated by realizing a fully differential nth-order LP filter.

Electronically Controlled Biquadratic Filter and Quadrature Oscillator Using CDTAs

This article presents a current-mode biquadratic filter and quadrature oscillator circuit based on current differencing transconductance amplifiers (CDTAs). The proposed circuit does not require changing the circuit topology. In addition to the low-pass filter, high-pass filter, band-pass filter, and sinusoidal quadrature signal, the proposed circuit has a pole frequency that can be controlled independently from the quality factor, while the oscillation frequency can be controlled non-interactively. The circuit impedance with high output can directly drive the load without using a current buffer. Furthermore, grounded capacitors can function without the use of external resistors. This qualification is ideal for the future development of integrated circuits (ICs). After the PSPICE simulation with 90 nm CMOS parameters and the experiments by commercial ICs, the results are consistent with the theoretical analysis of the proposed circuit.

Low Voltage High Performance Floating Gate and Quasi Floating Gate CDTA

A low voltage and low power current differencing transconductance amplifier (CDTA) based on Floating gate MOSFET (FGMOS) and Quasi-floating gate MOSFET (QFGMOS) is presented. The use of QFGMOS eliminates confined in the floating gate, degraded gain-bandwidth product, silicon area etc. The proposed circuits have been simulated using spice simulation software 180nm technology of analog devices LtSpice XVII and supply voltage used for this is ±1V.

A novel instrumentation amplifier with high tunable gain and CMRR forbiomedical applications

A new design of current mode instrumentation amplifier (CMIA) with tunable gain and low voltage operation capability is proposed in this paper, which is suitable for biomedical signals processing, especially in electrocardiogram (ECG). It consists of a new design of current differencing transconductance amplifier (CDTA) and dual z copy CDTA (DZC-CDTA). The gain of the proposed CMIA is controlled by a MOS-based tunable resistor. The main advantage of the proposed CMIA is its high gain that can be tuned over a significant range with the help of two resistances. The performance of the proposed instrumentation amplifier is evaluated through simulation results on Cadence Virtuoso using SCL 180 nm CMOS technology. From simulation results gain, common mode rejection ratio (CMRR), power supply rejection ratio (PSRR), %THD and -3 dB bandwidth of proposed instrumentation amplifier are obtained as 55.09?81.12 dB, 90.42-116.5 dB, 97.3 dB (+PSRR), 114.2 dB (- PSRR), 1.5% and 9.5-165 kHz, respectively. The performance of the proposed design is also examined against PVT variations. The performance of proposed CMIA is compared with other existing designs available in the literature, which clearly shows the competency of the design. The post layout simulation results confirm the on-chip implementation feasibility.

Voltage tunable current MODE KHN filter based on current differencing transconductance amplifier (CDTA)

The era of SoC design has great dependency on CMOS circuits owing to its low power and high reliability which could contribute in the effective circuit designing. Here, a unique approach for the designing of voltage tunable current differencing transconductance amplifier (CDTA) is reported for the realization of Kerwin–Huelsman–Newcomb (KHN) filter. The proposed design has been simulated by using Cadence Virtuoso simulation tool with 0.18 [Formula: see text]m technology parameters. This design is based on input voltage-based gain and frequency of operation tuning approach. In this reported design of filter, cutoff frequency can be tailored by input voltage instead of input current. This relaxes the need for the iterative circuit modifications to work in a particular frequency range. Thus, the reported CDTA design is expected to be robust and offers higher design flexibility as there is now no need of iterative designing and calibration in this approach. This also exhibits retained area requirement as per the current state of the art for the KHN filters. Further, the performance of designed CDTA-based KHN filter has also been verified with the existing KHN filters.

High Transconductance Gain Current Differencing Transconductance Amplifiers Using a New Approach of gm Boosting

Two new structures of current differencing transconductance amplifier (CDTA) for high transconductance gains are proposed. Usually, the transconductance gain of conventional CDTA is controlled by varying the bias current which limits the transconductance gain up to a certain extent and increases the power dissipation. These problems have been eliminated by introducing a technique in which common source amplifiers are connected between gate and source terminals of the differential pair metal oxide semiconductor field effect transistors (MOSFETs) of conventional CDTA. The common source amplifiers are used to increase the gate-to-source voltages of differential pair MOSFETs which increase the transconductance gain of the proposed CDTA-I. To further increase the transconductance gain of the proposed CDTA-I, another structure namely, CDTA-II is also proposed which uses an ‘N’ number of n-type MOSFETs connected in parallel instead of a single n-type MOSFET in each side of the differential pair. The gate-to-source voltages of all ‘N’ parallel MOSFETs remain the same as in the proposed CDTA-I and the total output current of operational transconductance amplifier is increased and therefore, transconductance gain is further increased. The proposed CDTA-I and CDTA-II have been designed using Mentor Graphics Eldo tool. The simulation results have been obtained using 0.18 µm complementary metal oxide semiconductor technology parameters. The simulation results demonstrate that the transconductance gains of proposed structures have been increased significantly while power dissipations are the same as that of the conventional CDTA. The high-frequency Kerwin–Huelsman–Newcomb filters using both the proposed structures have also been presented to show the effectiveness of the proposed CDTAs.

Four quadrant analog multiplier based memristor emulator using single active element

This paper presents a novel Four Quadrant Analog Multiplier (FQAM) circuit and its applications using a single active element Current Differencing Transconductance Amplifier (CDTA) and two NMOS. This circuit has a cascadability feature as it produces current and voltage outputs at high and low impedance ports, respectively. It offers additional features such as resistor-less realization, operability in voltage and trans-conductance mode, and configurable structure. Further, the FQAM circuit is configured to develop a memristor emulator based on the proposed mathematical analogy. The proposed memristor circuit contains active elements (one CDTA, two NMOS, and one Inverting Voltage buffer) and only one grounded capacitor. It offers tunability using the transconductance gain of the CDTA block. Also, the proposed memristor emulator circuit doesn’t contain any additional multiplier block. The emulator circuit can be operated in both the Incremental and the Decremental mode of memristance variation. The results demonstrate the non-volatile property as well as hysteresis behavior for the wide frequency range. The effects of statistical variation in passive component, threshold voltage, and aspect ratios on the proposed circuits using Monte-Carlo simulation have been estimated. Also, the impact of non-idealities and the parasitic effects of the CDTA on the proposed circuits are investigated. In last, the capacitor-less version of the memristor emulator and its hysteresis characteristics have been demonstrated. The simulation results obtained using HSPICE, are agreed well with the theoretical analysis.

Design and implementation of CDTA: a review

In this paper a review on design perspective of current-mode current differential trans-conductance amplifier (CDTA) is presented for the state of the art analog signal processing/generating modules design as the main objective. The CDTA circuits are classified according to the active element used for the design with all related parameters taken into consideration. Likelihood implementations of different analog signal processing/generating modules are covered and a comparison of their main parameters trans-conductance, bandwidth, port impedances and power consumption is given. The feasibility of implementing with a lesser area is also considered from the VLSI design viewpoint. The review concludes with CDTA structures with the best possible parameters obtained and future possibilities.

New Grounded and Floating Decremental/Incremental Memristor Emulators Based on CDTA and Its Application

This paper presents grounded and floating memristor emulators based on current differencing transconductance amplifier. These emulators are realized using current differencing transconductance amplifier, operational transconductance amplifier and a grounded capacitor. Incremental to decremental memristor emulators and vice versa are easily obtained by modifying the circuit slightly. These memristor emulators are very simple in design over other complex realizations reported in the literature. The pinched hysteresis curves have been obtained without using analog multiplier for a wide range of frequency that varies from 600 kHz to 2 MHz. The property of retention has been verified for proposed design of memristor emulators after applying voltage pulse of amplitude 100 mV and frequency 1 MHz. Non-ideal analysis including the effects of parasitic impedances on the behaviour of proposed memristor emulators has also been presented. The proposed designs of memristor emulators have been simulated by Mentor Graphics Eldo simulation tool with TSMC 0.18 µm, level 53, CMOS technology parameters. The performance of proposed memristor emulator is verified by embedding it in the realization of current- mode analog filter.

Realization of current mode universal shadow filter

In this paper, a current-mode universal shadow filter is proposed using a new variant of current differencing transconductance amplifier (CDTA), namely current controlled current differencing cascaded transconductance amplifier (CC-CDCTA) and two capacitors. It realizes three shadow filter functioning; low pass (LPS), high pass (HPS) and band pass (BPS). Furthermore, it is extended to a universal filter by adding one second generation current conveyor (CCII) and CC-CDCTA building blocks. The proposed configuration realizes all the standard responses of a universal shadow filter such as LPS, BPS, HPS, band-reject (BRS), and all pass (APS) simultaneously. It does not use any resistor. The presented shadow filter utilizes the LP and BP outputs of the basic filter in the feedback amplifier to obtain the desired universal shadow filter functionality. The pole frequency (ωos) and quality factor (Qos) of the shadow filter is electronically tunable using the gain of the feedback amplifiers. The ωos and Qos can also be tuned without disturbing each other. It is also found to be suitable for full cascadability. The validation is done using 180 nm technology in Cadence. Experimental verification has also been done using IC AD844, and CA3080 and found satisfactory results.

Design of Current Differencing Transconductance Amplifier using a Novel Approach of Transconductance Boosting for High Frequency Applications

This paper introduces a novel approach of transconductance boosting for current differencing transconductance amplifier (CDTA). Generally, the variation in the transconductance is achieved by changing the bias current and/or by increasing the aspect ratios of differential pair MOSFETs. These techniques of transconductance variations suffer from several serious drawbacks which include higher power dissipation, limited range of transconductance gain and lower input/output swing. The proposed approach of transconductance boosting overcomes these drawbacks at certain extent and also provides a high value of transconductance gain with acceptable range of bandwidth and power dissipation. It includes two different techniques to make it more effective for transconductance boosting. In the first technique, common source amplifiers have been used between gate and source terminals of the differential pair MOSFETs whereas in the second technique the concept of partial positive feedback is utilized. Using this approach, a new structure of CDTA namely cross-coupled common source current differencing transconductance amplifier I (CCCS-CDTA I) is proposed. To further improve the transconductance gain of CCCS-CDTA I, another structure CCCS-CDTA II is also proposed, in which the differential pair MOSFETs are replaced by two networks of “n” parallel MOSFETs having same aspect ratios. The proposed CCCS-CDTAs are simulated in Mentor Graphics Eldo simulator using TSMC 0.18[Formula: see text][Formula: see text]m process parameters. To confirm the performance of CCCS-CDTA II, physical layout and post-layout simulation results have been presented using Mentor Graphics Calibre tool. The advantages of proposed CCCS-CDTAs have also been discussed by realizing KHN filters and oscillators.

Realizations of Current Transfer Functions Using Current Differencing Transconductance Amplifiers

Keskin and Biolek have proposed a current differencing transconductance amplifiers configuration for realizing quadrature oscillator using first-order all-pass filters. This paper exploits their all-pass filter configurations for realizing a wider class of current mode transfer functions. The synthesis procedure is illustrated with examples from first-order and second-order all-pass filters.

Low voltage floating gate MOSFET based current differencing transconductance amplifier and its applications

This article presents a low voltage low power configuration of current differencing transconductance amplifier (CDTA) based on floating gate MOSFET. The proposed CDTA variant operates at lower supply voltage ±1.4 V with total static power dissipation of 2.60 mW due to the low voltage feature of floating gate MOSFET. High transconductance up to 6.21 mA/V is achieved with extended linear range of the circuit i.e. ±130 μA. Two applications are illustrated to demonstrate the effectiveness of the proposed active block. A quadrature oscillator is realized using FGMOS based CDTA, two capacitors, and a resistor. The resistor is implemented using two NMOSFETs to provide high linearity and tunablility. Another application is the Schmitt trigger circuit based on the proposed CDTA variant. All circuits are simulated by using SPICE and TSMC 130 nm technology.

CDTA-Based Capacitance Multipliers

Two grounded capacitance multipliers employing the current differencing transconductance amplifier (CDTA) are proposed. They can be easily modified to the floating versions by using an additional d...

Precise Implementation of CDTA

The Current Differencing Transconductance Amplifier (CDTA) is a popular active building block for analog signal processing. Since it is not available as a commercial IC, most of the CDTA applications are verified only via simulations or the CDTA is implemented by commercial circuits. The paper deals with CDTA implementation, emphasizing the accuracy, linearity, and dynamic range of the processed signals, and low power consumption. Such a CDTA can be useful wherever these requirements are more relevant than the speed and bandwidth, typically for implementing hardware emulators of memristive systems.

Current-mode square wave generators based on a single CDTA

ABSTRACTThis paper proposes two designs for current-mode square wave generators based on a current-differencing transconductance amplifier (CDTA). Both the proposed circuits are compact and employ a single CDTA with only two external passive components. The first circuit has a fixed duty-cycle topology and can generate a symmetrical square wave with variable frequency. The second circuit has a variable duty-cycle design and can operate in a current-controlled dual duty-cycle mode with a single-circuit topology. The proposed generators allow independent control of the operating frequency, output amplitude, and duty cycle by tuning diverse circuit parameters. This paper discusses several previous designs for square wave generators and presents the circuit principles, related governing formulas, and nonideal problems for the proposed circuits. In addition, computer simulations and experimental results, which are consistent with those of the theoretical analyses and confirm the feasibility of the new generators, are presented.

A wideband linear tunable CDTA and its application in field programmable analogue array

In this paper, a NMOS-based wideband low power and linear tunable transconductance current differencing transconductance amplifier (CDTA) is presented. Based on the NMOS CDTA, a novel simple and easily reconfigurable configurable analogue block (CAB) is designed. Moreover, using the novel CAB, a simple and versatile butterfly-shaped FPAA structure is introduced. The FPAA consists of six identical CABs, and it could realize six order current-mode low pass filter, second order current-mode universal filter, current-mode quadrature oscillator, current-mode multi-phase oscillator and current-mode multiplier for analog signal processing. The Cadence IC Design Tools 5.1.41 post-layout simulation and measurement results are included to confirm the theory.