Current Copier Cells Research Articles

On-focal-plane signal processing for current-mode active pixel sensors

On-focal-plane signal processing for current-mode active pixel sensors (APS), including fixed pattern noise (FPN) suppression and high-resolution analog-to-digital conversion (ADC), is presented. An FPN suppression circuit that removes the offset current variation between pixels by using a combination of an n-type and a p-type current copier cell is described. The FPN suppression circuit exhibits linear transfer characteristics in the input current range from 0 to 30 /spl mu/A. On-chip ADC is expected to improve imaging system performance and reliability, while reducing system size, weight, and cost. Operation and performance of a current-mode second-order incremental /spl Delta/-/spl Sigma/ A/D converter with column parallel architecture and for high-resolution and medium-slow-speed applications is presented. A 12-bit resolution with /spl plusmn/1.5 LSB accuracy at the conversion rate of 5.6 kHz was obtained. The LSB corresponds to less than twelve signal charges of current-mode 10-/spl mu/m pixel APS's. Based on the experimental results, a brief description of a possible image sensor with the on-chip signal processing is also described.

On-focal-plane signal processing for current-mode active pixel sensors

On-focal-plane signal processing for current-mode active pixel sensors (APS), including fixed pattern noise (FPN) suppression and high-resolution analog-to-digital conversion (ADC), is presented. An FPN suppression circuit that removes the offset current variation between pixels by using a combination of an n-type and a p-type current copier cell is described. The FPN suppression circuit exhibits linear transfer characteristics in the input current range from 0 to 30 /spl mu/A. On-chip ADC is expected to improve imaging system performance and reliability, while reducing system size, weight, and cost. Operation and performance of a current-mode second-order incremental /spl Delta/-/spl Sigma/ A/D converter with column parallel architecture and for high-resolution and medium-slow-speed applications is presented. A 12-bit resolution with /spl plusmn/1.5 LSB accuracy at the conversion rate of 5.6 kHz was obtained. The LSB corresponds to less than twelve signal charges of current-mode 10-/spl mu/m pixel APS's. Based on the experimental results, a brief description of a possible image sensor with the on-chip signal processing is also described.

A 10-bit pipelined switched-current A/D converter

A modified RSD algorithm has been implemented in a switched-current pipelined A/D converter. The offset insensitivity of the RSD Converter reduces the effect of several nonidealities proper to current copier cells. Moreover, the benefits resulting from the large tolerances inherent to the RSD algorithm and the pipelined architecture result in an improved conversion rate. Measurements on a first prototype give an integral nonlinearity error less than 0.8 LSB for 10-bit accuracy. Power dissipation is 20 mW and silicon area is 2.5 mm/sup 2/. The measured sampling rate is 550 kS/s. It is an improvement by a factor of twenty compared to known equivalent CMOS switched-current converters. It is nevertheless still well below the predicted conversion rate of 4.5 MHz, which should be obtained once this A/D converter is integrated into an analog front-end. Full compatibility with standard digital technologies makes this kind of converter attractive for low power, medium-fast converters with 10-bit accuracy.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Charge injection in current copier cells

The current copier cell [1] is a versatile building block increasingly used in many analogue CMOS circuits. However, charge injection, noise, Early effect and leakage current affect its accuracy. The Letter focuses on charge injection. A new model, derived from the work of Vittoz [2] and Sheu et al. [3], is presented to predict the actual partition of the injected charges. The results are compared with experimental measurements on a test circuit.