Critical Dimension Error Research Articles

Mask correction method for surface plasmon lithography.

Surface plasmon lithography (SPL) has emerged as an innovative approach to nano-fabrication, offering an alternative to traditional patterning methods. To enhance its pattern fidelity in manufacturing, it is essential to incorporate mask correction to reduce critical dimension (CD) errors between the intended target features and the photoresist image. Traditionally, the aerial image of SPL has been modeled and simulated using methods such as finite difference time domain (FDTD) or rigorous coupled wave analysis (RCWA). These models have allowed us to obtain aerial images of the mask patterns. However, relying solely on the aerial image proves insufficient for meeting the rigorous manufacturing standards for mask correction. In our research, we propose a comprehensive model that combines the optical model, employing the FDTD method, and the resist model, tailored to the specific surface plasmon lithography process. Test patterns were meticulously designed with a target CD of 130nm, and the model was applied to simulate these test patterns, producing the after-development image (ADI) under predefined process conditions. Following a thorough analysis and data processing of the test patterns and ADI data, we established rule tables for the correction of both 1D line patterns and line end patterns. The simulation results unequivocally demonstrate the improved CD error performance achieved by the post-corrected patterns.

Generalized performance optimization for massively-parallel electron-beam systems

The massively-parallel e-beam system (MPES) provides a large number of programmable beams of which the optimal use is critical to maximizing the efficiency of the system. In our previous study of proximity effect correction (PEC) under the constraints of the MPES, the critical dimension error and the line edge roughness were minimized by reducing the feature area to be exposed and varying the dose spatially. In another study, a method to reduce the exposing time while still ensuring a near-optimal PEC result was developed. In this method, the maximum dose difference between two regions of a feature was carefully decreased after first obtaining the optimal linewidth reduction and the spatial dose distribution for the PEC. However, this method designed with an emphasis on the PEC and simplicity may miss the optimal result due to the fixed order of performance metrics considered and was developed for a single feature. To address these limitations, an adaptive optimization method that can handle any combination of performance metrics in a cost function is proposed. It allows for more flexible optimization and can achieve better results than the old method. Additionally, the optimization method is extended for large-scale patterns with uniform features, such as line-space patterns. Also, an effective way to handle the recursive effect among critical locations in a large-scale pattern is described. The simulation results show that the proposed optimization method outperforms the old method in terms of the cost function and linewidth uniformity among the features.

Machine Learning-Based Edge Placement Error Analysis and Optimization: A Systematic Review

As the semiconductor manufacturing process is moving towards the 3 nm node, there is a crucial need to reduce the edge placement error (EPE) to ensure proper functioning of the integrated circuit (IC) devices. EPE is the most important metric that quantify the fidelity of fabricated patterns in multi-patterning processes, and it is the combination of overlay errors and critical dimension (CD) errors. Recent advances in machine learning have enabled many new possibilities to improve the performance and efficiency of EPE optimization techniques. In this paper, we conducted a survey of recent research work that applied machine learning/ deep learning techniques for the purposes of enhancing virtual overlay metrology, reducing overlay error, and improving mask optimization methods for EPE reduction. Thorough discussions about the objectives, datasets, input features, models, key findings, and limitations are provided. In general, the results of the review work show a great potential of machine learning techniques in aiding the improvement of EPE in the field of semiconductor manufacturing.

Fabrication tolerant coupling between silicon strip and subdiffraction V-groove waveguides

We consider the problem of efficiently coupling light into a recently proposed all-dielectric subdiffraction waveguide exhibiting an ultra-small mode area (An ∼ 10−3 λ 0 2 ), more than one order of magnitude lower than a diffraction limited strip waveguide (An ∼ 10−2 λ 0 2 ). Two prospective coupling solutions are compared with respect to coupling efficiency, fabrication tolerance, and optical bandwidth. The strategy based on adiabatic mode evolution is shown to be superior with respect to fabrication tolerance as it preserves ≥99% efficiency under +/- 10 nm critical dimension (CD) variations, whereas the directional coupling approach achieves only ≥60% efficiency for the same CD errors. Similar results are obtained with respect to optical bandwidth, with the nominal adiabatic mode evolution and directional coupling based designs achieving >95% efficiency over wavelength ranges of >200 nm and ∼50 nm respectively. The superior performance of the adiabatic design requires a coupler length in the range L ≈ 100–250 µm. The results yield a high performance, compact, and straightforward design solution for efficiently interfacing between conventional diffraction limited waveguides and all-dielectric subdiffraction waveguides with an ultra-small mode area.

Effect of Twist Drill Geometry and Drilling Parameters on Hole Quality in Single-Shot Drilling of CFRP/Al7075-T6 Composite Stack

Drilling two different materials in a layer, or stack-up, is being practiced widely in the aerospace industry to minimize critical dimension mismatch and error in the subsequent assembly process, but the compatibility of the drill to compensate the widely differing properties of composite is still a major challenge to the industry. In this paper, the effect of customized twist drill geometry and drilling parameters are being investigated based on the thrust force signature generated during the drilling of CFRP/Al7075-T6. Based on ANOVA, it is found that the maximum thrust force for both CFRP and Al7075-T6 are highly dependent on the feed rate. Through the analysis of maximum thrust force, supported by hole diameter error, hole surface roughness, and chip formation, it is found that the optimum tool parameters selection includes a helix angle of 30°, primary clearance angle of 6°, point angle of 130°, chisel edge angle of 30°, speed of 2600 rev/min and feed rate of 0.05 mm/rev. The optimum parameters obtained in this study are benchmarked against existing industry practice of the capability to produce higher hole quality and efficiency, which is set at 2600 rev/min for speed and 0.1 mm/rev for feed rate.

Shape and dose control for proximity effect correction on massively parallel electron-beam systems

Massively parallel electron-beam (e-beam) systems (MPESs) were developed to increase the writing throughput and demonstrated to be able to write large-scale patterns significantly faster compared to conventional single-beam systems. However, such systems still suffer from the inherent proximity effect due to the electron scattering in the resist. The proximity effect correction (PEC) has been investigated for a long time, and several PEC schemes have been proposed. Though most of the PEC schemes may be employed for an MPES, their direct application would be subject to the system’s constraints, e.g., a relatively large beam size, a fixed exposing interval, and the same deflection angle for all beams, which may lead to nonoptimal correction results. In this work, practical methods for realizing various types of spatial dose distributions required for the PEC and implementing both shape and dose corrections under the MPES constraints have been developed. It has been shown that, with these methods, the proximity effect correction can be performed effectively with the critical dimension error, line edge roughness, and total dose taken into account.

Co-optimization method to reduce the pattern distortion caused by polarization aberration in anamorphic EUV lithography

Extreme ultraviolet lithography is regarded as the most attractive technology to achieve 7 nm node and below. A new high-numerical-aperture anamorphic objective lens is designed to extend the single exposure resolution limit. However, the polarization aberrations (PAs) induced by the multilayer coatings on mirrors cause pattern distortions that cannot be neglected. In this paper, a source, mask, and process parameter co-optimization method is developed to compensate for the pattern distortions caused by PAs and increase the process window (PW). We first present an asymmetric source represented by the superposition of Zernike polynomials to reduce the pattern placement error (PPE). Then, a weighted cost function that incorporates the influences of PAs is innovated. Finally, a gradient-based statistical optimization method is adopted to minimize the cost function by optimizing the lithography system parameters alternately. Simulations at the 7 nm node of the 1D mask pattern indicate that for the system with a PA of marginal field, compared with our earlier work, the critical dimension error and PPE of the proposed method are reduced by 75.0% and 82.4%, respectively, and the PW is increased by 97.4%.

Mitigating the Impact of Mask Absorber Error on Lithographic Performance by Lithography System Holistic Optimization

The non-ideal mask absorber can cause an increase in critical dimension error (CDE) and decrease in process window (PW). However, the random mask absorber errors induced during mask fabricating and measuring are not considered in computational lithography. The problem cannot be neglected as the continuous scaling of lithography technology node. In this work, for the first time to our knowledge, a source, numerical aperture (NA), and process parameters co-optimization (SNPCO) method is developed to reduce the CDE induced by absorber errors and improve the PW. First, the source is represented by Zernike polynomials to balance computational burden and flexibility of source. Then a weighted cost function containing CDE and PW that incorporates the influences of absorber errors is created. Finally, a statistical optimization method is used to optimize the lithographic system parameters. Simulations of 1D mask pattern show that for the system with extreme absorber errors, the pattern errors of the proposed method are reduced by 62.1% and 58.9%, and the PWs are increased by 40.3% and 36.4%, respectively. The results illustrate that this method is effective in mitigating the CDE caused absorber errors and improving process robustness.

Polarization aberration analysis in lithographic tools

Hypernumerical aperture and polarized illumination are the key technologies of resolution enhancement of lithography. When the numerical aperture reaches 0.85 and above, especially in the immersion lithography, polarization effect must be taken into consideration. The performance of the projection lens needs to be characterized by rigorous polarization aberration. The vector polarization imaging system that is suitable for hypernumerical aperture is established, and the distortion effects introduced by polarization aberration are analyzed. Orientation Zernike polynomials-based method and Pauli–Zernike polynomials-based method are adopted to parameterize the polarization aberration represented by Jones pupil. Critical dimension error, placement error, and normal int. log slope index are introduced as the index to value imaging distortion. The proposed method and analysis conclusion would provide meaningful guidance for projection lens design of lithographic tools.

Two-layer critical dimensions and overlay process window characterization and improvement in full-chip computational lithography

Edge placement error (EPE) was a term initially introduced to describe the difference between predicted pattern contour edge and the design target for a single design layer. Strictly speaking, this quantity is not directly measurable in the fab. What is of vital importance is the relative edge placement errors between different design layers, and in the era of multipatterning, the different constituent mask sublayers for a single design layer. The critical dimensions (CD) and overlay between two layers can be measured in the fab, and there has always been a strong emphasis on control of overlay between design layers. The progress in this realm has been remarkable, accelerated in part at least by the proliferation of multipatterning, which reduces the available overlay budget by introducing a coupling of overlay and CD errors for the target layer. Computational lithography makes possible the full-chip assessment of two-layer edge to edge distances and two-layer contact overlap area. We will investigate examples of via-metal model-based analysis of CD and overlay errors. We will investigate both single patterning and double patterning. For single patterning, we show the advantage of contour-to-contour simulation over contour to target simulation, and how the addition of aberrations in the optical models can provide a more realistic CD-overlay process window (PW) for edge placement errors. For double patterning, the interaction of 4-layer CD and overlay errors is very complex, but we illustrate that not only can full-chip verification identify potential two-layer hotspots, the optical proximity correction engine can act to mitigate such hotspots and enlarge the joint CD-overlay PW.

Practical approach to modeling e-beam lithographic process from SEM images for minimization of line edge roughness and critical dimension error

Two main factors which limit the minimum feature size and the maximum circuit density achievable by electron-beam (e-beam) lithography are the line edge roughness (LER) and the proximity effect. Since the LER is caused by the stochastic nature of the exposing and development processes, it does not scale with the feature size. Therefore, reducing the LER is essential as the feature size continues to decrease. Accurate modeling of the LER and the proximity effect analytically or via simulation for their minimization is either difficult or costly in many cases. In this study, a practical method for extracting the essential information from SEM images, needed to characterize the e-beam lithographic process, and an effective method for minimizing the LER and critical dimension error based on the extracted information have been developed. The main objective is that the methods utilize only the information extracted from SEM images without having to know the complete setup of e-beam lithographic process. It has been shown that they have a good potential to be further developed into practical and useful tools.

Multistack structure for an extreme-ultraviolet pellicle with out-of-band radiation reduction

We report on out-of-band (OoB) radiation that can cause degradation to the image quality in extreme-ultraviolet (EUV) lithography systems. We investigated the effect of OoB radiation with an EUV pellicle and found the maximum allowable reflectivity of OoB radiation from the EUV pellicle that can satisfy certain criteria (i.e., the image critical dimension error, contrast, and normalized image log slope). We suggested a multistack EUV pellicle that can obtain a high EUV transmission, minimal reflectivity of OoB radiation, and sufficient deep ultraviolet transmission for defect inspection and alignment without removing the EUV pellicle in an EUV lithography system.

Experimental verification of achieving vertical sidewalls for nanoscale features in electron-beam lithography

It is often necessary to achieve a vertical sidewall in the remaining resist profile obtained through electron-beam lithographic process. For nanoscale features, the spatial dose distribution of V-shape typically used in a conventional two-dimensional proximity effect correction scheme cannot easily achieve a vertical sidewall while also minimizing the critical dimension (CD) error. In an earlier study, it was shown through simulation based on a three-dimensional model that new types of spatial dose distributions, i.e., M- and A-shapes, are effective in achieving vertical sidewalls and minimizing the CD error and total dose. These two dose distributions exploit the fact that the exposure varies along the depth dimension with high and low contrasts at the top and bottom layers of resist, respectively. In this study, a number of experiments have been carried out in order to verify the simulation results reported earlier. This paper includes a review of the new dose distribution types and experimental results with a detailed discussion.

Minimization of line edge roughness and critical dimension error in electron-beam lithography

As the minimum feature size continues to decrease, the line edge roughness (LER) has become a critical issue to be addressed. The LER is caused by a number of stochastically fluctuating effects involved in the fabrication process using electron-beam lithography. Since the LER does not scale with the feature size, it can significantly limit the minimum feature size and the maximum circuit density that can be achieved in a pattern of nanoscale features. Many of the efforts to decrease the LER in the past took an empirical or trial-and-error approach. In this study, a computational approach is taken in developing effective methods to minimize the LER, taking the critical dimension (CD) error due to the proximity effect also into account. Since the LER and the CD error vary with the resist-depth dimension, a 3D model is employed instead of a 2D model used in most of the previous work. The simulation results show that the proposed methods have potential to provide a practical and effective way to minimize the LER.

New types of dose distributions for vertical sidewall minimizing total dose in 3-D electron-beam proximity effect correction of nanoscale features

The spatial dose distribution across a feature, derived by a conventional 2-D proximity effect correction scheme, is a “V-shape,” i.e., higher dose closer to edges. With such a dose distribution, it is extremely difficult to realize a vertical sidewall in the resist profile for nanoscale features while reducing the critical dimension (CD) error. In this paper, it is shown that, in order to achieve a vertical sidewall of nanoscale feature with the minimum total dose, a dose distribution of a shape other than the V-shape must be used. This is due to the fact that the lateral development of resist becomes comparable to the vertical development for nanoscale features and the exposure varies along the depth dimension with high and low contrasts at the top and bottom layers of resist, respectively. Based on these characteristics, new types of dose distributions, i.e., “M-shape” and “A-shape,” have been derived to achieve a target resist profile of a vertical sidewall while minimizing the total dose. The simulation results show that the new dose distribution types lead to a more vertical sidewall, a smaller CD error, and a lower total dose.

Residual-type mask defect printability for extreme ultraviolet lithography

To evaluate the impact of residual-type mask defects on wafer printing during extreme ultraviolet lithography, a number of programmed residual-type defects were fabricated by etching line-bridging defects with full-height and with lateral dimensions of 900 × 225 nm in hp 225 nm line-and-space (L/S) patterns using electron beam (EB) induced gas-assisted etching (GAE). The heights of the fabricated defects were 33.1, 17.8, 8.2, and 2.9 nm, and after etching, no damage of any kind on the multilayer surface in the proximity of the etched area was observed using SEM and AFM. The wafer printability test was performed using an exposure tool with sufficient capabilities for resolving hp 45 nm L/S patterns. By analyzing the wafer printed images, the full etched defect was found to cause less than 0.6 nm of critical dimension (CD) change, which corresponded to 1.3% of CD error within a focus range of ±100 nm. This means that the EB induced GAE method can be considered quite suitable for the fabrication of residual-type programmed defects for wafer printability tests. The residual-type defects apparently did cause some CD errors on the wafer printed images, even where the residual-type defects happened to be only 8.2 nm high. The 33.1- and 17.8-nm-high residual-type defects caused line-bridging on the wafer printed images, whereas the 2.9-nm-high residual-type defect resulted in a 10% or higher CD error in the region outside the focus range.

Impact of Resist Shrinkage and Its Correction in Nanoimprint Lithography

Relative critical dimension (CD) errors in nanoimprint lithography are estimated by numerical simulation for various pattern sizes. From the results, transfer functions to estimate the CD errors are proposed, which are expressed similarly to a low- or high-pass filter in terms of the spatial frequency. Using the transfer functions, the mold pattern sizes are corrected to compensate the shrinkage.

Characterization of Fogging and Develop-Loading Effects in Electron-Beam Direct-Writing Technology

We investigated long-range critical dimension (CD) error factors, such as fogging and develop loading, to improve CD uniformity in electron-beam direct-writing (EBDW) technology. It was found that the impact of both effects reached 20 mm and the CD of the monitor pattern decreased by no less than 10%. Fogging and develop loading were separated by comparing the newly designed test patterns that were exposed using both EB and a krypton-fluoride excimer laser. We confirmed that the impact of fogging and develop loading by arranging dummy patterns with a density of 40% was estimated to be +8.9 and -18.9% in the CD, respectively. Based on success in separating each effect, fogging and develop loading were decreased by applying an antistatic agent and multipuddle development, respectively.

Defect Inspection Technique Using Surface Plasmon Resonance

Inspection using surface plasmon resonance is demonstrated by using a Cr photomask with a 200 nm line and space pattern. This inspection makes it possible to detect Cr defects with a side length of 200 nm connected between lines and hole defects disconnected lines. Our experiments indicate that the smallest size of a detectable defect is estimated to be 6.3 nm and the inspection time is less than 10 min by assuming a multibeam system. Moreover, we can apply surface plasmon resonance to the detection of critical dimension error within 10 nm on the photomask. In conclusion, the resolution and throughput for our inspection technique using surface plasmon resonance are higher than those of a conventional mask inspection technique.

Using FlexRay in Computational Lithography

FlexRay programmable illumination and LithoTuner software is combined in several use cases. The first use case is source mask optimization (SMO) in which the process window is maximized for a static random access memory (SRAM) design. In a 55 nm half-pitch contact hole array (k1 = 0.38, NA= 1.35, λ= 193 nm), the process window (PW) with FlexRay programmable illumination is twice as large as the PW with cQuad illumination defined through completely refractive illumination. The second use case is optical proximity error (OPE) minimization in which the large PW from SMO is realized on every scanner in the fab. The OPE error is reduced by 17% with LithoTuner and FlexRay. The third use case is matching two ArF scanners, a 1950i with FlexRay to a 1700i with diffractive optical element (DOE) illumination. With LithoTuner and FlexRay, the root means squared (rms) critical dimension (CD) error is reduced by 29% in this third use case. The last use case, intrafield dose optimization with DoseMapper is combined with FlexRay programmable source optimization to reduce the CD error on a wafer from a mean-to-target critical dimension (CD) error in the mask manufacturing process. This combination was optimized with LithoTuner to reduce the root mean square (rms) wafer CD error by 30%.