CPU Processing Time Research Articles

A novel framework for retiming using evolutionary computation for high level synthesis of digital filters

In this paper, design of a new algorithm and a framework for retiming the DSP blocks based on evolutionary computation process is explained. Optimal DSP blocks such as digital filter design is a high level synthesis problem which includes optimally mapping digital filter specifications on to FPGA (Field Programmable Gate Array) architecture. Retiming is the considered optimization method in this paper which gives optimality in terms of algorithm processing speed and digital filter operating frequency with register count as a constraint. The designed novel algorithm is for the synthesis of high speed digital filters for different signal processing applications based on nature inspired evolutionary computation method. The classical retiming algorithms such as clock period minimization and register minimization that are addressed in the literature provide a single heuristic solution based on the chosen optimization parameter such as clock period. However, for retiming which is multi-objective optimization, evolutionary approach can lead to better results. Using the designed evolutionary computation based retiming method, retimed solution database is generated with higher frequency and different output register counts by searching the digital block solution space. Depending on the clock period and register count constraint, designer can take a design decision. Here, various signal processing designs are used to facilitate the design analysis. Results also show that the CPU processing time needed to compute multiple solutions using the designed algorithm for filter circuits is reduced for designs whose maximum feasible solutions are less than 50. If the circuit is very big with the possible solution space greater than 50 solutions, then algorithm performs slower. A comparison is also provided in the Simulations section with respect to all the existing classical retiming methods in the literature such as clock period and register minimization retiming to prove the concept. Multi-objective genetic algorithms are the considered evolutionary computation method in this paper.

Automatic Spectral–Spatial Classification Framework Based on Attribute Profiles and Supervised Feature Extraction

A robust framework for the classification of hyperspectral images which takes into account both spectral and spatial information is proposed. The extended multivariate attribute profile (EMAP) is used for extracting spatial information. Moreover, for solving the so-called curse of dimensionality, supervised feature extraction is carried out on both the original hyperspectral data and the output of the EMAP. After performing the dimensionality reduction, two output vectors of the original data and attributes are concatenated into one stacked vector. The final classification map is achieved by using a random-forest classifier. The main difficulties of using an EMAP is to initialize the attribute parameters. Therefore, a fully automatic scheme of the proposed method is introduced to overcome the shortcomings of using EMAP. The proposed method is tested on two widely known data sets. Experimental results confirm that the proposed method provides an accurate classification map in an acceptable CPU processing time.

Automatic Framework for Spectral–Spatial Classification Based on Supervised Feature Extraction and Morphological Attribute Profiles

Supervised classification plays a key role in terms of accurate analysis of hyperspectral images. Many applications can greatly benefit from the wealth of spectral and spatial information provided by these kind of data, including land-use and land-cover mapping. Conventional classifiers treat hyperspectral images as a list of spectral measurements and do not consider spatial dependencies of the adjacent pixels. To overcome these limitations, classifiers need to use both spectral and spatial information. In this paper, a framework for automatic spectral–spatial classification of hyperspectral images is proposed. In order to extract the spatial information, Extended Multi-Attribute Profiles (EMAPs) are taken into account. In addition, in order to reduce the redundancy of features and address the so-called curse of dimensionality, different supervised feature extraction (FE) techniques are considered. The final classification map is provided by using a random forest classifier. The proposed automatic framework is tested on two widely used hyperspectral data sets; Pavia University and Indian Pines. Experimental results confirm that the proposed framework automatically provides accurate classification maps in acceptable CPU processing times.

선박관리 시스템의 최적화

In this paper, an effort has been made to design and develop an optimized programming model for Real-time Ship Management System. Replacing the conventional interrupt-driven programming model, an embedded real-time operating system (RTOS) has been implemented on the system, allowing processes to run virtually simultaneous and multitasking. Data management algorithms are designed and developed in the RTOS to facilitate data distribution amongst tasks and optimize the CPU processing time through intelligent resource utilization. Finally, data lost in the system has been minimized via the improvement of data processing rate under the optimized programming model.

Cell assignment in hybrid CMOS/nanodevices architecture using Tabu Search

A recent advancement in VLSI that drastically improved the circuit density is the introduction of CMOL (CMOS/nanodevices hybrid), which consists of an overlay of a nanofabric over a CMOS stack. Combinational logic in CMOL is implemented from a netlist of NOR gates and Inverters by programming nanodevices placed between overlapping nanowires. The length of the nanowires is restricted, and therefore connectivity of the circuit elements is constrained to be within a certain radius, else additional buffers are required. In this paper we present a Tabu Search (TS) algorithm to address the assignment problem in CMOL. The heuristic is engineered to provide sub-optimal solution by efficient exploration of search space. Empirical results for ISCAS benchmarks are compared with previous solutions using GA, MA, and LRMA heuristics. Results show that in almost all cases, TS exhibits more intelligent search of the solutions subspace, and is able to find better solutions in less time. For all tested benchmarks, over 90 % reduction in average CPU processing time when compared with best published techniques was obtained.

Power System Critical Eigenvalue Estimation Using Flexibility of Subspace System Identification

In this research, a new algorithm and proposition are suggested to estimate critical eigenvalues of power systems. The algorithm is based on the characteristics of five renowned deterministic subspace system identification algorithms: the multivariable output error state space, past output multivariable output error state space, numerical algorithm for subspace identification, canonical correlation analysis, and orthogonal decomposition technique. Suggesting a novel proposition, the mentioned subspace system identification algorithms are reformulated in a general realization framework in order to clarify their similarities and differences. Numerous implementation characteristics of the algorithms are explored in order to automate system order selection and state matrix estimation. Performance of the proposed algorithm, when applied for eigenvalue estimation, is investigated in the concern of estimation accuracy and computational loads. Different aspects of the proposition and the algorithm are explored through conducting several simulations. The simulations may be carried out using a simple test power system (two-area four-machine system), an average system (New England 10-machine system) and a complicated power system benchmark (IEEE 50-machine system). In accordance with the test results, it is claimed that among the investigated subspace system identification algorithms, the past output multivariable output error state space has very good performance for power system eigenvalue, damping ratio, and frequency estimation when concerning estimation accuracy and CPU processing time.

Multimedia Web Services Performance: Analysis and Quantification of Binary Data Compression

Multimedia Web services constitute a considerable load on Internet bandwidth and on Web servers. With the increasing demand of multimedia Web services, the need to maintain a respectable QoS is a major concern for multimedia Web services’ providers. Binary data compression, lossy and lossless, increases performance gain and maintains QoS, at large and small-scale implementations. At the expense of increased CPU processing time, data compression provides a reliable solution to sustain QoS parameters such as response time, download time and server delay where bandwidth is limited. This paper presents a detailed analysis, which is based upon realistic and representative data, in order to quantify the performance gain for multimedia Web services due to the application of binary image compression. To provide data for our analysis method, we have built an image-retrieval Web service that provides a set of images in both compressed and non-compressed form. The work in this paper promotes the utilisation of multimedia compression techniques and proposes the integration of multimedia compression techniques in current Web standards such as HTTP. The analysis method and results can be extended and adapted to various service and network models, such as wireless LAN, Ad-Hoc, mobile networks, IP-telephony and distributed systems.

A Method of Accelerating Transport Simulation When Groundwater Pumping Is Simulated

In solving groundwater transport problems with numerical models, the computation time (CPU processing time) of transport simulation is approximately inversely proportional to the transport time-step size. Therefore, large time-step sizes are favorable for achieving short computation time. However, transport time-step size must be sufficiently small to avoid numerical instability if an explicit scheme is used (and to guarantee enough model accuracy if an implicit scheme is used). For a transport model involving groundwater pumping, a small transport time-step size is often required due to the high groundwater velocities near the pumping well. Small grid spacing often specified near the pumping well also limits the time-step size. This paper presents a method to increase transport time-step size in a transport model when groundwater pumping is simulated. The key to this approach is to numerically decrease the groundwater seepage velocities in grid cells near the pumping well by increasing the effective porosity so that the transport time-step size can be increased without violating stability constraints. Numerical tests reveal that by using the proposed method, the computation time of transport simulation can be reduced significantly, while the transport simulation results change very little.

Iterative learning control of dynamic memory caching to enhance processing performance on java platform

In this study, computing system performance enhancement by dynamic memory scheduling has been presented. CPU processing time of the computing systems has been enhanced by classifying the arriving computing jobs on an “intelligent manner” and dynamically caching them in a limited memory space. In some special computing areas, like insurance risk investigation, calculations of income and premium need heavy and repetitive actuarial calculations. To improve the computation response time, computing schemes may be improved. In this study, a fairly special computing process has been elaborated, the computing jobs are always created by choosing the inputs among a finite set data such as age, income level, education, which describes the profile of the insurance policy holder or applicant who is inquiring the risk of his/her policy. Caching the repetitive jobs’ results and enhancing the CPU benefit has been presented and an intelligent regulation scheme has been introduced to software control. For experimental validation, Aspect Oriented Programming (AOP) methodology on Java platform is used. AOP allows identify computational jobs and their parameters based on the marked annotations, and the repeating jobs and the same results may be accessible for caching.

A Novel Spatial Clustering Algorithm Based on Delaunay Triangulation

Exploratory data analysis is increasingly more necessary as larger spatial data is managed in electro-magnetic media. Spatial clustering is one of the very important spatial data mining techniques which is the discovery of interesting rela-tionships and characteristics that may exist implicitly in spatial databases. So far, a lot of spatial clustering algorithms have been proposed in many applications such as pattern recognition, data analysis, and image processing and so forth. However most of the well-known clustering algorithms have some drawbacks which will be presented later when ap-plied in large spatial databases. To overcome these limitations, in this paper we propose a robust spatial clustering algorithm named NSCABDT (Novel Spatial Clustering Algorithm Based on Delaunay Triangulation). Delaunay dia-gram is used for determining neighborhoods based on the neighborhood notion, spatial association rules and colloca-tions being defined. NSCABDT demonstrates several important advantages over the previous works. Firstly, it even discovers arbitrary shape of cluster distribution. Secondly, in order to execute NSCABDT, we do not need to know any priori nature of distribution. Third, like DBSCAN, Experiments show that NSCABDT does not require so much CPU processing time. Finally it handles efficiently outliers.

A Server-side Pre-linking Mechanism for Updating Embedded Operating System Dynamically *

To allow embedded operating systems to update their components on-the-fly, dynamic update mechanism is required for operating systems to be patched or added extra functionalities in without the need of rebooting the machines. However, embedded environments are usually resource-limited in terms of memory size, processing power, power consumption, and network bandwidth. Thus, dynamic update for embedded operating systems should be designed to make the best use of limited resources. In this paper, a server-side pre-linking mechanism is proposed to make dynamic updates of embedded operating system efficiently. Applying this mechanism can reduce not only memory usage and CPU processing time for dynamic update, but also data transmission size for updated components. Power consumption can be reduced as well. We have implemented this mechanism in LyraOS which is a component-based embedded operating system. Performance evaluation shows that the size of updated components applying the proposed dynamic update mechanism can be 65-86% smaller than applying the approach of Linux loadable kernel modules. Especially, the overheads in embedded clients are minimal since the component linking time in embedded clients is eliminated.

A Novel Group Management Protocol for IP Multicast (LW-IGMPv3)

With the deployment of multicast service, people gradually find that hardly any practical application uses Exclude filter mode to block sources. For this reason it is generally unnecessary to support the filtering function to block sources. In addition, the newly proposed SSM service model has defined several modifications to IGMPv3; therefore certain modifications to IGMPv3 must be performed before it can be deployed in the SSM model. On the basis of the above analysis, LW-IGMPv3 is designed as a simplified version of IGMPv3 by Huawei Technology Co., which has been accepted by the IETF Mboned working group as a new draft. LW-IGMPv3 follows the query/response model adopted by all the previous IGMP versions. Therefore the network overhead of LW-IGMPv3 is basically the same with IGMPv3. The major difference between IGMP and LW-IGMPv3 is below. First, the reception state for each attached network maintained by the multicast router is simplified as: (multicast address, group timer, (source records)); second, most record types have the same operation rule in both ASM and Include state, and only the TO_IN record type need to vary its operation according to the value of its group timer; third, the forwarding suggestion rule no longer needs to take the filter mode into consideration. Functional research is performed, in which protocol states and message operation procedures are analyzed and compared to those of IGMPv3. A simulation is conducted with our developed C++ simulator to generate network traffic and LW-IGMPv3 and IGMPv3 protocols deployed on the open source router platform XORP in order to compare router performance of LW-IGMPv3 and IGMPv3. During the simulation, the performance, which was measured by CPU processing time and Memory occupancy, of the device running LW-IGMPv3 is improved substantially compared to the one running IGMPv3 and the value of all the parameters of both IGMP protocol and multicast routing protocol are the same. Also, a simulation environment is established and a series of test cases is designed to verify the compatibility of LW-IGMPv3. The result shows that LW-IGMPv3 is not only compatible with old versions of IGMP, but also shows great improvements in router performance and scalability.

SIP Paging and Tracking of Wireless LAN Hosts for VoIP

This paper introduces a new paging technique to track and wake up a mobile node (MN) attached to an access point (AP) in a wireless LAN network after a session initiation protocol (SIP) INVITE message is initiated by a caller. A tracking agent (TA) keeps track of the mobiles' handoffs between the APs. A paging agent (PA) triggers the TA to page the mobile when a SIP INVITE is received for one of its users. The context transfer feature of our paging protocol allows the paging messages to deliver the station context in order to enable faster session reestablishment. The AP then does onlink paging in a wireless link. SIP extensions are needed to trigger the PA to start paging MNs to notify their dormant status using an extended SIP REGISTER method. Tracking protocol is analyzed to compare soft- and hard-state approaches for state inconsistency ratio, message rate, and the overall cost. The simulation model we developed enables us to evaluate the traffic introduced by the tracking protocol and the cache (state) size. Paging protocol is analyzed for CPU processing times and the transmission delays in the SIP session setup with paging. Simulation of the paging with context transfer is used to show the gains in reauthentication.

Probabilistic multi-class multi-kernel learning: on protein fold recognition and remote homology detection

The problems of protein fold recognition and remote homology detection have recently attracted a great deal of interest as they represent challenging multi-feature multi-class problems for which modern pattern recognition methods achieve only modest levels of performance. As with many pattern recognition problems, there are multiple feature spaces or groups of attributes available, such as global characteristics like the amino-acid composition (C), predicted secondary structure (S), hydrophobicity (H), van der Waals volume (V), polarity (P), polarizability (Z), as well as attributes derived from local sequence alignment such as the Smith-Waterman scores. This raises the need for a classification method that is able to assess the contribution of these potentially heterogeneous object descriptors while utilizing such information to improve predictive performance. To that end, we offer a single multi-class kernel machine that informatively combines the available feature groups and, as is demonstrated in this article, is able to provide the state-of-the-art in performance accuracy on the fold recognition problem. Furthermore, the proposed approach provides some insight by assessing the significance of recently introduced protein features and string kernels. The proposed method is well-founded within a Bayesian hierarchical framework and a variational Bayes approximation is derived which allows for efficient CPU processing times. The best performance which we report on the SCOP PDB-40D benchmark data-set is a 70% accuracy by combining all the available feature groups from global protein characteristics but also including sequence-alignment features. We offer an 8% improvement on the best reported performance that combines multi-class k-nn classifiers while at the same time reducing computational costs and assessing the predictive power of the various available features. Furthermore, we examine the performance of our methodology on the SCOP 1.53 benchmark data-set that simulates remote homology detection and examine the combination of various state-of-the-art string kernels that have recently been proposed.

Performance bottleneck of subsequence matching in time-series databases: Observation, solution, and performance evaluation

Subsequence matching is an operation that finds subsequences whose changing patterns are similar to a given query sequence from time-series databases. This paper identifies a performance bottleneck in subsequence matching, and then proposes an effective method that substantially improves the performance of entire subsequence matching by resolving the performance bottleneck. First, we analyze the disk access and CPU processing times required during the index searching and post-processing steps of subsequence matching through preliminary experiments. Based on these results, we show that the post-processing step is a main performance bottleneck in subsequence matching. Then, we argue that the optimization of the post-processing step is a crucial issue overlooked in previous approaches. In order to resolve the performance bottleneck, we propose a simple yet highly effective method for expediting the post-processing step. By rearranging the order of candidate subsequences to be compared with a query sequence, our method completely eliminates the redundancies of disk accesses and CPU processing that occur in the post-processing step. Our method is fairly efficient, and does not incur any false dismissal. We quantitatively demonstrate the superiority of our method through extensive experimentation. The results show that our method produces a significantly faster post-processing step; When using a data set of real-world stock sequences, our method was 43.36–96.75 times faster than previous methods, and when using data sets of large numbers of synthetic sequences, our method was 12.48–26.95 times faster than previous methods. Also, the results show that our method reduces the weight of the post-processing step over entire subsequence matching from more than 97% to less than 67%. This implies that our method successfully resolves the performance bottleneck in subsequence matching. As a result, our method provides excellent performance in entire subsequence matching. Compared with previous methods, our method is 16.17–32.64 times faster when using a data set of real-world stock sequences and 8.64–14.29 times faster when using data sets of large numbers of synthetic sequences.

On Walrasian Price of CPU Time

We study a Walrasian equilibrium model to determine the price of CPU time. The customers have jobs that require a given length of CPU slot allocation with their valuations dependent on the assigned time slots. The owner of the CPU processing time receives compensation for time slots sold to the customers, subject to the condition that the slots sold to a customer are those that the customer most desires, given the price structure for the time slots. We establish conditions for jobs to have Walrasian equilibrium, and obtain complexity results to determine the Walrasian equilibrium. In particular, the issues of excessive supply of CPU time and price dynamics are discussed under our model.

Channel Assignment for Cellular Networks Based on a Local Modified Hopfield Neural Network

In this paper, we propose a modified discrete Hopfield neural networks algorithm for the channel assignment problem. In opposition to previous work, we tried to apply the optimization locally on a per cell basis in order to reduce the CPU processing time and decrease the designed system complexity while obtaining a near-optimum solution. In addition, the research is extended to study the algorithm performance in a more realistic cellular system where the number of requested channels is continuously changing with time. In this paper, the channel assignment problem is formulated as an energy function which is at its minimum when all the defined compatibility constraints are satisfied and the assigned channel number (ACN) is equal to the requested channel number (RCN) in each cell.

LyraNET: A zero-copy TCP/IP protocol stack for embedded systems

Embedded systems are usually resource limited in terms of processing power, memory, and power consumption, thus embedded TCP/IP should be designed to make the best use of limited resources. Applying zero-copy mechanism can reduce memory usage and CPU processing time for data transmission. Power consumption can be reduced as well. In this paper, we present the design and implementation of zero-copy mechanism in the target embedded TCP/IP component, LyraNET, which is derived from Linux TCP/IP codes and remodeled as a reusable software component that is independent from operating systems and hardware. Performance evaluation shows that TCP/IP protocol processing overhead can be significantly decreased by 23---63%. Besides, object code size of this network component is only 77.64% of the size of the original Linux TCP/IP stack. The experience of this study can serve as the reference for embedding Linux TCP/IP stack into a target system that requires network connectivity and improving the transmission efficiency of Linux TCP/IP by zero-copy implementation.

Exact k-NN queries on clustered SVD datasets

Clustered SVD–CSVD, which combines clustering and singular value decomposition (SVD), outperforms SVD applied globally, without first applying clustering. Datasets of feature vectors in various application domains exhibit local correlations, which allow CSVD to attain a higher dimensionality reduction than SVD for the same normalized mean square error. We specify an exact method for processing k-nearest-neighbor queries for CSVD, which ensures 100% recall and is experimentally shown to require less CPU processing time than the approximate method originally specified for CSVD.

A MELCOR Application to Two Light Water Reactor Nuclear Power Plant Core Melt Scenarios with Assumed Cavity Flooding Action

The MELCOR 1.8.4 code Bottom Head package has been applied to simulate two reactor cavity flooding scenarios for when the corium material relocates to the lower-plenum region in postulated severe accidents. The applications were preceded by a review of two main physical models, which highly impacted the results. A model comparison to available bibliography models was done, which allowed some code modifications on selected default assumptions to be undertaken. First, the corium convective heat transfer to the wall when it becomes liquid was modified, and second, the default nucleate boiling regime curve in a submerged hemisphere was replaced by a new curve (and, to a much lesser extent, the critical heat flux curve was slightly varied).The applications were devoted to two prototypical light water reactor nuclear power plants, a 2700-MW(thermal) pressurized water reactor (PWR) and a 1381-MW(thermal) boiling water reactor (BWR). The main conclusions of the cavity flooding simulations were that the PWR lower-head survivability is extended although it is clearly not guaranteed, while in the BWR sequence the corium seems to be successfully arrested in the lower plenum.Three applications of the CFX 4.4 computational fluid dynamics code were carried out in the context of the BWR scenario to support the first modification of the aforementioned two scenarios for MELCOR.Finally, in the same BWR context, a statistic predictor of selected output parameters as a function of input parameters is presented, which provides reasonable results when compared to MELCOR full calculations in much shorter CPU processing times.