CPU Complexity Research Articles

The I/O Driven Server: From SmartNICs to Data Movement Controllers

Many researchers are turning to SmartNIC offloads to improve the performance of high-performance networked systems. In this editorial, I discuss why SmartNICs are an especially powerful form factor for improving I/O intensive applications, and how their position in the dataplane enables them to take on central role in managing I/O. Rather than focusing on the benefits of individual offloads, this paper aims to explore the position of SmartNICs in the overall system integration of datacenter servers at the hardware and software level. I argue that SmartNICs should be viewed as 'data movement controllers' (NIC-DMCs) which are responsible for tasks involved in moving data between network, CPU, accelerators, and other endpoints: multiplexing/steering, interfacing between protocols, and enforcing I/O policies. I then enumerate open questions in how the hardware and software systems of the future will evolve to accommodate a dedicated NIC-DMC which is independent of the CPU complex.

A Fast Butterfly-Compressed Hadamard–Babich Integrator for High-Frequency Helmholtz Equations in Inhomogeneous Media with Arbitrary Sources

We present a butterfly-compressed representation of the Hadamard–Babich (HB) ansatz for the Green’s function of the high-frequency Helmholtz equation in smooth inhomogeneous media. For a computational domain discretized with discretization cells, the proposed algorithm first solves and tabulates the phase and HB coefficients via eikonal and transport equations with observation points and point sources located at the Chebyshev nodes using a set of much coarser computation grids, and then butterfly compresses the resulting HB interactions from all cell centers to each other. The overall CPU time and memory requirement scale as for any bounded two-dimensional (2D) domains with arbitrary excitation sources. A direct extension of this scheme to bounded 3D domains yields an CPU complexity, which can be further reduced to quasi-linear complexities with proposed remedies. The scheme can also efficiently handle scattering problems involving inclusions in inhomogeneous media. Although the current construction of our HB integrator does not accommodate caustics, the resulting HB integrator itself can be applied to certain sources, such as concave-shaped sources, to produce caustic effects. Compared to finite-difference frequency domain methods, the proposed HB integrator is free of numerical dispersion and requires fewer discretization points per wavelength. As a result, it can solve wave propagation problems well beyond the capability of existing solvers. Remarkably, the proposed scheme can accurately model wave propagation in 2D domains with 640 wavelengths per direction and in 3D domains with 54 wavelengths per direction on a state-of-the-art supercomputer at Lawrence Berkeley National Laboratory.

Internet of Things Security using New Chaotic System and Lightweight AES

The Internet of Things (IoT)services and application were increasing during the last years in several life fields causes need to provide a secure identifier for protecting sensing data passing between IoT sensors/devices and embedded-subsystem connected by networks. This paper was proposed an algorithm for helping in IoT communication security can used in different IOT entities used in unofficial industrial machine to machine (M2M) communications, smart energy-grids, home or buildings and other computing devices. 
 This paper proposed a secure system using new proposed 4D chaotic system combined with the modified lightweight Advanced Encryption Standard (AES). The proposed 4-dimension (4D) chaos system Lyapunov was tested and pass for many initial periods and get a super chaos system (4 positive Lyapunov). Generated chaos keys (used JORN) were used in the lightweight AES and the Secure Hash Algorithm version 3 (SHA3-256). The Lightweight AES was design in case to reduce CPU computation cycles and complexity of AES. Results show that computation time for proposed system decreased (has 145% speedup more). The output of modified lightweight AES encryption System has the good statistical tests near to original AES that can avoid many attacks.

Data based modelling of driveability for internal combustion engines

ABSTRACTNon-convex hull concepts are used to describe shapes or images in data processing. The most widely used non-convex hull methods were introduced to visualize two- or three-dimensional data obtained via 3D scans or GPS signals. Data hulls have also been used as feasibility models in automotive control systems. For these higher-dimensional problems the computational complexity bears an important factor for data processing software. Commonly used methods, such as the convex hull, involve triangulations, which are numerically intractable in practice for dimensions above 10. Simple, spatial models can be computed and evaluated fast, using and floating point operations, respectively, but they perform poorly as feasibility classifiers if the data is close to infeasible regions. This article introduces a class of conic hulls that can be calculated for any input dimension with sub-quadratic, and evaluated with sub-linear, CPU complexity, respectively. These hulls are designed to include screening information of the measurement procedures embedded in the data generating processes.

Cost-Based Buffer Management Algorithm for Flash Database Systems

PDF HTML阅读 XML下载 导出引用 引用提醒 基于代价的闪存数据库缓冲区置换算法 DOI: 10.3724/SP.J.1001.2011.03967 作者: 作者单位: 作者简介: 通讯作者: 中图分类号: 基金项目: 国家自然科学基金(60833005, 60573091); 国家高技术研究发展计划(863)(2007AA01Z155, 2009AA011904); 国家教育部博士点基金(200800020002) Cost-Based Buffer Management Algorithm for Flash Database Systems Author: Affiliation: Fund Project: 摘要 | 图/表 | 访问统计 | 参考文献 | 相似文献 | 引证文献 | 资源附件 | 文章评论 摘要:提出一种基于闪存硬盘(solid state disk,简称SSD)的自适应缓冲区管理算法CBLRU,其将数据页的置换代价与其驻留内存的影响相结合,为每个数据页附加一个权值,当发生页缺失问题时,选择具有最小权值的数据页进行置换,从而可以在延长修改页驻留缓冲区的同时,避免某些修改页长期占用缓冲区中有效空间问题的发生.由于该权值会根据不同闪存的读写代价进行动态调整,因此可适用于不同类型的闪存硬盘;进一步,提出了同类型数据页的权重关系稳定性结论,基于该结论,CBLRU 将缓冲区中的数据页组织为两个LRU 队列, Abstract:Different from existing flash-aware buffer replacement policies that focus on the asymmetry of read and write operations, this paper addresses the “discrepancy” of the asymmetry for different flash disks which has existed for a long time. The study proposes an adaptive replacement policy (CBLRU), which assigns to each page a weighted value that combines the IO cost and the influence of pages staying in the buffer. When selecting a victim page, the one with the minimum weighted value will be selected as the victim page, thus, one can avoid the problem of occupying the valid buffer space by dirty pages that are not used for a long time. Moreover, as the cost of read and write operations will be adjusted according to different flash disks, CBLRU can wisely tune itself and adapt to different kinds of flash disks. Finally, a theorem is proposed addressing the stability of the relationship between pages, based on which CBLRU organizes all data pages into two LRU lists: one for clean pages and the other for dirty pages, and then the CPU complexity is reduced form O(klogk) to O(1). The experimental results show that compared with existing buffer-aware replacement algorithms, CBLRU is very efficient when being used for different kinds of flash disks. 参考文献 相似文献 引证文献

A practical revocation scheme for broadcast encryption using smartcards

We present an anti-pirate revocation scheme for broadcast encryption systems (e.g., pay TV), in which the data is encrypted to ensure payment by users. In the systems we consider, decryption of keys is done on smartcards and key management is done in-band. Our starting point is a scheme of Naor and Pinkas. Their basic scheme uses secret sharing to remove up to t parties, is information-theoretic secure against coalitions of size t , and is capable of creating a new group key. However, with current smartcard technology, this scheme is only feasible for small system parameters, allowing up to about 100 pirates to be revoked before all the smartcards need to be replaced. We first present a novel implementation method of their basic scheme that distributes the work among the smartcard, set-top terminal, and center. Based on this, we construct several improved schemes for many revocation rounds that scale to realistic system sizes. We allow up to about 10,000 pirates to be revoked using current smartcard technology before recarding is needed. The transmission lengths of our constructions are on par with those of the best tree-based schemes. However, our constructions have much lower smartcard CPU complexity: only O (1) smartcard operations per revocation round (a single 10-byte field multiplication and addition), as opposed to the complexity of the best tree-based schemes, which is polylogarithmic in the number of users. We evaluate the system behavior via an exhaustive simulation study coupled with a queueing theory analysis. Our simulations show that with mild assumptions on the piracy discovery rate, our constructions can perform effective pirate revocation for realistic broadcast encryption scenarios.

A Novel Algorithm to Determine Minimum Break Point Set for Optimum Cooperation of Directional Protection Relays in Multiloop Networks

Determining minimum break point set (MBPS) is necessary before setting distance protection relays or zero-sequence protection relays in multiloop extremely high voltage power networks. Determining directional simple loops (DSLs) and relative sequence groups (RSGs) is the prerequisite of traditional algorithms which are used to determine MBPS. In order to reduce the CPU time and complexity of calculating MBPS, a new concept named as protection relay dependency dimension (PRDD) is presented for the first time in this paper. By comparison of PRDD in a multiloop network, the MBPS can be determined, and the process of comparisons will not stop until the MBPS of the multiloop networks is discovered. In the meantime, the RSG could be easily determined by means of judging whether the primary protection relay set of a protection relay is null or not. The new algorithm leaves out those laborious steps, such as determining all of the DSLs and RSGs. Some examples are given to illuminate the novel algorithm presented in the paper to be simple and effective.

3D Scan-Based Wavelet Transform and Quality Control for Video Coding

Wavelet coding has been shown to achieve better compression than DCT coding and moreover allows scalability. 2D DWT can be easily extended to 3D and thus applied to video coding. However, 3D subband coding of video suffers from two drawbacks. The first is the amount of memory required for coding large 3D blocks; the second is the lack of temporal quality due to the sequence temporal splitting. In fact, 3D block-based video coders produce jerks. They appear at blocks temporal borders during video playback. In this paper, we propose a new temporal scan-based wavelet transform method for video coding combining the advantages of wavelet coding (performance, scalability) with acceptable reduced memory requirements, no additional CPU complexity, and avoiding jerks. We also propose an efficient quality allocation procedure to ensure a constant quality over time.

Hybrid finite element modelling of conformal antenna and array structures utilizing fast integral methods

Hybrid finite element methods (FEM) which combine the finite element and boundary integral methods have been found very successful for the analysis of conformal finite and periodic arrays embedded on planar or curved platforms. A key advantage of these hybrid methods is their capability to model inhomogeneous and layered material without a need to introduce complicated Green's functions. Also, they offer full geometrical adaptability and are thus of interest in general-purpose analysis and design. For the proposed hybrid FEM, the boundary integral is only used on the aperture to enforce the radiation condition by employing the standard free space Green's function. The boundary integral truncation of the FEM volume domain, although necessary for rigor, is also the cause of substantial increase in CPU complexity. In this paper, we concentrate on fast integral methods for speeding-up the computation of these boundary integrals during the execution of the iterative solver. We consider both the adaptive integral method (AIM) and the fast multipole method (FMM) to reduce the complexity of boundary integral computation down to 𝒪(Nα) with α<1.5. CPU and memory estimates are given when the AIM and FMM accelerations are employed as compared to the standard 𝒪(N2) algorithms. In addition, several examples are included to demonstrate the practicality and application of these fast hybrid methods to planar finite and infinite arrays, frequency selective surfaces, and arrays on curved platforms. Copyright © 2000 John Wiley & Sons, Ltd.

A High Performance/Low Cost Accelerator Control System

Implementation of a high performance computer control system tailored to the requirements of the SuperHILAC accelerator is described. This system uses a distributed (star-type) structure with fiber optic data links; multiple CPU's operate in parallel at each node. A large number (20) of the latest 16-bit microcomputer boards are used to get a significant processor bandwidth (exceeding that of many mini-computers) at a reasonable price. Because of the large CPU bandwidth, software costs and complexity are significantly reduced and programming can be less critical. In addition all programming can be in a high level language. Dynamically assigned and labeled knobs together with touch-screens allow a flexible and efficient operator interface. An X-Y vector graphics system allows display and labeling of real-time signals as well as general plotting functions. Both the accelerator parameters and the graphics system can be driven fram BASIC interactive programs in addition to the pre-canned user routines. This allows new applications to be developed quickly and efficiently by physicists, operators, etc. The system, by its very nature and design, is easily upgraded (via next generation of boards) and repaired (by swapping of boards) without a large hardware support group. This control system is now being tested on an existing beamline and is performing well. The techniques used in this system can be readily applied to industrial control systems.