Coupled Ring Oscillator Research Articles

A 2.4-GHz Multiphase Inductorless PLL With Coupled-Ring Oscillators and Time-Amplifying Phase-Frequency Detector for Low Phase Noise and Robust Locking Performances

A 2.4-GHz Multiphase Inductorless PLL With Coupled-Ring Oscillators and Time-Amplifying Phase-Frequency Detector for Low Phase Noise and Robust Locking Performances

An Ising solver chip based on coupled ring oscillators with a 48-node all-to-all connected array architecture

An Ising solver chip based on coupled ring oscillators with a 48-node all-to-all connected array architecture

Superconducting-Oscillatory Neural Network With Pixel Error Detection for Image Recognition

Brain-inspired oscillatory neural networks (ONNs) utilize coupled oscillators to emulate biological neuronal dynamics. ONNs are naturally suitable for image/pattern recognition. Many hardware implementations of ONNs have been explored recently by using analog or digital CMOS systems, which can be limited by Moore's law. In this work, we used one of the advanced superconducting technologies for coupled oscillator networks to further improve the energy efficiency and processing speed. Inductively coupled ring oscillators using rapid single flux quantum (RSFQ) technology were designed and simulated. These Josephson junction (JJ) based oscillators can operate as fast as tens of GHz but only consume a energy of several aJ per operation. Excluding cryo-cooling factors, the estimated power consumption of our RSFQ oscillator is hundreds of nW at a frequency of 12.5 GHz, which is multiple times smaller than a typical CMOS ring oscillator. Furthermore, a system for pattern recognition with error detection was designed based on these oscillators. Synchronization dynamics in a pair of coupled oscillators were used to identify whether a test pixel matches a reference pixel. A network comprised of 16 pairs of oscillators were wired together, along with synchronization detectors and a fluxon integrator to demonstrate pattern recognition function. This work was performed using standard JJ models and demonstrated through WRspice and JoSIM software simulations. The circuits and systems proposed in this work aim to provide insights into the use of superconducting technology for implementing ONNs and may serve as basic building blocks for the design of more complex oscillatory computational networks in image processing and beyond. Single oscillator modeling and systematic network function exploration will be performed in future work.

Highly reconfigurable oscillator-based Ising Machine through quasiperiodic modulation of coupling strength

Ising Machines (IMs) have the potential to outperform conventional Von-Neuman architectures in notoriously difficult optimization problems. Various IM implementations have been proposed based on quantum, optical, digital and analog CMOS, as well as emerging technologies. Networks of coupled electronic oscillators have recently been shown to exhibit characteristics required for implementing IMs. However, for this approach to successfully solve complex optimization problems, a highly reconfigurable implementation is needed. In this work, the possibility of implementing highly reconfigurable oscillator-based IMs is explored. An implementation based on quasiperiodically modulated coupling strength through a common medium is proposed and its potential is demonstrated through numerical simulations. Moreover, a proof-of-concept implementation based on CMOS coupled ring oscillators is proposed and its functionality is demonstrated. Simulation results show that our proposed architecture can consistently find the Max-Cut solution and demonstrate the potential to greatly simplify the physical implementation of highly reconfigurable oscillator-based IMs.

Ring Oscillators Under Nonlinear Coupling: Bifurcation and Chaos

The dynamics of two non-linearly coupled ring oscillators are examined in this study. Each ring oscillator consists of three-stage inverters, coupled through a resistor and diode. The system is mathematically modeled by non-linear differential equations. A numerical phase plane, bifurcation, and quantitative measures, like the Lyapunov exponent, confirm the transition from periodic to chaotic oscillation in a broad parameter zone. The system is implemented in a prototype hardware electronic circuit with bifurcation and chaos observed experimentally. This circuit can be used in practical applications such as cryptography and random number generation.

Investigation of injection‐locked ring oscillators for process, voltage, and temperature‐aware low phase‐noise reference clock generation

In this paper, injection-locked coupled ring oscillators (ROs) are studied regarding their capabilities for process, voltage, and temperature (PVT) compensated reference clock generation. A PVT resilient RO is implemented by means of injection-locked coupled ROs where the injection locking mechanism is realized by employing adjustable coupling factors. It is shown that the oscillation frequency can be highly compensated for temperature-related variations through the coupling factors. In addition, it is possible to compensate the center oscillation frequency for process-induced variations and supply voltage fluctuations. The proposed technique is fully open loop without any frequency tracking loop and can be easily adopted by other architectures of oscillators such as RC and LC counterparts. A 2.4 GHz reference clock generator is implemented in a 0.18 μm standard CMOS process. While the temperature coefficient (TC) of the free-running ROs is about 640 ppm/°C, the coupled structure offers a TC of 80 ppm/°C. Furthermore, the phase-noise of the coupled structure is about 4 dB lower compared with the free-running ROs. The proposed RO consumes about 2.8 mW and occupies a silicon area of 0.09 mm2.

A 1,968-node coupled ring oscillator circuit for combinatorial optimization problem solving

A 1,968-node coupled ring oscillator circuit for combinatorial optimization problem solving

Compact All Fiber Coupled Nonplanar Ring Oscillator Solid-State Laser

Compact All Fiber Coupled Nonplanar Ring Oscillator Solid-State Laser

Chaos-hyperchaos transition in three identical quorum-sensing mean-field coupled ring oscillators.

We investigate the dynamics of three identical three-dimensional ring synthetic genetic oscillators (repressilators) located in different cells and indirectly globally coupled by quorum sensing whereby it is meant that a mechanism in which special signal molecules are produced that, after the fast diffusion mixing and partial dilution in the environment, activate the expression of a target gene, which is different from the gene responsible for their production. Even at low coupling strengths, quorum sensing stimulates the formation of a stable limit cycle, known in the literature as a rotating wave (all variables have identical waveforms shifted by one third of the period), which, at higher coupling strengths, converts to complex tori. Further torus evolution is traced up to its destruction to chaos and the appearance of hyperchaos. We hypothesize that hyperchaos is the result of merging the saddle-focus periodic orbit (or limit cycle) corresponding to the rotating wave regime with chaos and present considerations in favor of this conclusion.

A Probabilistic Compute Fabric Based on Coupled Ring Oscillators for Solving Combinatorial Optimization Problems

Nondeterministic polynomial time hard (NP-hard) combinatorial optimization problems (COPs) are intractable to solve using a traditional computer as the time to find a solution increases very rapidly with the number of variables. An efficient alternative computing method uses coupled spin networks to solve COP. This work presents a first-of-its-kind coupled ring oscillator (ROSC)-based scalable probabilistic Ising computer to solve NP-hard COPs. An integrated coupled oscillator network was designed with 560 ROSCs that mimic a coupled spin network. Each ROSC can be coupled to any of its neighbors using programmable back-to-back (B2B) inverter-based coupling mechanism. The ROSC-based spins and B2B inverter-based coupling were optimized to work under a wide range of system noise as well as voltage and temperature variations. Randomly generated 1000 max-cut problems were mapped and solved in the hardware. The integrated Ising computer produced satisfactory solutions of max-cut problems when compared with commercial software running on a CPU. Experiments show that the integrated CMOS-based Ising computer can find the solution to NP-hard problems with an accuracy of 82%-100%. In addition, the repeated measurements of the same problem showed that the Ising computer can traverse through several local minima to find high-quality solutions under various voltage and temperature variation conditions. The experimental results show that ROSCs are a potential candidate for a dedicated hardware accelerator aiming to solve a wide range of COPs.

Low timing-jitter and high precise delay generation with coupled ring oscillators

A novel design of delay generator based on a coupled ring oscillators is investigated; it attains a delay resolution near a fully differential buffer delay divided by the number of rings. A three-input fully differential buffer constructed with shunting three N-type metal-oxide-semiconductor field-effect transistors is employed for the coupled ring oscillators. The coupling structure forces the outputs of a linear array of ring oscillators oscillating at the same frequency to be uniformly offset in phase by a precise fraction of a fully differential buffer delay. Experimental results with Taiwan Semiconductor Manufacturing Company 0.35 μm-process technology demonstrate that the delay generator can achieve an output delay resolution of 163 ps at the operating frequency of 245 MHz with low timing-jitter of 75 ps.

A Reconfigurable Mostly-Digital Delta-Sigma ADC With a Worst-Case FOM of 160 dB

This paper presents a second-generation mostly-digital background-calibrated oversampling ADC based on voltage- controlled ring oscillators (VCROs). Its performance is in line with the best ΔΣ modulator ADCs published to date, but it occupies much less circuit area, is reconfigurable, and consists mainly of digital circuitry. Enhancements relative to the first-generation version include digitally background-calibrated open-loop V / I conversion in the VCRO to increase ADC bandwidth and enable operation from a single low-voltage power supply, quadrature coupled ring oscillators to reduce quantization noise, digital over-range correction to improve dynamic range and enable graceful overload behavior, and various circuit-level improvements. The ADC occupies 0.075 mm2 in a 65 nm CMOS process and operates from a single 0.9-1.2 V supply. Its sample-rate is tunable from 1.3 to 2.4 GHz over which the SNDR spans 70-75 dB, the bandwidth spans 5-37.5 MHz, and the minimum SNDR+ 10log(bandwidth/power dissipation) figure of merit (FOM) is 160 dB.

A computationally efficient compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates

In this paper a computationally efficient surface-potential-based compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates is presented. A fully-depleted SOI MOSFET with a back-gate is essentially an independent double-gate device. To the best of our knowledge, existing surface-potential-based models for independent double-gate devices require numerical iteration to compute the surface potentials. This increases the model computational time and may cause convergence difficulties. In this work, a new approximation scheme is developed to compute the surface potentials and charge densities using explicit analytical equations. The approximation is shown to be computationally efficient and preserves important properties of fully-depleted SOI MOSFETs such as volume inversion. Drain current and charge expressions are derived without using the charge sheet approximation and agree well with TCAD simulations. Non-ideal effects are added to describe the I– V and C– V of a real device. Source-drain symmetry is preserved for both the current and the charge models. The full model is implemented in Verilog-A and its convergence is demonstrated through transient simulation of a coupled ring oscillator circuit with 2020 transistors.

Feedback-stabilized deformable membrane mirrors for focus control

This paper describes a method to extend the range of motion of a deformable, continuous membrane mirror beyond the limit of open-loop electrostatic instability through feedback control. The feedback scheme employs capacitive sensing directly at the mirror actuation electrodes and is based on frequency modulation of a coupled ring oscillator using a differential measurement technique. Analysis of the system shows that the range of stable deflection depends on the relative dynamics of the device and the feedback control circuitry. Experimental results demonstrate stable closed-loop deflection of our silicon nitride membrane test device to 69% of the air gap and confirm the dependence of the maximum stable displacement on overall loop dynamics.

A Single-PLL UWB Frequency Synthesizer Using Multiphase Coupled Ring Oscillator and Current-Reused Multiplier

A single phase-locked loop (PLL) frequency synthesizer for a mode-1 multiband orthogonal frequency-division multiplexing (MB-OFDM) ultrawideband (UWB) system is realized in 0.13-mum CMOS. A current-reused multiply-by-1.5 circuit and a multiphase coupled ring oscillator are adopted to reduce the power consumption. For a 4.488-GHz signal, the measured image sideband is -40 dBc. The measured switching time from 3.342 to 4.488 GHz is 1.5 ns. The area is 0.85times0.9 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the power is 31.2 mW for a 1.2-V supply voltage.

Precise delay generation using coupled oscillators

A new delay generator based on a series of coupled ring oscillators has been developed; it produces precise delays with subgate delay resolution for chip testing applications. It achieves a delay resolution equal to a buffer delay divided by the number of rings. The coupling employed forces the outputs of a linear array of ring oscillators oscillating at the same frequency to be uniformly offset in phase by a precise fraction of a buffer delay. The buffer stage used in the ring oscillators is based on a source-coupled pair and achieves high supply noise rejection while operating at low supply voltages. Experimental results from a 2- mu m N-well CMOS implementation of the delay generator demonstrate that it can achieve an output delay resolution of 101 ps while operating at 141 MHz with a peak error of 58 ps. >